DECL|ABR|member|__IO uint32_t ABR; /*!< QUADSPI Alternate Bytes register, Address offset: 0x1C */
DECL|ACR|member|__IO uint32_t ACR; /*!< FLASH access control register, Address offset: 0x00 */
DECL|ADC123_COMMON|macro|ADC123_COMMON
DECL|ADC1_BASE|macro|ADC1_BASE
DECL|ADC1|macro|ADC1
DECL|ADC2_BASE|macro|ADC2_BASE
DECL|ADC2|macro|ADC2
DECL|ADC3_BASE|macro|ADC3_BASE
DECL|ADC3|macro|ADC3
DECL|ADC_BASE|macro|ADC_BASE
DECL|ADC_CCR_ADCPRE_0|macro|ADC_CCR_ADCPRE_0
DECL|ADC_CCR_ADCPRE_1|macro|ADC_CCR_ADCPRE_1
DECL|ADC_CCR_ADCPRE_Msk|macro|ADC_CCR_ADCPRE_Msk
DECL|ADC_CCR_ADCPRE_Pos|macro|ADC_CCR_ADCPRE_Pos
DECL|ADC_CCR_ADCPRE|macro|ADC_CCR_ADCPRE
DECL|ADC_CCR_DDS_Msk|macro|ADC_CCR_DDS_Msk
DECL|ADC_CCR_DDS_Pos|macro|ADC_CCR_DDS_Pos
DECL|ADC_CCR_DDS|macro|ADC_CCR_DDS
DECL|ADC_CCR_DELAY_0|macro|ADC_CCR_DELAY_0
DECL|ADC_CCR_DELAY_1|macro|ADC_CCR_DELAY_1
DECL|ADC_CCR_DELAY_2|macro|ADC_CCR_DELAY_2
DECL|ADC_CCR_DELAY_3|macro|ADC_CCR_DELAY_3
DECL|ADC_CCR_DELAY_Msk|macro|ADC_CCR_DELAY_Msk
DECL|ADC_CCR_DELAY_Pos|macro|ADC_CCR_DELAY_Pos
DECL|ADC_CCR_DELAY|macro|ADC_CCR_DELAY
DECL|ADC_CCR_DMA_0|macro|ADC_CCR_DMA_0
DECL|ADC_CCR_DMA_1|macro|ADC_CCR_DMA_1
DECL|ADC_CCR_DMA_Msk|macro|ADC_CCR_DMA_Msk
DECL|ADC_CCR_DMA_Pos|macro|ADC_CCR_DMA_Pos
DECL|ADC_CCR_DMA|macro|ADC_CCR_DMA
DECL|ADC_CCR_MULTI_0|macro|ADC_CCR_MULTI_0
DECL|ADC_CCR_MULTI_1|macro|ADC_CCR_MULTI_1
DECL|ADC_CCR_MULTI_2|macro|ADC_CCR_MULTI_2
DECL|ADC_CCR_MULTI_3|macro|ADC_CCR_MULTI_3
DECL|ADC_CCR_MULTI_4|macro|ADC_CCR_MULTI_4
DECL|ADC_CCR_MULTI_Msk|macro|ADC_CCR_MULTI_Msk
DECL|ADC_CCR_MULTI_Pos|macro|ADC_CCR_MULTI_Pos
DECL|ADC_CCR_MULTI|macro|ADC_CCR_MULTI
DECL|ADC_CCR_TSVREFE_Msk|macro|ADC_CCR_TSVREFE_Msk
DECL|ADC_CCR_TSVREFE_Pos|macro|ADC_CCR_TSVREFE_Pos
DECL|ADC_CCR_TSVREFE|macro|ADC_CCR_TSVREFE
DECL|ADC_CCR_VBATE_Msk|macro|ADC_CCR_VBATE_Msk
DECL|ADC_CCR_VBATE_Pos|macro|ADC_CCR_VBATE_Pos
DECL|ADC_CCR_VBATE|macro|ADC_CCR_VBATE
DECL|ADC_CDR_DATA1_Msk|macro|ADC_CDR_DATA1_Msk
DECL|ADC_CDR_DATA1_Pos|macro|ADC_CDR_DATA1_Pos
DECL|ADC_CDR_DATA1|macro|ADC_CDR_DATA1
DECL|ADC_CDR_DATA2_Msk|macro|ADC_CDR_DATA2_Msk
DECL|ADC_CDR_DATA2_Pos|macro|ADC_CDR_DATA2_Pos
DECL|ADC_CDR_DATA2|macro|ADC_CDR_DATA2
DECL|ADC_CDR_RDATA_MST|macro|ADC_CDR_RDATA_MST
DECL|ADC_CDR_RDATA_SLV|macro|ADC_CDR_RDATA_SLV
DECL|ADC_CR1_AWDCH_0|macro|ADC_CR1_AWDCH_0
DECL|ADC_CR1_AWDCH_1|macro|ADC_CR1_AWDCH_1
DECL|ADC_CR1_AWDCH_2|macro|ADC_CR1_AWDCH_2
DECL|ADC_CR1_AWDCH_3|macro|ADC_CR1_AWDCH_3
DECL|ADC_CR1_AWDCH_4|macro|ADC_CR1_AWDCH_4
DECL|ADC_CR1_AWDCH_Msk|macro|ADC_CR1_AWDCH_Msk
DECL|ADC_CR1_AWDCH_Pos|macro|ADC_CR1_AWDCH_Pos
DECL|ADC_CR1_AWDCH|macro|ADC_CR1_AWDCH
DECL|ADC_CR1_AWDEN_Msk|macro|ADC_CR1_AWDEN_Msk
DECL|ADC_CR1_AWDEN_Pos|macro|ADC_CR1_AWDEN_Pos
DECL|ADC_CR1_AWDEN|macro|ADC_CR1_AWDEN
DECL|ADC_CR1_AWDIE_Msk|macro|ADC_CR1_AWDIE_Msk
DECL|ADC_CR1_AWDIE_Pos|macro|ADC_CR1_AWDIE_Pos
DECL|ADC_CR1_AWDIE|macro|ADC_CR1_AWDIE
DECL|ADC_CR1_AWDSGL_Msk|macro|ADC_CR1_AWDSGL_Msk
DECL|ADC_CR1_AWDSGL_Pos|macro|ADC_CR1_AWDSGL_Pos
DECL|ADC_CR1_AWDSGL|macro|ADC_CR1_AWDSGL
DECL|ADC_CR1_DISCEN_Msk|macro|ADC_CR1_DISCEN_Msk
DECL|ADC_CR1_DISCEN_Pos|macro|ADC_CR1_DISCEN_Pos
DECL|ADC_CR1_DISCEN|macro|ADC_CR1_DISCEN
DECL|ADC_CR1_DISCNUM_0|macro|ADC_CR1_DISCNUM_0
DECL|ADC_CR1_DISCNUM_1|macro|ADC_CR1_DISCNUM_1
DECL|ADC_CR1_DISCNUM_2|macro|ADC_CR1_DISCNUM_2
DECL|ADC_CR1_DISCNUM_Msk|macro|ADC_CR1_DISCNUM_Msk
DECL|ADC_CR1_DISCNUM_Pos|macro|ADC_CR1_DISCNUM_Pos
DECL|ADC_CR1_DISCNUM|macro|ADC_CR1_DISCNUM
DECL|ADC_CR1_EOCIE_Msk|macro|ADC_CR1_EOCIE_Msk
DECL|ADC_CR1_EOCIE_Pos|macro|ADC_CR1_EOCIE_Pos
DECL|ADC_CR1_EOCIE|macro|ADC_CR1_EOCIE
DECL|ADC_CR1_JAUTO_Msk|macro|ADC_CR1_JAUTO_Msk
DECL|ADC_CR1_JAUTO_Pos|macro|ADC_CR1_JAUTO_Pos
DECL|ADC_CR1_JAUTO|macro|ADC_CR1_JAUTO
DECL|ADC_CR1_JAWDEN_Msk|macro|ADC_CR1_JAWDEN_Msk
DECL|ADC_CR1_JAWDEN_Pos|macro|ADC_CR1_JAWDEN_Pos
DECL|ADC_CR1_JAWDEN|macro|ADC_CR1_JAWDEN
DECL|ADC_CR1_JDISCEN_Msk|macro|ADC_CR1_JDISCEN_Msk
DECL|ADC_CR1_JDISCEN_Pos|macro|ADC_CR1_JDISCEN_Pos
DECL|ADC_CR1_JDISCEN|macro|ADC_CR1_JDISCEN
DECL|ADC_CR1_JEOCIE_Msk|macro|ADC_CR1_JEOCIE_Msk
DECL|ADC_CR1_JEOCIE_Pos|macro|ADC_CR1_JEOCIE_Pos
DECL|ADC_CR1_JEOCIE|macro|ADC_CR1_JEOCIE
DECL|ADC_CR1_OVRIE_Msk|macro|ADC_CR1_OVRIE_Msk
DECL|ADC_CR1_OVRIE_Pos|macro|ADC_CR1_OVRIE_Pos
DECL|ADC_CR1_OVRIE|macro|ADC_CR1_OVRIE
DECL|ADC_CR1_RES_0|macro|ADC_CR1_RES_0
DECL|ADC_CR1_RES_1|macro|ADC_CR1_RES_1
DECL|ADC_CR1_RES_Msk|macro|ADC_CR1_RES_Msk
DECL|ADC_CR1_RES_Pos|macro|ADC_CR1_RES_Pos
DECL|ADC_CR1_RES|macro|ADC_CR1_RES
DECL|ADC_CR1_SCAN_Msk|macro|ADC_CR1_SCAN_Msk
DECL|ADC_CR1_SCAN_Pos|macro|ADC_CR1_SCAN_Pos
DECL|ADC_CR1_SCAN|macro|ADC_CR1_SCAN
DECL|ADC_CR2_ADON_Msk|macro|ADC_CR2_ADON_Msk
DECL|ADC_CR2_ADON_Pos|macro|ADC_CR2_ADON_Pos
DECL|ADC_CR2_ADON|macro|ADC_CR2_ADON
DECL|ADC_CR2_ALIGN_Msk|macro|ADC_CR2_ALIGN_Msk
DECL|ADC_CR2_ALIGN_Pos|macro|ADC_CR2_ALIGN_Pos
DECL|ADC_CR2_ALIGN|macro|ADC_CR2_ALIGN
DECL|ADC_CR2_CONT_Msk|macro|ADC_CR2_CONT_Msk
DECL|ADC_CR2_CONT_Pos|macro|ADC_CR2_CONT_Pos
DECL|ADC_CR2_CONT|macro|ADC_CR2_CONT
DECL|ADC_CR2_DDS_Msk|macro|ADC_CR2_DDS_Msk
DECL|ADC_CR2_DDS_Pos|macro|ADC_CR2_DDS_Pos
DECL|ADC_CR2_DDS|macro|ADC_CR2_DDS
DECL|ADC_CR2_DMA_Msk|macro|ADC_CR2_DMA_Msk
DECL|ADC_CR2_DMA_Pos|macro|ADC_CR2_DMA_Pos
DECL|ADC_CR2_DMA|macro|ADC_CR2_DMA
DECL|ADC_CR2_EOCS_Msk|macro|ADC_CR2_EOCS_Msk
DECL|ADC_CR2_EOCS_Pos|macro|ADC_CR2_EOCS_Pos
DECL|ADC_CR2_EOCS|macro|ADC_CR2_EOCS
DECL|ADC_CR2_EXTEN_0|macro|ADC_CR2_EXTEN_0
DECL|ADC_CR2_EXTEN_1|macro|ADC_CR2_EXTEN_1
DECL|ADC_CR2_EXTEN_Msk|macro|ADC_CR2_EXTEN_Msk
DECL|ADC_CR2_EXTEN_Pos|macro|ADC_CR2_EXTEN_Pos
DECL|ADC_CR2_EXTEN|macro|ADC_CR2_EXTEN
DECL|ADC_CR2_EXTSEL_0|macro|ADC_CR2_EXTSEL_0
DECL|ADC_CR2_EXTSEL_1|macro|ADC_CR2_EXTSEL_1
DECL|ADC_CR2_EXTSEL_2|macro|ADC_CR2_EXTSEL_2
DECL|ADC_CR2_EXTSEL_3|macro|ADC_CR2_EXTSEL_3
DECL|ADC_CR2_EXTSEL_Msk|macro|ADC_CR2_EXTSEL_Msk
DECL|ADC_CR2_EXTSEL_Pos|macro|ADC_CR2_EXTSEL_Pos
DECL|ADC_CR2_EXTSEL|macro|ADC_CR2_EXTSEL
DECL|ADC_CR2_JEXTEN_0|macro|ADC_CR2_JEXTEN_0
DECL|ADC_CR2_JEXTEN_1|macro|ADC_CR2_JEXTEN_1
DECL|ADC_CR2_JEXTEN_Msk|macro|ADC_CR2_JEXTEN_Msk
DECL|ADC_CR2_JEXTEN_Pos|macro|ADC_CR2_JEXTEN_Pos
DECL|ADC_CR2_JEXTEN|macro|ADC_CR2_JEXTEN
DECL|ADC_CR2_JEXTSEL_0|macro|ADC_CR2_JEXTSEL_0
DECL|ADC_CR2_JEXTSEL_1|macro|ADC_CR2_JEXTSEL_1
DECL|ADC_CR2_JEXTSEL_2|macro|ADC_CR2_JEXTSEL_2
DECL|ADC_CR2_JEXTSEL_3|macro|ADC_CR2_JEXTSEL_3
DECL|ADC_CR2_JEXTSEL_Msk|macro|ADC_CR2_JEXTSEL_Msk
DECL|ADC_CR2_JEXTSEL_Pos|macro|ADC_CR2_JEXTSEL_Pos
DECL|ADC_CR2_JEXTSEL|macro|ADC_CR2_JEXTSEL
DECL|ADC_CR2_JSWSTART_Msk|macro|ADC_CR2_JSWSTART_Msk
DECL|ADC_CR2_JSWSTART_Pos|macro|ADC_CR2_JSWSTART_Pos
DECL|ADC_CR2_JSWSTART|macro|ADC_CR2_JSWSTART
DECL|ADC_CR2_SWSTART_Msk|macro|ADC_CR2_SWSTART_Msk
DECL|ADC_CR2_SWSTART_Pos|macro|ADC_CR2_SWSTART_Pos
DECL|ADC_CR2_SWSTART|macro|ADC_CR2_SWSTART
DECL|ADC_CSR_AWD1_Msk|macro|ADC_CSR_AWD1_Msk
DECL|ADC_CSR_AWD1_Pos|macro|ADC_CSR_AWD1_Pos
DECL|ADC_CSR_AWD1|macro|ADC_CSR_AWD1
DECL|ADC_CSR_AWD2_Msk|macro|ADC_CSR_AWD2_Msk
DECL|ADC_CSR_AWD2_Pos|macro|ADC_CSR_AWD2_Pos
DECL|ADC_CSR_AWD2|macro|ADC_CSR_AWD2
DECL|ADC_CSR_AWD3_Msk|macro|ADC_CSR_AWD3_Msk
DECL|ADC_CSR_AWD3_Pos|macro|ADC_CSR_AWD3_Pos
DECL|ADC_CSR_AWD3|macro|ADC_CSR_AWD3
DECL|ADC_CSR_DOVR1|macro|ADC_CSR_DOVR1
DECL|ADC_CSR_DOVR2|macro|ADC_CSR_DOVR2
DECL|ADC_CSR_DOVR3|macro|ADC_CSR_DOVR3
DECL|ADC_CSR_EOC1_Msk|macro|ADC_CSR_EOC1_Msk
DECL|ADC_CSR_EOC1_Pos|macro|ADC_CSR_EOC1_Pos
DECL|ADC_CSR_EOC1|macro|ADC_CSR_EOC1
DECL|ADC_CSR_EOC2_Msk|macro|ADC_CSR_EOC2_Msk
DECL|ADC_CSR_EOC2_Pos|macro|ADC_CSR_EOC2_Pos
DECL|ADC_CSR_EOC2|macro|ADC_CSR_EOC2
DECL|ADC_CSR_EOC3_Msk|macro|ADC_CSR_EOC3_Msk
DECL|ADC_CSR_EOC3_Pos|macro|ADC_CSR_EOC3_Pos
DECL|ADC_CSR_EOC3|macro|ADC_CSR_EOC3
DECL|ADC_CSR_JEOC1_Msk|macro|ADC_CSR_JEOC1_Msk
DECL|ADC_CSR_JEOC1_Pos|macro|ADC_CSR_JEOC1_Pos
DECL|ADC_CSR_JEOC1|macro|ADC_CSR_JEOC1
DECL|ADC_CSR_JEOC2_Msk|macro|ADC_CSR_JEOC2_Msk
DECL|ADC_CSR_JEOC2_Pos|macro|ADC_CSR_JEOC2_Pos
DECL|ADC_CSR_JEOC2|macro|ADC_CSR_JEOC2
DECL|ADC_CSR_JEOC3_Msk|macro|ADC_CSR_JEOC3_Msk
DECL|ADC_CSR_JEOC3_Pos|macro|ADC_CSR_JEOC3_Pos
DECL|ADC_CSR_JEOC3|macro|ADC_CSR_JEOC3
DECL|ADC_CSR_JSTRT1_Msk|macro|ADC_CSR_JSTRT1_Msk
DECL|ADC_CSR_JSTRT1_Pos|macro|ADC_CSR_JSTRT1_Pos
DECL|ADC_CSR_JSTRT1|macro|ADC_CSR_JSTRT1
DECL|ADC_CSR_JSTRT2_Msk|macro|ADC_CSR_JSTRT2_Msk
DECL|ADC_CSR_JSTRT2_Pos|macro|ADC_CSR_JSTRT2_Pos
DECL|ADC_CSR_JSTRT2|macro|ADC_CSR_JSTRT2
DECL|ADC_CSR_JSTRT3_Msk|macro|ADC_CSR_JSTRT3_Msk
DECL|ADC_CSR_JSTRT3_Pos|macro|ADC_CSR_JSTRT3_Pos
DECL|ADC_CSR_JSTRT3|macro|ADC_CSR_JSTRT3
DECL|ADC_CSR_OVR1_Msk|macro|ADC_CSR_OVR1_Msk
DECL|ADC_CSR_OVR1_Pos|macro|ADC_CSR_OVR1_Pos
DECL|ADC_CSR_OVR1|macro|ADC_CSR_OVR1
DECL|ADC_CSR_OVR2_Msk|macro|ADC_CSR_OVR2_Msk
DECL|ADC_CSR_OVR2_Pos|macro|ADC_CSR_OVR2_Pos
DECL|ADC_CSR_OVR2|macro|ADC_CSR_OVR2
DECL|ADC_CSR_OVR3_Msk|macro|ADC_CSR_OVR3_Msk
DECL|ADC_CSR_OVR3_Pos|macro|ADC_CSR_OVR3_Pos
DECL|ADC_CSR_OVR3|macro|ADC_CSR_OVR3
DECL|ADC_CSR_STRT1_Msk|macro|ADC_CSR_STRT1_Msk
DECL|ADC_CSR_STRT1_Pos|macro|ADC_CSR_STRT1_Pos
DECL|ADC_CSR_STRT1|macro|ADC_CSR_STRT1
DECL|ADC_CSR_STRT2_Msk|macro|ADC_CSR_STRT2_Msk
DECL|ADC_CSR_STRT2_Pos|macro|ADC_CSR_STRT2_Pos
DECL|ADC_CSR_STRT2|macro|ADC_CSR_STRT2
DECL|ADC_CSR_STRT3_Msk|macro|ADC_CSR_STRT3_Msk
DECL|ADC_CSR_STRT3_Pos|macro|ADC_CSR_STRT3_Pos
DECL|ADC_CSR_STRT3|macro|ADC_CSR_STRT3
DECL|ADC_Common_TypeDef|typedef|} ADC_Common_TypeDef;
DECL|ADC_DR_ADC2DATA_Msk|macro|ADC_DR_ADC2DATA_Msk
DECL|ADC_DR_ADC2DATA_Pos|macro|ADC_DR_ADC2DATA_Pos
DECL|ADC_DR_ADC2DATA|macro|ADC_DR_ADC2DATA
DECL|ADC_DR_DATA_Msk|macro|ADC_DR_DATA_Msk
DECL|ADC_DR_DATA_Pos|macro|ADC_DR_DATA_Pos
DECL|ADC_DR_DATA|macro|ADC_DR_DATA
DECL|ADC_HTR_HT_Msk|macro|ADC_HTR_HT_Msk
DECL|ADC_HTR_HT_Pos|macro|ADC_HTR_HT_Pos
DECL|ADC_HTR_HT|macro|ADC_HTR_HT
DECL|ADC_IRQn|enumerator|ADC_IRQn = 18, /*!< ADC1, ADC2 and ADC3 global Interrupts */
DECL|ADC_JDR1_JDATA|macro|ADC_JDR1_JDATA
DECL|ADC_JDR2_JDATA|macro|ADC_JDR2_JDATA
DECL|ADC_JDR3_JDATA|macro|ADC_JDR3_JDATA
DECL|ADC_JDR4_JDATA|macro|ADC_JDR4_JDATA
DECL|ADC_JOFR1_JOFFSET1_Msk|macro|ADC_JOFR1_JOFFSET1_Msk
DECL|ADC_JOFR1_JOFFSET1_Pos|macro|ADC_JOFR1_JOFFSET1_Pos
DECL|ADC_JOFR1_JOFFSET1|macro|ADC_JOFR1_JOFFSET1
DECL|ADC_JOFR2_JOFFSET2_Msk|macro|ADC_JOFR2_JOFFSET2_Msk
DECL|ADC_JOFR2_JOFFSET2_Pos|macro|ADC_JOFR2_JOFFSET2_Pos
DECL|ADC_JOFR2_JOFFSET2|macro|ADC_JOFR2_JOFFSET2
DECL|ADC_JOFR3_JOFFSET3_Msk|macro|ADC_JOFR3_JOFFSET3_Msk
DECL|ADC_JOFR3_JOFFSET3_Pos|macro|ADC_JOFR3_JOFFSET3_Pos
DECL|ADC_JOFR3_JOFFSET3|macro|ADC_JOFR3_JOFFSET3
DECL|ADC_JOFR4_JOFFSET4_Msk|macro|ADC_JOFR4_JOFFSET4_Msk
DECL|ADC_JOFR4_JOFFSET4_Pos|macro|ADC_JOFR4_JOFFSET4_Pos
DECL|ADC_JOFR4_JOFFSET4|macro|ADC_JOFR4_JOFFSET4
DECL|ADC_JSQR_JL_0|macro|ADC_JSQR_JL_0
DECL|ADC_JSQR_JL_1|macro|ADC_JSQR_JL_1
DECL|ADC_JSQR_JL_Msk|macro|ADC_JSQR_JL_Msk
DECL|ADC_JSQR_JL_Pos|macro|ADC_JSQR_JL_Pos
DECL|ADC_JSQR_JL|macro|ADC_JSQR_JL
DECL|ADC_JSQR_JSQ1_0|macro|ADC_JSQR_JSQ1_0
DECL|ADC_JSQR_JSQ1_1|macro|ADC_JSQR_JSQ1_1
DECL|ADC_JSQR_JSQ1_2|macro|ADC_JSQR_JSQ1_2
DECL|ADC_JSQR_JSQ1_3|macro|ADC_JSQR_JSQ1_3
DECL|ADC_JSQR_JSQ1_4|macro|ADC_JSQR_JSQ1_4
DECL|ADC_JSQR_JSQ1_Msk|macro|ADC_JSQR_JSQ1_Msk
DECL|ADC_JSQR_JSQ1_Pos|macro|ADC_JSQR_JSQ1_Pos
DECL|ADC_JSQR_JSQ1|macro|ADC_JSQR_JSQ1
DECL|ADC_JSQR_JSQ2_0|macro|ADC_JSQR_JSQ2_0
DECL|ADC_JSQR_JSQ2_1|macro|ADC_JSQR_JSQ2_1
DECL|ADC_JSQR_JSQ2_2|macro|ADC_JSQR_JSQ2_2
DECL|ADC_JSQR_JSQ2_3|macro|ADC_JSQR_JSQ2_3
DECL|ADC_JSQR_JSQ2_4|macro|ADC_JSQR_JSQ2_4
DECL|ADC_JSQR_JSQ2_Msk|macro|ADC_JSQR_JSQ2_Msk
DECL|ADC_JSQR_JSQ2_Pos|macro|ADC_JSQR_JSQ2_Pos
DECL|ADC_JSQR_JSQ2|macro|ADC_JSQR_JSQ2
DECL|ADC_JSQR_JSQ3_0|macro|ADC_JSQR_JSQ3_0
DECL|ADC_JSQR_JSQ3_1|macro|ADC_JSQR_JSQ3_1
DECL|ADC_JSQR_JSQ3_2|macro|ADC_JSQR_JSQ3_2
DECL|ADC_JSQR_JSQ3_3|macro|ADC_JSQR_JSQ3_3
DECL|ADC_JSQR_JSQ3_4|macro|ADC_JSQR_JSQ3_4
DECL|ADC_JSQR_JSQ3_Msk|macro|ADC_JSQR_JSQ3_Msk
DECL|ADC_JSQR_JSQ3_Pos|macro|ADC_JSQR_JSQ3_Pos
DECL|ADC_JSQR_JSQ3|macro|ADC_JSQR_JSQ3
DECL|ADC_JSQR_JSQ4_0|macro|ADC_JSQR_JSQ4_0
DECL|ADC_JSQR_JSQ4_1|macro|ADC_JSQR_JSQ4_1
DECL|ADC_JSQR_JSQ4_2|macro|ADC_JSQR_JSQ4_2
DECL|ADC_JSQR_JSQ4_3|macro|ADC_JSQR_JSQ4_3
DECL|ADC_JSQR_JSQ4_4|macro|ADC_JSQR_JSQ4_4
DECL|ADC_JSQR_JSQ4_Msk|macro|ADC_JSQR_JSQ4_Msk
DECL|ADC_JSQR_JSQ4_Pos|macro|ADC_JSQR_JSQ4_Pos
DECL|ADC_JSQR_JSQ4|macro|ADC_JSQR_JSQ4
DECL|ADC_LTR_LT_Msk|macro|ADC_LTR_LT_Msk
DECL|ADC_LTR_LT_Pos|macro|ADC_LTR_LT_Pos
DECL|ADC_LTR_LT|macro|ADC_LTR_LT
DECL|ADC_SMPR1_SMP10_0|macro|ADC_SMPR1_SMP10_0
DECL|ADC_SMPR1_SMP10_1|macro|ADC_SMPR1_SMP10_1
DECL|ADC_SMPR1_SMP10_2|macro|ADC_SMPR1_SMP10_2
DECL|ADC_SMPR1_SMP10_Msk|macro|ADC_SMPR1_SMP10_Msk
DECL|ADC_SMPR1_SMP10_Pos|macro|ADC_SMPR1_SMP10_Pos
DECL|ADC_SMPR1_SMP10|macro|ADC_SMPR1_SMP10
DECL|ADC_SMPR1_SMP11_0|macro|ADC_SMPR1_SMP11_0
DECL|ADC_SMPR1_SMP11_1|macro|ADC_SMPR1_SMP11_1
DECL|ADC_SMPR1_SMP11_2|macro|ADC_SMPR1_SMP11_2
DECL|ADC_SMPR1_SMP11_Msk|macro|ADC_SMPR1_SMP11_Msk
DECL|ADC_SMPR1_SMP11_Pos|macro|ADC_SMPR1_SMP11_Pos
DECL|ADC_SMPR1_SMP11|macro|ADC_SMPR1_SMP11
DECL|ADC_SMPR1_SMP12_0|macro|ADC_SMPR1_SMP12_0
DECL|ADC_SMPR1_SMP12_1|macro|ADC_SMPR1_SMP12_1
DECL|ADC_SMPR1_SMP12_2|macro|ADC_SMPR1_SMP12_2
DECL|ADC_SMPR1_SMP12_Msk|macro|ADC_SMPR1_SMP12_Msk
DECL|ADC_SMPR1_SMP12_Pos|macro|ADC_SMPR1_SMP12_Pos
DECL|ADC_SMPR1_SMP12|macro|ADC_SMPR1_SMP12
DECL|ADC_SMPR1_SMP13_0|macro|ADC_SMPR1_SMP13_0
DECL|ADC_SMPR1_SMP13_1|macro|ADC_SMPR1_SMP13_1
DECL|ADC_SMPR1_SMP13_2|macro|ADC_SMPR1_SMP13_2
DECL|ADC_SMPR1_SMP13_Msk|macro|ADC_SMPR1_SMP13_Msk
DECL|ADC_SMPR1_SMP13_Pos|macro|ADC_SMPR1_SMP13_Pos
DECL|ADC_SMPR1_SMP13|macro|ADC_SMPR1_SMP13
DECL|ADC_SMPR1_SMP14_0|macro|ADC_SMPR1_SMP14_0
DECL|ADC_SMPR1_SMP14_1|macro|ADC_SMPR1_SMP14_1
DECL|ADC_SMPR1_SMP14_2|macro|ADC_SMPR1_SMP14_2
DECL|ADC_SMPR1_SMP14_Msk|macro|ADC_SMPR1_SMP14_Msk
DECL|ADC_SMPR1_SMP14_Pos|macro|ADC_SMPR1_SMP14_Pos
DECL|ADC_SMPR1_SMP14|macro|ADC_SMPR1_SMP14
DECL|ADC_SMPR1_SMP15_0|macro|ADC_SMPR1_SMP15_0
DECL|ADC_SMPR1_SMP15_1|macro|ADC_SMPR1_SMP15_1
DECL|ADC_SMPR1_SMP15_2|macro|ADC_SMPR1_SMP15_2
DECL|ADC_SMPR1_SMP15_Msk|macro|ADC_SMPR1_SMP15_Msk
DECL|ADC_SMPR1_SMP15_Pos|macro|ADC_SMPR1_SMP15_Pos
DECL|ADC_SMPR1_SMP15|macro|ADC_SMPR1_SMP15
DECL|ADC_SMPR1_SMP16_0|macro|ADC_SMPR1_SMP16_0
DECL|ADC_SMPR1_SMP16_1|macro|ADC_SMPR1_SMP16_1
DECL|ADC_SMPR1_SMP16_2|macro|ADC_SMPR1_SMP16_2
DECL|ADC_SMPR1_SMP16_Msk|macro|ADC_SMPR1_SMP16_Msk
DECL|ADC_SMPR1_SMP16_Pos|macro|ADC_SMPR1_SMP16_Pos
DECL|ADC_SMPR1_SMP16|macro|ADC_SMPR1_SMP16
DECL|ADC_SMPR1_SMP17_0|macro|ADC_SMPR1_SMP17_0
DECL|ADC_SMPR1_SMP17_1|macro|ADC_SMPR1_SMP17_1
DECL|ADC_SMPR1_SMP17_2|macro|ADC_SMPR1_SMP17_2
DECL|ADC_SMPR1_SMP17_Msk|macro|ADC_SMPR1_SMP17_Msk
DECL|ADC_SMPR1_SMP17_Pos|macro|ADC_SMPR1_SMP17_Pos
DECL|ADC_SMPR1_SMP17|macro|ADC_SMPR1_SMP17
DECL|ADC_SMPR1_SMP18_0|macro|ADC_SMPR1_SMP18_0
DECL|ADC_SMPR1_SMP18_1|macro|ADC_SMPR1_SMP18_1
DECL|ADC_SMPR1_SMP18_2|macro|ADC_SMPR1_SMP18_2
DECL|ADC_SMPR1_SMP18_Msk|macro|ADC_SMPR1_SMP18_Msk
DECL|ADC_SMPR1_SMP18_Pos|macro|ADC_SMPR1_SMP18_Pos
DECL|ADC_SMPR1_SMP18|macro|ADC_SMPR1_SMP18
DECL|ADC_SMPR2_SMP0_0|macro|ADC_SMPR2_SMP0_0
DECL|ADC_SMPR2_SMP0_1|macro|ADC_SMPR2_SMP0_1
DECL|ADC_SMPR2_SMP0_2|macro|ADC_SMPR2_SMP0_2
DECL|ADC_SMPR2_SMP0_Msk|macro|ADC_SMPR2_SMP0_Msk
DECL|ADC_SMPR2_SMP0_Pos|macro|ADC_SMPR2_SMP0_Pos
DECL|ADC_SMPR2_SMP0|macro|ADC_SMPR2_SMP0
DECL|ADC_SMPR2_SMP1_0|macro|ADC_SMPR2_SMP1_0
DECL|ADC_SMPR2_SMP1_1|macro|ADC_SMPR2_SMP1_1
DECL|ADC_SMPR2_SMP1_2|macro|ADC_SMPR2_SMP1_2
DECL|ADC_SMPR2_SMP1_Msk|macro|ADC_SMPR2_SMP1_Msk
DECL|ADC_SMPR2_SMP1_Pos|macro|ADC_SMPR2_SMP1_Pos
DECL|ADC_SMPR2_SMP1|macro|ADC_SMPR2_SMP1
DECL|ADC_SMPR2_SMP2_0|macro|ADC_SMPR2_SMP2_0
DECL|ADC_SMPR2_SMP2_1|macro|ADC_SMPR2_SMP2_1
DECL|ADC_SMPR2_SMP2_2|macro|ADC_SMPR2_SMP2_2
DECL|ADC_SMPR2_SMP2_Msk|macro|ADC_SMPR2_SMP2_Msk
DECL|ADC_SMPR2_SMP2_Pos|macro|ADC_SMPR2_SMP2_Pos
DECL|ADC_SMPR2_SMP2|macro|ADC_SMPR2_SMP2
DECL|ADC_SMPR2_SMP3_0|macro|ADC_SMPR2_SMP3_0
DECL|ADC_SMPR2_SMP3_1|macro|ADC_SMPR2_SMP3_1
DECL|ADC_SMPR2_SMP3_2|macro|ADC_SMPR2_SMP3_2
DECL|ADC_SMPR2_SMP3_Msk|macro|ADC_SMPR2_SMP3_Msk
DECL|ADC_SMPR2_SMP3_Pos|macro|ADC_SMPR2_SMP3_Pos
DECL|ADC_SMPR2_SMP3|macro|ADC_SMPR2_SMP3
DECL|ADC_SMPR2_SMP4_0|macro|ADC_SMPR2_SMP4_0
DECL|ADC_SMPR2_SMP4_1|macro|ADC_SMPR2_SMP4_1
DECL|ADC_SMPR2_SMP4_2|macro|ADC_SMPR2_SMP4_2
DECL|ADC_SMPR2_SMP4_Msk|macro|ADC_SMPR2_SMP4_Msk
DECL|ADC_SMPR2_SMP4_Pos|macro|ADC_SMPR2_SMP4_Pos
DECL|ADC_SMPR2_SMP4|macro|ADC_SMPR2_SMP4
DECL|ADC_SMPR2_SMP5_0|macro|ADC_SMPR2_SMP5_0
DECL|ADC_SMPR2_SMP5_1|macro|ADC_SMPR2_SMP5_1
DECL|ADC_SMPR2_SMP5_2|macro|ADC_SMPR2_SMP5_2
DECL|ADC_SMPR2_SMP5_Msk|macro|ADC_SMPR2_SMP5_Msk
DECL|ADC_SMPR2_SMP5_Pos|macro|ADC_SMPR2_SMP5_Pos
DECL|ADC_SMPR2_SMP5|macro|ADC_SMPR2_SMP5
DECL|ADC_SMPR2_SMP6_0|macro|ADC_SMPR2_SMP6_0
DECL|ADC_SMPR2_SMP6_1|macro|ADC_SMPR2_SMP6_1
DECL|ADC_SMPR2_SMP6_2|macro|ADC_SMPR2_SMP6_2
DECL|ADC_SMPR2_SMP6_Msk|macro|ADC_SMPR2_SMP6_Msk
DECL|ADC_SMPR2_SMP6_Pos|macro|ADC_SMPR2_SMP6_Pos
DECL|ADC_SMPR2_SMP6|macro|ADC_SMPR2_SMP6
DECL|ADC_SMPR2_SMP7_0|macro|ADC_SMPR2_SMP7_0
DECL|ADC_SMPR2_SMP7_1|macro|ADC_SMPR2_SMP7_1
DECL|ADC_SMPR2_SMP7_2|macro|ADC_SMPR2_SMP7_2
DECL|ADC_SMPR2_SMP7_Msk|macro|ADC_SMPR2_SMP7_Msk
DECL|ADC_SMPR2_SMP7_Pos|macro|ADC_SMPR2_SMP7_Pos
DECL|ADC_SMPR2_SMP7|macro|ADC_SMPR2_SMP7
DECL|ADC_SMPR2_SMP8_0|macro|ADC_SMPR2_SMP8_0
DECL|ADC_SMPR2_SMP8_1|macro|ADC_SMPR2_SMP8_1
DECL|ADC_SMPR2_SMP8_2|macro|ADC_SMPR2_SMP8_2
DECL|ADC_SMPR2_SMP8_Msk|macro|ADC_SMPR2_SMP8_Msk
DECL|ADC_SMPR2_SMP8_Pos|macro|ADC_SMPR2_SMP8_Pos
DECL|ADC_SMPR2_SMP8|macro|ADC_SMPR2_SMP8
DECL|ADC_SMPR2_SMP9_0|macro|ADC_SMPR2_SMP9_0
DECL|ADC_SMPR2_SMP9_1|macro|ADC_SMPR2_SMP9_1
DECL|ADC_SMPR2_SMP9_2|macro|ADC_SMPR2_SMP9_2
DECL|ADC_SMPR2_SMP9_Msk|macro|ADC_SMPR2_SMP9_Msk
DECL|ADC_SMPR2_SMP9_Pos|macro|ADC_SMPR2_SMP9_Pos
DECL|ADC_SMPR2_SMP9|macro|ADC_SMPR2_SMP9
DECL|ADC_SQR1_L_0|macro|ADC_SQR1_L_0
DECL|ADC_SQR1_L_1|macro|ADC_SQR1_L_1
DECL|ADC_SQR1_L_2|macro|ADC_SQR1_L_2
DECL|ADC_SQR1_L_3|macro|ADC_SQR1_L_3
DECL|ADC_SQR1_L_Msk|macro|ADC_SQR1_L_Msk
DECL|ADC_SQR1_L_Pos|macro|ADC_SQR1_L_Pos
DECL|ADC_SQR1_L|macro|ADC_SQR1_L
DECL|ADC_SQR1_SQ13_0|macro|ADC_SQR1_SQ13_0
DECL|ADC_SQR1_SQ13_1|macro|ADC_SQR1_SQ13_1
DECL|ADC_SQR1_SQ13_2|macro|ADC_SQR1_SQ13_2
DECL|ADC_SQR1_SQ13_3|macro|ADC_SQR1_SQ13_3
DECL|ADC_SQR1_SQ13_4|macro|ADC_SQR1_SQ13_4
DECL|ADC_SQR1_SQ13_Msk|macro|ADC_SQR1_SQ13_Msk
DECL|ADC_SQR1_SQ13_Pos|macro|ADC_SQR1_SQ13_Pos
DECL|ADC_SQR1_SQ13|macro|ADC_SQR1_SQ13
DECL|ADC_SQR1_SQ14_0|macro|ADC_SQR1_SQ14_0
DECL|ADC_SQR1_SQ14_1|macro|ADC_SQR1_SQ14_1
DECL|ADC_SQR1_SQ14_2|macro|ADC_SQR1_SQ14_2
DECL|ADC_SQR1_SQ14_3|macro|ADC_SQR1_SQ14_3
DECL|ADC_SQR1_SQ14_4|macro|ADC_SQR1_SQ14_4
DECL|ADC_SQR1_SQ14_Msk|macro|ADC_SQR1_SQ14_Msk
DECL|ADC_SQR1_SQ14_Pos|macro|ADC_SQR1_SQ14_Pos
DECL|ADC_SQR1_SQ14|macro|ADC_SQR1_SQ14
DECL|ADC_SQR1_SQ15_0|macro|ADC_SQR1_SQ15_0
DECL|ADC_SQR1_SQ15_1|macro|ADC_SQR1_SQ15_1
DECL|ADC_SQR1_SQ15_2|macro|ADC_SQR1_SQ15_2
DECL|ADC_SQR1_SQ15_3|macro|ADC_SQR1_SQ15_3
DECL|ADC_SQR1_SQ15_4|macro|ADC_SQR1_SQ15_4
DECL|ADC_SQR1_SQ15_Msk|macro|ADC_SQR1_SQ15_Msk
DECL|ADC_SQR1_SQ15_Pos|macro|ADC_SQR1_SQ15_Pos
DECL|ADC_SQR1_SQ15|macro|ADC_SQR1_SQ15
DECL|ADC_SQR1_SQ16_0|macro|ADC_SQR1_SQ16_0
DECL|ADC_SQR1_SQ16_1|macro|ADC_SQR1_SQ16_1
DECL|ADC_SQR1_SQ16_2|macro|ADC_SQR1_SQ16_2
DECL|ADC_SQR1_SQ16_3|macro|ADC_SQR1_SQ16_3
DECL|ADC_SQR1_SQ16_4|macro|ADC_SQR1_SQ16_4
DECL|ADC_SQR1_SQ16_Msk|macro|ADC_SQR1_SQ16_Msk
DECL|ADC_SQR1_SQ16_Pos|macro|ADC_SQR1_SQ16_Pos
DECL|ADC_SQR1_SQ16|macro|ADC_SQR1_SQ16
DECL|ADC_SQR2_SQ10_0|macro|ADC_SQR2_SQ10_0
DECL|ADC_SQR2_SQ10_1|macro|ADC_SQR2_SQ10_1
DECL|ADC_SQR2_SQ10_2|macro|ADC_SQR2_SQ10_2
DECL|ADC_SQR2_SQ10_3|macro|ADC_SQR2_SQ10_3
DECL|ADC_SQR2_SQ10_4|macro|ADC_SQR2_SQ10_4
DECL|ADC_SQR2_SQ10_Msk|macro|ADC_SQR2_SQ10_Msk
DECL|ADC_SQR2_SQ10_Pos|macro|ADC_SQR2_SQ10_Pos
DECL|ADC_SQR2_SQ10|macro|ADC_SQR2_SQ10
DECL|ADC_SQR2_SQ11_0|macro|ADC_SQR2_SQ11_0
DECL|ADC_SQR2_SQ11_1|macro|ADC_SQR2_SQ11_1
DECL|ADC_SQR2_SQ11_2|macro|ADC_SQR2_SQ11_2
DECL|ADC_SQR2_SQ11_3|macro|ADC_SQR2_SQ11_3
DECL|ADC_SQR2_SQ11_4|macro|ADC_SQR2_SQ11_4
DECL|ADC_SQR2_SQ11_Msk|macro|ADC_SQR2_SQ11_Msk
DECL|ADC_SQR2_SQ11_Pos|macro|ADC_SQR2_SQ11_Pos
DECL|ADC_SQR2_SQ11|macro|ADC_SQR2_SQ11
DECL|ADC_SQR2_SQ12_0|macro|ADC_SQR2_SQ12_0
DECL|ADC_SQR2_SQ12_1|macro|ADC_SQR2_SQ12_1
DECL|ADC_SQR2_SQ12_2|macro|ADC_SQR2_SQ12_2
DECL|ADC_SQR2_SQ12_3|macro|ADC_SQR2_SQ12_3
DECL|ADC_SQR2_SQ12_4|macro|ADC_SQR2_SQ12_4
DECL|ADC_SQR2_SQ12_Msk|macro|ADC_SQR2_SQ12_Msk
DECL|ADC_SQR2_SQ12_Pos|macro|ADC_SQR2_SQ12_Pos
DECL|ADC_SQR2_SQ12|macro|ADC_SQR2_SQ12
DECL|ADC_SQR2_SQ7_0|macro|ADC_SQR2_SQ7_0
DECL|ADC_SQR2_SQ7_1|macro|ADC_SQR2_SQ7_1
DECL|ADC_SQR2_SQ7_2|macro|ADC_SQR2_SQ7_2
DECL|ADC_SQR2_SQ7_3|macro|ADC_SQR2_SQ7_3
DECL|ADC_SQR2_SQ7_4|macro|ADC_SQR2_SQ7_4
DECL|ADC_SQR2_SQ7_Msk|macro|ADC_SQR2_SQ7_Msk
DECL|ADC_SQR2_SQ7_Pos|macro|ADC_SQR2_SQ7_Pos
DECL|ADC_SQR2_SQ7|macro|ADC_SQR2_SQ7
DECL|ADC_SQR2_SQ8_0|macro|ADC_SQR2_SQ8_0
DECL|ADC_SQR2_SQ8_1|macro|ADC_SQR2_SQ8_1
DECL|ADC_SQR2_SQ8_2|macro|ADC_SQR2_SQ8_2
DECL|ADC_SQR2_SQ8_3|macro|ADC_SQR2_SQ8_3
DECL|ADC_SQR2_SQ8_4|macro|ADC_SQR2_SQ8_4
DECL|ADC_SQR2_SQ8_Msk|macro|ADC_SQR2_SQ8_Msk
DECL|ADC_SQR2_SQ8_Pos|macro|ADC_SQR2_SQ8_Pos
DECL|ADC_SQR2_SQ8|macro|ADC_SQR2_SQ8
DECL|ADC_SQR2_SQ9_0|macro|ADC_SQR2_SQ9_0
DECL|ADC_SQR2_SQ9_1|macro|ADC_SQR2_SQ9_1
DECL|ADC_SQR2_SQ9_2|macro|ADC_SQR2_SQ9_2
DECL|ADC_SQR2_SQ9_3|macro|ADC_SQR2_SQ9_3
DECL|ADC_SQR2_SQ9_4|macro|ADC_SQR2_SQ9_4
DECL|ADC_SQR2_SQ9_Msk|macro|ADC_SQR2_SQ9_Msk
DECL|ADC_SQR2_SQ9_Pos|macro|ADC_SQR2_SQ9_Pos
DECL|ADC_SQR2_SQ9|macro|ADC_SQR2_SQ9
DECL|ADC_SQR3_SQ1_0|macro|ADC_SQR3_SQ1_0
DECL|ADC_SQR3_SQ1_1|macro|ADC_SQR3_SQ1_1
DECL|ADC_SQR3_SQ1_2|macro|ADC_SQR3_SQ1_2
DECL|ADC_SQR3_SQ1_3|macro|ADC_SQR3_SQ1_3
DECL|ADC_SQR3_SQ1_4|macro|ADC_SQR3_SQ1_4
DECL|ADC_SQR3_SQ1_Msk|macro|ADC_SQR3_SQ1_Msk
DECL|ADC_SQR3_SQ1_Pos|macro|ADC_SQR3_SQ1_Pos
DECL|ADC_SQR3_SQ1|macro|ADC_SQR3_SQ1
DECL|ADC_SQR3_SQ2_0|macro|ADC_SQR3_SQ2_0
DECL|ADC_SQR3_SQ2_1|macro|ADC_SQR3_SQ2_1
DECL|ADC_SQR3_SQ2_2|macro|ADC_SQR3_SQ2_2
DECL|ADC_SQR3_SQ2_3|macro|ADC_SQR3_SQ2_3
DECL|ADC_SQR3_SQ2_4|macro|ADC_SQR3_SQ2_4
DECL|ADC_SQR3_SQ2_Msk|macro|ADC_SQR3_SQ2_Msk
DECL|ADC_SQR3_SQ2_Pos|macro|ADC_SQR3_SQ2_Pos
DECL|ADC_SQR3_SQ2|macro|ADC_SQR3_SQ2
DECL|ADC_SQR3_SQ3_0|macro|ADC_SQR3_SQ3_0
DECL|ADC_SQR3_SQ3_1|macro|ADC_SQR3_SQ3_1
DECL|ADC_SQR3_SQ3_2|macro|ADC_SQR3_SQ3_2
DECL|ADC_SQR3_SQ3_3|macro|ADC_SQR3_SQ3_3
DECL|ADC_SQR3_SQ3_4|macro|ADC_SQR3_SQ3_4
DECL|ADC_SQR3_SQ3_Msk|macro|ADC_SQR3_SQ3_Msk
DECL|ADC_SQR3_SQ3_Pos|macro|ADC_SQR3_SQ3_Pos
DECL|ADC_SQR3_SQ3|macro|ADC_SQR3_SQ3
DECL|ADC_SQR3_SQ4_0|macro|ADC_SQR3_SQ4_0
DECL|ADC_SQR3_SQ4_1|macro|ADC_SQR3_SQ4_1
DECL|ADC_SQR3_SQ4_2|macro|ADC_SQR3_SQ4_2
DECL|ADC_SQR3_SQ4_3|macro|ADC_SQR3_SQ4_3
DECL|ADC_SQR3_SQ4_4|macro|ADC_SQR3_SQ4_4
DECL|ADC_SQR3_SQ4_Msk|macro|ADC_SQR3_SQ4_Msk
DECL|ADC_SQR3_SQ4_Pos|macro|ADC_SQR3_SQ4_Pos
DECL|ADC_SQR3_SQ4|macro|ADC_SQR3_SQ4
DECL|ADC_SQR3_SQ5_0|macro|ADC_SQR3_SQ5_0
DECL|ADC_SQR3_SQ5_1|macro|ADC_SQR3_SQ5_1
DECL|ADC_SQR3_SQ5_2|macro|ADC_SQR3_SQ5_2
DECL|ADC_SQR3_SQ5_3|macro|ADC_SQR3_SQ5_3
DECL|ADC_SQR3_SQ5_4|macro|ADC_SQR3_SQ5_4
DECL|ADC_SQR3_SQ5_Msk|macro|ADC_SQR3_SQ5_Msk
DECL|ADC_SQR3_SQ5_Pos|macro|ADC_SQR3_SQ5_Pos
DECL|ADC_SQR3_SQ5|macro|ADC_SQR3_SQ5
DECL|ADC_SQR3_SQ6_0|macro|ADC_SQR3_SQ6_0
DECL|ADC_SQR3_SQ6_1|macro|ADC_SQR3_SQ6_1
DECL|ADC_SQR3_SQ6_2|macro|ADC_SQR3_SQ6_2
DECL|ADC_SQR3_SQ6_3|macro|ADC_SQR3_SQ6_3
DECL|ADC_SQR3_SQ6_4|macro|ADC_SQR3_SQ6_4
DECL|ADC_SQR3_SQ6_Msk|macro|ADC_SQR3_SQ6_Msk
DECL|ADC_SQR3_SQ6_Pos|macro|ADC_SQR3_SQ6_Pos
DECL|ADC_SQR3_SQ6|macro|ADC_SQR3_SQ6
DECL|ADC_SR_AWD_Msk|macro|ADC_SR_AWD_Msk
DECL|ADC_SR_AWD_Pos|macro|ADC_SR_AWD_Pos
DECL|ADC_SR_AWD|macro|ADC_SR_AWD
DECL|ADC_SR_EOC_Msk|macro|ADC_SR_EOC_Msk
DECL|ADC_SR_EOC_Pos|macro|ADC_SR_EOC_Pos
DECL|ADC_SR_EOC|macro|ADC_SR_EOC
DECL|ADC_SR_JEOC_Msk|macro|ADC_SR_JEOC_Msk
DECL|ADC_SR_JEOC_Pos|macro|ADC_SR_JEOC_Pos
DECL|ADC_SR_JEOC|macro|ADC_SR_JEOC
DECL|ADC_SR_JSTRT_Msk|macro|ADC_SR_JSTRT_Msk
DECL|ADC_SR_JSTRT_Pos|macro|ADC_SR_JSTRT_Pos
DECL|ADC_SR_JSTRT|macro|ADC_SR_JSTRT
DECL|ADC_SR_OVR_Msk|macro|ADC_SR_OVR_Msk
DECL|ADC_SR_OVR_Pos|macro|ADC_SR_OVR_Pos
DECL|ADC_SR_OVR|macro|ADC_SR_OVR
DECL|ADC_SR_STRT_Msk|macro|ADC_SR_STRT_Msk
DECL|ADC_SR_STRT_Pos|macro|ADC_SR_STRT_Pos
DECL|ADC_SR_STRT|macro|ADC_SR_STRT
DECL|ADC_TypeDef|typedef|} ADC_TypeDef;
DECL|ADC|macro|ADC
DECL|AES_BASE|macro|AES_BASE
DECL|AES_CR_CCFC_Msk|macro|AES_CR_CCFC_Msk
DECL|AES_CR_CCFC_Pos|macro|AES_CR_CCFC_Pos
DECL|AES_CR_CCFC|macro|AES_CR_CCFC
DECL|AES_CR_CCFIE_Msk|macro|AES_CR_CCFIE_Msk
DECL|AES_CR_CCFIE_Pos|macro|AES_CR_CCFIE_Pos
DECL|AES_CR_CCFIE|macro|AES_CR_CCFIE
DECL|AES_CR_CHMOD_0|macro|AES_CR_CHMOD_0
DECL|AES_CR_CHMOD_1|macro|AES_CR_CHMOD_1
DECL|AES_CR_CHMOD_2|macro|AES_CR_CHMOD_2
DECL|AES_CR_CHMOD_Msk|macro|AES_CR_CHMOD_Msk
DECL|AES_CR_CHMOD_Pos|macro|AES_CR_CHMOD_Pos
DECL|AES_CR_CHMOD|macro|AES_CR_CHMOD
DECL|AES_CR_DATATYPE_0|macro|AES_CR_DATATYPE_0
DECL|AES_CR_DATATYPE_1|macro|AES_CR_DATATYPE_1
DECL|AES_CR_DATATYPE_Msk|macro|AES_CR_DATATYPE_Msk
DECL|AES_CR_DATATYPE_Pos|macro|AES_CR_DATATYPE_Pos
DECL|AES_CR_DATATYPE|macro|AES_CR_DATATYPE
DECL|AES_CR_DMAINEN_Msk|macro|AES_CR_DMAINEN_Msk
DECL|AES_CR_DMAINEN_Pos|macro|AES_CR_DMAINEN_Pos
DECL|AES_CR_DMAINEN|macro|AES_CR_DMAINEN
DECL|AES_CR_DMAOUTEN_Msk|macro|AES_CR_DMAOUTEN_Msk
DECL|AES_CR_DMAOUTEN_Pos|macro|AES_CR_DMAOUTEN_Pos
DECL|AES_CR_DMAOUTEN|macro|AES_CR_DMAOUTEN
DECL|AES_CR_EN_Msk|macro|AES_CR_EN_Msk
DECL|AES_CR_EN_Pos|macro|AES_CR_EN_Pos
DECL|AES_CR_EN|macro|AES_CR_EN
DECL|AES_CR_ERRC_Msk|macro|AES_CR_ERRC_Msk
DECL|AES_CR_ERRC_Pos|macro|AES_CR_ERRC_Pos
DECL|AES_CR_ERRC|macro|AES_CR_ERRC
DECL|AES_CR_ERRIE_Msk|macro|AES_CR_ERRIE_Msk
DECL|AES_CR_ERRIE_Pos|macro|AES_CR_ERRIE_Pos
DECL|AES_CR_ERRIE|macro|AES_CR_ERRIE
DECL|AES_CR_GCMPH_0|macro|AES_CR_GCMPH_0
DECL|AES_CR_GCMPH_1|macro|AES_CR_GCMPH_1
DECL|AES_CR_GCMPH_Msk|macro|AES_CR_GCMPH_Msk
DECL|AES_CR_GCMPH_Pos|macro|AES_CR_GCMPH_Pos
DECL|AES_CR_GCMPH|macro|AES_CR_GCMPH
DECL|AES_CR_KEYSIZE_Msk|macro|AES_CR_KEYSIZE_Msk
DECL|AES_CR_KEYSIZE_Pos|macro|AES_CR_KEYSIZE_Pos
DECL|AES_CR_KEYSIZE|macro|AES_CR_KEYSIZE
DECL|AES_CR_MODE_0|macro|AES_CR_MODE_0
DECL|AES_CR_MODE_1|macro|AES_CR_MODE_1
DECL|AES_CR_MODE_Msk|macro|AES_CR_MODE_Msk
DECL|AES_CR_MODE_Pos|macro|AES_CR_MODE_Pos
DECL|AES_CR_MODE|macro|AES_CR_MODE
DECL|AES_DINR_Msk|macro|AES_DINR_Msk
DECL|AES_DINR_Pos|macro|AES_DINR_Pos
DECL|AES_DINR|macro|AES_DINR
DECL|AES_DOUTR_Msk|macro|AES_DOUTR_Msk
DECL|AES_DOUTR_Pos|macro|AES_DOUTR_Pos
DECL|AES_DOUTR|macro|AES_DOUTR
DECL|AES_IRQn|enumerator|AES_IRQn = 79, /*!< AES global interrupt */
DECL|AES_IVR0_Msk|macro|AES_IVR0_Msk
DECL|AES_IVR0_Pos|macro|AES_IVR0_Pos
DECL|AES_IVR0|macro|AES_IVR0
DECL|AES_IVR1_Msk|macro|AES_IVR1_Msk
DECL|AES_IVR1_Pos|macro|AES_IVR1_Pos
DECL|AES_IVR1|macro|AES_IVR1
DECL|AES_IVR2_Msk|macro|AES_IVR2_Msk
DECL|AES_IVR2_Pos|macro|AES_IVR2_Pos
DECL|AES_IVR2|macro|AES_IVR2
DECL|AES_IVR3_Msk|macro|AES_IVR3_Msk
DECL|AES_IVR3_Pos|macro|AES_IVR3_Pos
DECL|AES_IVR3|macro|AES_IVR3
DECL|AES_KEYR0_Msk|macro|AES_KEYR0_Msk
DECL|AES_KEYR0_Pos|macro|AES_KEYR0_Pos
DECL|AES_KEYR0|macro|AES_KEYR0
DECL|AES_KEYR1_Msk|macro|AES_KEYR1_Msk
DECL|AES_KEYR1_Pos|macro|AES_KEYR1_Pos
DECL|AES_KEYR1|macro|AES_KEYR1
DECL|AES_KEYR2_Msk|macro|AES_KEYR2_Msk
DECL|AES_KEYR2_Pos|macro|AES_KEYR2_Pos
DECL|AES_KEYR2|macro|AES_KEYR2
DECL|AES_KEYR3_Msk|macro|AES_KEYR3_Msk
DECL|AES_KEYR3_Pos|macro|AES_KEYR3_Pos
DECL|AES_KEYR3|macro|AES_KEYR3
DECL|AES_KEYR4_Msk|macro|AES_KEYR4_Msk
DECL|AES_KEYR4_Pos|macro|AES_KEYR4_Pos
DECL|AES_KEYR4|macro|AES_KEYR4
DECL|AES_KEYR5_Msk|macro|AES_KEYR5_Msk
DECL|AES_KEYR5_Pos|macro|AES_KEYR5_Pos
DECL|AES_KEYR5|macro|AES_KEYR5
DECL|AES_KEYR6_Msk|macro|AES_KEYR6_Msk
DECL|AES_KEYR6_Pos|macro|AES_KEYR6_Pos
DECL|AES_KEYR6|macro|AES_KEYR6
DECL|AES_KEYR7_Msk|macro|AES_KEYR7_Msk
DECL|AES_KEYR7_Pos|macro|AES_KEYR7_Pos
DECL|AES_KEYR7|macro|AES_KEYR7
DECL|AES_SR_BUSY_Msk|macro|AES_SR_BUSY_Msk
DECL|AES_SR_BUSY_Pos|macro|AES_SR_BUSY_Pos
DECL|AES_SR_BUSY|macro|AES_SR_BUSY
DECL|AES_SR_CCF_Msk|macro|AES_SR_CCF_Msk
DECL|AES_SR_CCF_Pos|macro|AES_SR_CCF_Pos
DECL|AES_SR_CCF|macro|AES_SR_CCF
DECL|AES_SR_RDERR_Msk|macro|AES_SR_RDERR_Msk
DECL|AES_SR_RDERR_Pos|macro|AES_SR_RDERR_Pos
DECL|AES_SR_RDERR|macro|AES_SR_RDERR
DECL|AES_SR_WRERR_Msk|macro|AES_SR_WRERR_Msk
DECL|AES_SR_WRERR_Pos|macro|AES_SR_WRERR_Pos
DECL|AES_SR_WRERR|macro|AES_SR_WRERR
DECL|AES_SUSP0R_Msk|macro|AES_SUSP0R_Msk
DECL|AES_SUSP0R_Pos|macro|AES_SUSP0R_Pos
DECL|AES_SUSP0R|macro|AES_SUSP0R
DECL|AES_SUSP1R_Msk|macro|AES_SUSP1R_Msk
DECL|AES_SUSP1R_Pos|macro|AES_SUSP1R_Pos
DECL|AES_SUSP1R|macro|AES_SUSP1R
DECL|AES_SUSP2R_Msk|macro|AES_SUSP2R_Msk
DECL|AES_SUSP2R_Pos|macro|AES_SUSP2R_Pos
DECL|AES_SUSP2R|macro|AES_SUSP2R
DECL|AES_SUSP3R_Msk|macro|AES_SUSP3R_Msk
DECL|AES_SUSP3R_Pos|macro|AES_SUSP3R_Pos
DECL|AES_SUSP3R|macro|AES_SUSP3R
DECL|AES_SUSP4R_Msk|macro|AES_SUSP4R_Msk
DECL|AES_SUSP4R_Pos|macro|AES_SUSP4R_Pos
DECL|AES_SUSP4R|macro|AES_SUSP4R
DECL|AES_SUSP5R_Msk|macro|AES_SUSP5R_Msk
DECL|AES_SUSP5R_Pos|macro|AES_SUSP5R_Pos
DECL|AES_SUSP5R|macro|AES_SUSP5R
DECL|AES_SUSP6R_Msk|macro|AES_SUSP6R_Msk
DECL|AES_SUSP6R_Pos|macro|AES_SUSP6R_Pos
DECL|AES_SUSP6R|macro|AES_SUSP6R
DECL|AES_SUSP7R_Msk|macro|AES_SUSP7R_Msk
DECL|AES_SUSP7R_Pos|macro|AES_SUSP7R_Pos
DECL|AES_SUSP7R|macro|AES_SUSP7R
DECL|AES_TypeDef|typedef|} AES_TypeDef;
DECL|AES|macro|AES
DECL|AFR|member|__IO uint32_t AFR[2]; /*!< GPIO alternate function registers, Address offset: 0x20-0x24 */
DECL|AHB1ENR|member|__IO uint32_t AHB1ENR; /*!< RCC AHB1 peripheral clock register, Address offset: 0x30 */
DECL|AHB1LPENR|member|__IO uint32_t AHB1LPENR; /*!< RCC AHB1 peripheral clock enable in low power mode register, Address offset: 0x50 */
DECL|AHB1PERIPH_BASE|macro|AHB1PERIPH_BASE
DECL|AHB1RSTR|member|__IO uint32_t AHB1RSTR; /*!< RCC AHB1 peripheral reset register, Address offset: 0x10 */
DECL|AHB2ENR|member|__IO uint32_t AHB2ENR; /*!< RCC AHB2 peripheral clock register, Address offset: 0x34 */
DECL|AHB2LPENR|member|__IO uint32_t AHB2LPENR; /*!< RCC AHB2 peripheral clock enable in low power mode register, Address offset: 0x54 */
DECL|AHB2PERIPH_BASE|macro|AHB2PERIPH_BASE
DECL|AHB2RSTR|member|__IO uint32_t AHB2RSTR; /*!< RCC AHB2 peripheral reset register, Address offset: 0x14 */
DECL|AHB3ENR|member|__IO uint32_t AHB3ENR; /*!< RCC AHB3 peripheral clock register, Address offset: 0x38 */
DECL|AHB3LPENR|member|__IO uint32_t AHB3LPENR; /*!< RCC AHB3 peripheral clock enable in low power mode register, Address offset: 0x58 */
DECL|AHB3RSTR|member|__IO uint32_t AHB3RSTR; /*!< RCC AHB3 peripheral reset register, Address offset: 0x18 */
DECL|ALRMAR|member|__IO uint32_t ALRMAR; /*!< RTC alarm A register, Address offset: 0x1C */
DECL|ALRMASSR|member|__IO uint32_t ALRMASSR; /*!< RTC alarm A sub second register, Address offset: 0x44 */
DECL|ALRMBR|member|__IO uint32_t ALRMBR; /*!< RTC alarm B register, Address offset: 0x20 */
DECL|ALRMBSSR|member|__IO uint32_t ALRMBSSR; /*!< RTC alarm B sub second register, Address offset: 0x48 */
DECL|APB1ENR|member|__IO uint32_t APB1ENR; /*!< RCC APB1 peripheral clock enable register, Address offset: 0x40 */
DECL|APB1FZ|member|__IO uint32_t APB1FZ; /*!< Debug MCU APB1 freeze register, Address offset: 0x08 */
DECL|APB1LPENR|member|__IO uint32_t APB1LPENR; /*!< RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60 */
DECL|APB1PERIPH_BASE|macro|APB1PERIPH_BASE
DECL|APB1RSTR|member|__IO uint32_t APB1RSTR; /*!< RCC APB1 peripheral reset register, Address offset: 0x20 */
DECL|APB2ENR|member|__IO uint32_t APB2ENR; /*!< RCC APB2 peripheral clock enable register, Address offset: 0x44 */
DECL|APB2FZ|member|__IO uint32_t APB2FZ; /*!< Debug MCU APB2 freeze register, Address offset: 0x0C */
DECL|APB2LPENR|member|__IO uint32_t APB2LPENR; /*!< RCC APB2 peripheral clock enable in low power mode register, Address offset: 0x64 */
DECL|APB2PERIPH_BASE|macro|APB2PERIPH_BASE
DECL|APB2RSTR|member|__IO uint32_t APB2RSTR; /*!< RCC APB2 peripheral reset register, Address offset: 0x24 */
DECL|ARG|member|__IO uint32_t ARG; /*!< SDMMC argument register, Address offset: 0x08 */
DECL|ARR|member|__IO uint32_t ARR; /*!< LPTIM Autoreload register, Address offset: 0x18 */
DECL|ARR|member|__IO uint32_t ARR; /*!< TIM auto-reload register, Address offset: 0x2C */
DECL|AR|member|__IO uint32_t AR; /*!< QUADSPI Address register, Address offset: 0x18 */
DECL|BDCR|member|__IO uint32_t BDCR; /*!< RCC Backup domain control register, Address offset: 0x70 */
DECL|BDTR|member|__IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */
DECL|BKP0R|member|__IO uint32_t BKP0R; /*!< RTC backup register 0, Address offset: 0x50 */
DECL|BKP10R|member|__IO uint32_t BKP10R; /*!< RTC backup register 10, Address offset: 0x78 */
DECL|BKP11R|member|__IO uint32_t BKP11R; /*!< RTC backup register 11, Address offset: 0x7C */
DECL|BKP12R|member|__IO uint32_t BKP12R; /*!< RTC backup register 12, Address offset: 0x80 */
DECL|BKP13R|member|__IO uint32_t BKP13R; /*!< RTC backup register 13, Address offset: 0x84 */
DECL|BKP14R|member|__IO uint32_t BKP14R; /*!< RTC backup register 14, Address offset: 0x88 */
DECL|BKP15R|member|__IO uint32_t BKP15R; /*!< RTC backup register 15, Address offset: 0x8C */
DECL|BKP16R|member|__IO uint32_t BKP16R; /*!< RTC backup register 16, Address offset: 0x90 */
DECL|BKP17R|member|__IO uint32_t BKP17R; /*!< RTC backup register 17, Address offset: 0x94 */
DECL|BKP18R|member|__IO uint32_t BKP18R; /*!< RTC backup register 18, Address offset: 0x98 */
DECL|BKP19R|member|__IO uint32_t BKP19R; /*!< RTC backup register 19, Address offset: 0x9C */
DECL|BKP1R|member|__IO uint32_t BKP1R; /*!< RTC backup register 1, Address offset: 0x54 */
DECL|BKP20R|member|__IO uint32_t BKP20R; /*!< RTC backup register 20, Address offset: 0xA0 */
DECL|BKP21R|member|__IO uint32_t BKP21R; /*!< RTC backup register 21, Address offset: 0xA4 */
DECL|BKP22R|member|__IO uint32_t BKP22R; /*!< RTC backup register 22, Address offset: 0xA8 */
DECL|BKP23R|member|__IO uint32_t BKP23R; /*!< RTC backup register 23, Address offset: 0xAC */
DECL|BKP24R|member|__IO uint32_t BKP24R; /*!< RTC backup register 24, Address offset: 0xB0 */
DECL|BKP25R|member|__IO uint32_t BKP25R; /*!< RTC backup register 25, Address offset: 0xB4 */
DECL|BKP26R|member|__IO uint32_t BKP26R; /*!< RTC backup register 26, Address offset: 0xB8 */
DECL|BKP27R|member|__IO uint32_t BKP27R; /*!< RTC backup register 27, Address offset: 0xBC */
DECL|BKP28R|member|__IO uint32_t BKP28R; /*!< RTC backup register 28, Address offset: 0xC0 */
DECL|BKP29R|member|__IO uint32_t BKP29R; /*!< RTC backup register 29, Address offset: 0xC4 */
DECL|BKP2R|member|__IO uint32_t BKP2R; /*!< RTC backup register 2, Address offset: 0x58 */
DECL|BKP30R|member|__IO uint32_t BKP30R; /*!< RTC backup register 30, Address offset: 0xC8 */
DECL|BKP31R|member|__IO uint32_t BKP31R; /*!< RTC backup register 31, Address offset: 0xCC */
DECL|BKP3R|member|__IO uint32_t BKP3R; /*!< RTC backup register 3, Address offset: 0x5C */
DECL|BKP4R|member|__IO uint32_t BKP4R; /*!< RTC backup register 4, Address offset: 0x60 */
DECL|BKP5R|member|__IO uint32_t BKP5R; /*!< RTC backup register 5, Address offset: 0x64 */
DECL|BKP6R|member|__IO uint32_t BKP6R; /*!< RTC backup register 6, Address offset: 0x68 */
DECL|BKP7R|member|__IO uint32_t BKP7R; /*!< RTC backup register 7, Address offset: 0x6C */
DECL|BKP8R|member|__IO uint32_t BKP8R; /*!< RTC backup register 8, Address offset: 0x70 */
DECL|BKP9R|member|__IO uint32_t BKP9R; /*!< RTC backup register 9, Address offset: 0x74 */
DECL|BKPSRAM_BASE|macro|BKPSRAM_BASE
DECL|BRR|member|__IO uint32_t BRR; /*!< USART Baud rate register, Address offset: 0x0C */
DECL|BSRR|member|__IO uint32_t BSRR; /*!< GPIO port bit set/reset register, Address offset: 0x18 */
DECL|BTCR|member|__IO uint32_t BTCR[8]; /*!< NOR/PSRAM chip-select control register(BCR) and chip-select timing register(BTR), Address offset: 0x00-1C */
DECL|BTR|member|__IO uint32_t BTR; /*!< CAN bit timing register, Address offset: 0x1C */
DECL|BWTR|member|__IO uint32_t BWTR[7]; /*!< NOR/PSRAM write timing registers, Address offset: 0x104-0x11C */
DECL|BusFault_IRQn|enumerator|BusFault_IRQn = -11, /*!< 5 Cortex-M7 Bus Fault Interrupt */
DECL|CALR|member|__IO uint32_t CALR; /*!< RTC calibration register, Address offset: 0x3C */
DECL|CAN1_BASE|macro|CAN1_BASE
DECL|CAN1_RX0_IRQn|enumerator|CAN1_RX0_IRQn = 20, /*!< CAN1 RX0 Interrupt */
DECL|CAN1_RX1_IRQn|enumerator|CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */
DECL|CAN1_SCE_IRQn|enumerator|CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */
DECL|CAN1_TX_IRQn|enumerator|CAN1_TX_IRQn = 19, /*!< CAN1 TX Interrupt */
DECL|CAN1|macro|CAN1
DECL|CAN_BTR_BRP_Msk|macro|CAN_BTR_BRP_Msk
DECL|CAN_BTR_BRP_Pos|macro|CAN_BTR_BRP_Pos
DECL|CAN_BTR_BRP|macro|CAN_BTR_BRP
DECL|CAN_BTR_LBKM_Msk|macro|CAN_BTR_LBKM_Msk
DECL|CAN_BTR_LBKM_Pos|macro|CAN_BTR_LBKM_Pos
DECL|CAN_BTR_LBKM|macro|CAN_BTR_LBKM
DECL|CAN_BTR_SILM_Msk|macro|CAN_BTR_SILM_Msk
DECL|CAN_BTR_SILM_Pos|macro|CAN_BTR_SILM_Pos
DECL|CAN_BTR_SILM|macro|CAN_BTR_SILM
DECL|CAN_BTR_SJW_0|macro|CAN_BTR_SJW_0
DECL|CAN_BTR_SJW_1|macro|CAN_BTR_SJW_1
DECL|CAN_BTR_SJW_Msk|macro|CAN_BTR_SJW_Msk
DECL|CAN_BTR_SJW_Pos|macro|CAN_BTR_SJW_Pos
DECL|CAN_BTR_SJW|macro|CAN_BTR_SJW
DECL|CAN_BTR_TS1_0|macro|CAN_BTR_TS1_0
DECL|CAN_BTR_TS1_1|macro|CAN_BTR_TS1_1
DECL|CAN_BTR_TS1_2|macro|CAN_BTR_TS1_2
DECL|CAN_BTR_TS1_3|macro|CAN_BTR_TS1_3
DECL|CAN_BTR_TS1_Msk|macro|CAN_BTR_TS1_Msk
DECL|CAN_BTR_TS1_Pos|macro|CAN_BTR_TS1_Pos
DECL|CAN_BTR_TS1|macro|CAN_BTR_TS1
DECL|CAN_BTR_TS2_0|macro|CAN_BTR_TS2_0
DECL|CAN_BTR_TS2_1|macro|CAN_BTR_TS2_1
DECL|CAN_BTR_TS2_2|macro|CAN_BTR_TS2_2
DECL|CAN_BTR_TS2_Msk|macro|CAN_BTR_TS2_Msk
DECL|CAN_BTR_TS2_Pos|macro|CAN_BTR_TS2_Pos
DECL|CAN_BTR_TS2|macro|CAN_BTR_TS2
DECL|CAN_ESR_BOFF_Msk|macro|CAN_ESR_BOFF_Msk
DECL|CAN_ESR_BOFF_Pos|macro|CAN_ESR_BOFF_Pos
DECL|CAN_ESR_BOFF|macro|CAN_ESR_BOFF
DECL|CAN_ESR_EPVF_Msk|macro|CAN_ESR_EPVF_Msk
DECL|CAN_ESR_EPVF_Pos|macro|CAN_ESR_EPVF_Pos
DECL|CAN_ESR_EPVF|macro|CAN_ESR_EPVF
DECL|CAN_ESR_EWGF_Msk|macro|CAN_ESR_EWGF_Msk
DECL|CAN_ESR_EWGF_Pos|macro|CAN_ESR_EWGF_Pos
DECL|CAN_ESR_EWGF|macro|CAN_ESR_EWGF
DECL|CAN_ESR_LEC_0|macro|CAN_ESR_LEC_0
DECL|CAN_ESR_LEC_1|macro|CAN_ESR_LEC_1
DECL|CAN_ESR_LEC_2|macro|CAN_ESR_LEC_2
DECL|CAN_ESR_LEC_Msk|macro|CAN_ESR_LEC_Msk
DECL|CAN_ESR_LEC_Pos|macro|CAN_ESR_LEC_Pos
DECL|CAN_ESR_LEC|macro|CAN_ESR_LEC
DECL|CAN_ESR_REC_Msk|macro|CAN_ESR_REC_Msk
DECL|CAN_ESR_REC_Pos|macro|CAN_ESR_REC_Pos
DECL|CAN_ESR_REC|macro|CAN_ESR_REC
DECL|CAN_ESR_TEC_Msk|macro|CAN_ESR_TEC_Msk
DECL|CAN_ESR_TEC_Pos|macro|CAN_ESR_TEC_Pos
DECL|CAN_ESR_TEC|macro|CAN_ESR_TEC
DECL|CAN_F0R1_FB0_Msk|macro|CAN_F0R1_FB0_Msk
DECL|CAN_F0R1_FB0_Pos|macro|CAN_F0R1_FB0_Pos
DECL|CAN_F0R1_FB0|macro|CAN_F0R1_FB0
DECL|CAN_F0R1_FB10_Msk|macro|CAN_F0R1_FB10_Msk
DECL|CAN_F0R1_FB10_Pos|macro|CAN_F0R1_FB10_Pos
DECL|CAN_F0R1_FB10|macro|CAN_F0R1_FB10
DECL|CAN_F0R1_FB11_Msk|macro|CAN_F0R1_FB11_Msk
DECL|CAN_F0R1_FB11_Pos|macro|CAN_F0R1_FB11_Pos
DECL|CAN_F0R1_FB11|macro|CAN_F0R1_FB11
DECL|CAN_F0R1_FB12_Msk|macro|CAN_F0R1_FB12_Msk
DECL|CAN_F0R1_FB12_Pos|macro|CAN_F0R1_FB12_Pos
DECL|CAN_F0R1_FB12|macro|CAN_F0R1_FB12
DECL|CAN_F0R1_FB13_Msk|macro|CAN_F0R1_FB13_Msk
DECL|CAN_F0R1_FB13_Pos|macro|CAN_F0R1_FB13_Pos
DECL|CAN_F0R1_FB13|macro|CAN_F0R1_FB13
DECL|CAN_F0R1_FB14_Msk|macro|CAN_F0R1_FB14_Msk
DECL|CAN_F0R1_FB14_Pos|macro|CAN_F0R1_FB14_Pos
DECL|CAN_F0R1_FB14|macro|CAN_F0R1_FB14
DECL|CAN_F0R1_FB15_Msk|macro|CAN_F0R1_FB15_Msk
DECL|CAN_F0R1_FB15_Pos|macro|CAN_F0R1_FB15_Pos
DECL|CAN_F0R1_FB15|macro|CAN_F0R1_FB15
DECL|CAN_F0R1_FB16_Msk|macro|CAN_F0R1_FB16_Msk
DECL|CAN_F0R1_FB16_Pos|macro|CAN_F0R1_FB16_Pos
DECL|CAN_F0R1_FB16|macro|CAN_F0R1_FB16
DECL|CAN_F0R1_FB17_Msk|macro|CAN_F0R1_FB17_Msk
DECL|CAN_F0R1_FB17_Pos|macro|CAN_F0R1_FB17_Pos
DECL|CAN_F0R1_FB17|macro|CAN_F0R1_FB17
DECL|CAN_F0R1_FB18_Msk|macro|CAN_F0R1_FB18_Msk
DECL|CAN_F0R1_FB18_Pos|macro|CAN_F0R1_FB18_Pos
DECL|CAN_F0R1_FB18|macro|CAN_F0R1_FB18
DECL|CAN_F0R1_FB19_Msk|macro|CAN_F0R1_FB19_Msk
DECL|CAN_F0R1_FB19_Pos|macro|CAN_F0R1_FB19_Pos
DECL|CAN_F0R1_FB19|macro|CAN_F0R1_FB19
DECL|CAN_F0R1_FB1_Msk|macro|CAN_F0R1_FB1_Msk
DECL|CAN_F0R1_FB1_Pos|macro|CAN_F0R1_FB1_Pos
DECL|CAN_F0R1_FB1|macro|CAN_F0R1_FB1
DECL|CAN_F0R1_FB20_Msk|macro|CAN_F0R1_FB20_Msk
DECL|CAN_F0R1_FB20_Pos|macro|CAN_F0R1_FB20_Pos
DECL|CAN_F0R1_FB20|macro|CAN_F0R1_FB20
DECL|CAN_F0R1_FB21_Msk|macro|CAN_F0R1_FB21_Msk
DECL|CAN_F0R1_FB21_Pos|macro|CAN_F0R1_FB21_Pos
DECL|CAN_F0R1_FB21|macro|CAN_F0R1_FB21
DECL|CAN_F0R1_FB22_Msk|macro|CAN_F0R1_FB22_Msk
DECL|CAN_F0R1_FB22_Pos|macro|CAN_F0R1_FB22_Pos
DECL|CAN_F0R1_FB22|macro|CAN_F0R1_FB22
DECL|CAN_F0R1_FB23_Msk|macro|CAN_F0R1_FB23_Msk
DECL|CAN_F0R1_FB23_Pos|macro|CAN_F0R1_FB23_Pos
DECL|CAN_F0R1_FB23|macro|CAN_F0R1_FB23
DECL|CAN_F0R1_FB24_Msk|macro|CAN_F0R1_FB24_Msk
DECL|CAN_F0R1_FB24_Pos|macro|CAN_F0R1_FB24_Pos
DECL|CAN_F0R1_FB24|macro|CAN_F0R1_FB24
DECL|CAN_F0R1_FB25_Msk|macro|CAN_F0R1_FB25_Msk
DECL|CAN_F0R1_FB25_Pos|macro|CAN_F0R1_FB25_Pos
DECL|CAN_F0R1_FB25|macro|CAN_F0R1_FB25
DECL|CAN_F0R1_FB26_Msk|macro|CAN_F0R1_FB26_Msk
DECL|CAN_F0R1_FB26_Pos|macro|CAN_F0R1_FB26_Pos
DECL|CAN_F0R1_FB26|macro|CAN_F0R1_FB26
DECL|CAN_F0R1_FB27_Msk|macro|CAN_F0R1_FB27_Msk
DECL|CAN_F0R1_FB27_Pos|macro|CAN_F0R1_FB27_Pos
DECL|CAN_F0R1_FB27|macro|CAN_F0R1_FB27
DECL|CAN_F0R1_FB28_Msk|macro|CAN_F0R1_FB28_Msk
DECL|CAN_F0R1_FB28_Pos|macro|CAN_F0R1_FB28_Pos
DECL|CAN_F0R1_FB28|macro|CAN_F0R1_FB28
DECL|CAN_F0R1_FB29_Msk|macro|CAN_F0R1_FB29_Msk
DECL|CAN_F0R1_FB29_Pos|macro|CAN_F0R1_FB29_Pos
DECL|CAN_F0R1_FB29|macro|CAN_F0R1_FB29
DECL|CAN_F0R1_FB2_Msk|macro|CAN_F0R1_FB2_Msk
DECL|CAN_F0R1_FB2_Pos|macro|CAN_F0R1_FB2_Pos
DECL|CAN_F0R1_FB2|macro|CAN_F0R1_FB2
DECL|CAN_F0R1_FB30_Msk|macro|CAN_F0R1_FB30_Msk
DECL|CAN_F0R1_FB30_Pos|macro|CAN_F0R1_FB30_Pos
DECL|CAN_F0R1_FB30|macro|CAN_F0R1_FB30
DECL|CAN_F0R1_FB31_Msk|macro|CAN_F0R1_FB31_Msk
DECL|CAN_F0R1_FB31_Pos|macro|CAN_F0R1_FB31_Pos
DECL|CAN_F0R1_FB31|macro|CAN_F0R1_FB31
DECL|CAN_F0R1_FB3_Msk|macro|CAN_F0R1_FB3_Msk
DECL|CAN_F0R1_FB3_Pos|macro|CAN_F0R1_FB3_Pos
DECL|CAN_F0R1_FB3|macro|CAN_F0R1_FB3
DECL|CAN_F0R1_FB4_Msk|macro|CAN_F0R1_FB4_Msk
DECL|CAN_F0R1_FB4_Pos|macro|CAN_F0R1_FB4_Pos
DECL|CAN_F0R1_FB4|macro|CAN_F0R1_FB4
DECL|CAN_F0R1_FB5_Msk|macro|CAN_F0R1_FB5_Msk
DECL|CAN_F0R1_FB5_Pos|macro|CAN_F0R1_FB5_Pos
DECL|CAN_F0R1_FB5|macro|CAN_F0R1_FB5
DECL|CAN_F0R1_FB6_Msk|macro|CAN_F0R1_FB6_Msk
DECL|CAN_F0R1_FB6_Pos|macro|CAN_F0R1_FB6_Pos
DECL|CAN_F0R1_FB6|macro|CAN_F0R1_FB6
DECL|CAN_F0R1_FB7_Msk|macro|CAN_F0R1_FB7_Msk
DECL|CAN_F0R1_FB7_Pos|macro|CAN_F0R1_FB7_Pos
DECL|CAN_F0R1_FB7|macro|CAN_F0R1_FB7
DECL|CAN_F0R1_FB8_Msk|macro|CAN_F0R1_FB8_Msk
DECL|CAN_F0R1_FB8_Pos|macro|CAN_F0R1_FB8_Pos
DECL|CAN_F0R1_FB8|macro|CAN_F0R1_FB8
DECL|CAN_F0R1_FB9_Msk|macro|CAN_F0R1_FB9_Msk
DECL|CAN_F0R1_FB9_Pos|macro|CAN_F0R1_FB9_Pos
DECL|CAN_F0R1_FB9|macro|CAN_F0R1_FB9
DECL|CAN_F0R2_FB0_Msk|macro|CAN_F0R2_FB0_Msk
DECL|CAN_F0R2_FB0_Pos|macro|CAN_F0R2_FB0_Pos
DECL|CAN_F0R2_FB0|macro|CAN_F0R2_FB0
DECL|CAN_F0R2_FB10_Msk|macro|CAN_F0R2_FB10_Msk
DECL|CAN_F0R2_FB10_Pos|macro|CAN_F0R2_FB10_Pos
DECL|CAN_F0R2_FB10|macro|CAN_F0R2_FB10
DECL|CAN_F0R2_FB11_Msk|macro|CAN_F0R2_FB11_Msk
DECL|CAN_F0R2_FB11_Pos|macro|CAN_F0R2_FB11_Pos
DECL|CAN_F0R2_FB11|macro|CAN_F0R2_FB11
DECL|CAN_F0R2_FB12_Msk|macro|CAN_F0R2_FB12_Msk
DECL|CAN_F0R2_FB12_Pos|macro|CAN_F0R2_FB12_Pos
DECL|CAN_F0R2_FB12|macro|CAN_F0R2_FB12
DECL|CAN_F0R2_FB13_Msk|macro|CAN_F0R2_FB13_Msk
DECL|CAN_F0R2_FB13_Pos|macro|CAN_F0R2_FB13_Pos
DECL|CAN_F0R2_FB13|macro|CAN_F0R2_FB13
DECL|CAN_F0R2_FB14_Msk|macro|CAN_F0R2_FB14_Msk
DECL|CAN_F0R2_FB14_Pos|macro|CAN_F0R2_FB14_Pos
DECL|CAN_F0R2_FB14|macro|CAN_F0R2_FB14
DECL|CAN_F0R2_FB15_Msk|macro|CAN_F0R2_FB15_Msk
DECL|CAN_F0R2_FB15_Pos|macro|CAN_F0R2_FB15_Pos
DECL|CAN_F0R2_FB15|macro|CAN_F0R2_FB15
DECL|CAN_F0R2_FB16_Msk|macro|CAN_F0R2_FB16_Msk
DECL|CAN_F0R2_FB16_Pos|macro|CAN_F0R2_FB16_Pos
DECL|CAN_F0R2_FB16|macro|CAN_F0R2_FB16
DECL|CAN_F0R2_FB17_Msk|macro|CAN_F0R2_FB17_Msk
DECL|CAN_F0R2_FB17_Pos|macro|CAN_F0R2_FB17_Pos
DECL|CAN_F0R2_FB17|macro|CAN_F0R2_FB17
DECL|CAN_F0R2_FB18_Msk|macro|CAN_F0R2_FB18_Msk
DECL|CAN_F0R2_FB18_Pos|macro|CAN_F0R2_FB18_Pos
DECL|CAN_F0R2_FB18|macro|CAN_F0R2_FB18
DECL|CAN_F0R2_FB19_Msk|macro|CAN_F0R2_FB19_Msk
DECL|CAN_F0R2_FB19_Pos|macro|CAN_F0R2_FB19_Pos
DECL|CAN_F0R2_FB19|macro|CAN_F0R2_FB19
DECL|CAN_F0R2_FB1_Msk|macro|CAN_F0R2_FB1_Msk
DECL|CAN_F0R2_FB1_Pos|macro|CAN_F0R2_FB1_Pos
DECL|CAN_F0R2_FB1|macro|CAN_F0R2_FB1
DECL|CAN_F0R2_FB20_Msk|macro|CAN_F0R2_FB20_Msk
DECL|CAN_F0R2_FB20_Pos|macro|CAN_F0R2_FB20_Pos
DECL|CAN_F0R2_FB20|macro|CAN_F0R2_FB20
DECL|CAN_F0R2_FB21_Msk|macro|CAN_F0R2_FB21_Msk
DECL|CAN_F0R2_FB21_Pos|macro|CAN_F0R2_FB21_Pos
DECL|CAN_F0R2_FB21|macro|CAN_F0R2_FB21
DECL|CAN_F0R2_FB22_Msk|macro|CAN_F0R2_FB22_Msk
DECL|CAN_F0R2_FB22_Pos|macro|CAN_F0R2_FB22_Pos
DECL|CAN_F0R2_FB22|macro|CAN_F0R2_FB22
DECL|CAN_F0R2_FB23_Msk|macro|CAN_F0R2_FB23_Msk
DECL|CAN_F0R2_FB23_Pos|macro|CAN_F0R2_FB23_Pos
DECL|CAN_F0R2_FB23|macro|CAN_F0R2_FB23
DECL|CAN_F0R2_FB24_Msk|macro|CAN_F0R2_FB24_Msk
DECL|CAN_F0R2_FB24_Pos|macro|CAN_F0R2_FB24_Pos
DECL|CAN_F0R2_FB24|macro|CAN_F0R2_FB24
DECL|CAN_F0R2_FB25_Msk|macro|CAN_F0R2_FB25_Msk
DECL|CAN_F0R2_FB25_Pos|macro|CAN_F0R2_FB25_Pos
DECL|CAN_F0R2_FB25|macro|CAN_F0R2_FB25
DECL|CAN_F0R2_FB26_Msk|macro|CAN_F0R2_FB26_Msk
DECL|CAN_F0R2_FB26_Pos|macro|CAN_F0R2_FB26_Pos
DECL|CAN_F0R2_FB26|macro|CAN_F0R2_FB26
DECL|CAN_F0R2_FB27_Msk|macro|CAN_F0R2_FB27_Msk
DECL|CAN_F0R2_FB27_Pos|macro|CAN_F0R2_FB27_Pos
DECL|CAN_F0R2_FB27|macro|CAN_F0R2_FB27
DECL|CAN_F0R2_FB28_Msk|macro|CAN_F0R2_FB28_Msk
DECL|CAN_F0R2_FB28_Pos|macro|CAN_F0R2_FB28_Pos
DECL|CAN_F0R2_FB28|macro|CAN_F0R2_FB28
DECL|CAN_F0R2_FB29_Msk|macro|CAN_F0R2_FB29_Msk
DECL|CAN_F0R2_FB29_Pos|macro|CAN_F0R2_FB29_Pos
DECL|CAN_F0R2_FB29|macro|CAN_F0R2_FB29
DECL|CAN_F0R2_FB2_Msk|macro|CAN_F0R2_FB2_Msk
DECL|CAN_F0R2_FB2_Pos|macro|CAN_F0R2_FB2_Pos
DECL|CAN_F0R2_FB2|macro|CAN_F0R2_FB2
DECL|CAN_F0R2_FB30_Msk|macro|CAN_F0R2_FB30_Msk
DECL|CAN_F0R2_FB30_Pos|macro|CAN_F0R2_FB30_Pos
DECL|CAN_F0R2_FB30|macro|CAN_F0R2_FB30
DECL|CAN_F0R2_FB31_Msk|macro|CAN_F0R2_FB31_Msk
DECL|CAN_F0R2_FB31_Pos|macro|CAN_F0R2_FB31_Pos
DECL|CAN_F0R2_FB31|macro|CAN_F0R2_FB31
DECL|CAN_F0R2_FB3_Msk|macro|CAN_F0R2_FB3_Msk
DECL|CAN_F0R2_FB3_Pos|macro|CAN_F0R2_FB3_Pos
DECL|CAN_F0R2_FB3|macro|CAN_F0R2_FB3
DECL|CAN_F0R2_FB4_Msk|macro|CAN_F0R2_FB4_Msk
DECL|CAN_F0R2_FB4_Pos|macro|CAN_F0R2_FB4_Pos
DECL|CAN_F0R2_FB4|macro|CAN_F0R2_FB4
DECL|CAN_F0R2_FB5_Msk|macro|CAN_F0R2_FB5_Msk
DECL|CAN_F0R2_FB5_Pos|macro|CAN_F0R2_FB5_Pos
DECL|CAN_F0R2_FB5|macro|CAN_F0R2_FB5
DECL|CAN_F0R2_FB6_Msk|macro|CAN_F0R2_FB6_Msk
DECL|CAN_F0R2_FB6_Pos|macro|CAN_F0R2_FB6_Pos
DECL|CAN_F0R2_FB6|macro|CAN_F0R2_FB6
DECL|CAN_F0R2_FB7_Msk|macro|CAN_F0R2_FB7_Msk
DECL|CAN_F0R2_FB7_Pos|macro|CAN_F0R2_FB7_Pos
DECL|CAN_F0R2_FB7|macro|CAN_F0R2_FB7
DECL|CAN_F0R2_FB8_Msk|macro|CAN_F0R2_FB8_Msk
DECL|CAN_F0R2_FB8_Pos|macro|CAN_F0R2_FB8_Pos
DECL|CAN_F0R2_FB8|macro|CAN_F0R2_FB8
DECL|CAN_F0R2_FB9_Msk|macro|CAN_F0R2_FB9_Msk
DECL|CAN_F0R2_FB9_Pos|macro|CAN_F0R2_FB9_Pos
DECL|CAN_F0R2_FB9|macro|CAN_F0R2_FB9
DECL|CAN_F10R1_FB0_Msk|macro|CAN_F10R1_FB0_Msk
DECL|CAN_F10R1_FB0_Pos|macro|CAN_F10R1_FB0_Pos
DECL|CAN_F10R1_FB0|macro|CAN_F10R1_FB0
DECL|CAN_F10R1_FB10_Msk|macro|CAN_F10R1_FB10_Msk
DECL|CAN_F10R1_FB10_Pos|macro|CAN_F10R1_FB10_Pos
DECL|CAN_F10R1_FB10|macro|CAN_F10R1_FB10
DECL|CAN_F10R1_FB11_Msk|macro|CAN_F10R1_FB11_Msk
DECL|CAN_F10R1_FB11_Pos|macro|CAN_F10R1_FB11_Pos
DECL|CAN_F10R1_FB11|macro|CAN_F10R1_FB11
DECL|CAN_F10R1_FB12_Msk|macro|CAN_F10R1_FB12_Msk
DECL|CAN_F10R1_FB12_Pos|macro|CAN_F10R1_FB12_Pos
DECL|CAN_F10R1_FB12|macro|CAN_F10R1_FB12
DECL|CAN_F10R1_FB13_Msk|macro|CAN_F10R1_FB13_Msk
DECL|CAN_F10R1_FB13_Pos|macro|CAN_F10R1_FB13_Pos
DECL|CAN_F10R1_FB13|macro|CAN_F10R1_FB13
DECL|CAN_F10R1_FB14_Msk|macro|CAN_F10R1_FB14_Msk
DECL|CAN_F10R1_FB14_Pos|macro|CAN_F10R1_FB14_Pos
DECL|CAN_F10R1_FB14|macro|CAN_F10R1_FB14
DECL|CAN_F10R1_FB15_Msk|macro|CAN_F10R1_FB15_Msk
DECL|CAN_F10R1_FB15_Pos|macro|CAN_F10R1_FB15_Pos
DECL|CAN_F10R1_FB15|macro|CAN_F10R1_FB15
DECL|CAN_F10R1_FB16_Msk|macro|CAN_F10R1_FB16_Msk
DECL|CAN_F10R1_FB16_Pos|macro|CAN_F10R1_FB16_Pos
DECL|CAN_F10R1_FB16|macro|CAN_F10R1_FB16
DECL|CAN_F10R1_FB17_Msk|macro|CAN_F10R1_FB17_Msk
DECL|CAN_F10R1_FB17_Pos|macro|CAN_F10R1_FB17_Pos
DECL|CAN_F10R1_FB17|macro|CAN_F10R1_FB17
DECL|CAN_F10R1_FB18_Msk|macro|CAN_F10R1_FB18_Msk
DECL|CAN_F10R1_FB18_Pos|macro|CAN_F10R1_FB18_Pos
DECL|CAN_F10R1_FB18|macro|CAN_F10R1_FB18
DECL|CAN_F10R1_FB19_Msk|macro|CAN_F10R1_FB19_Msk
DECL|CAN_F10R1_FB19_Pos|macro|CAN_F10R1_FB19_Pos
DECL|CAN_F10R1_FB19|macro|CAN_F10R1_FB19
DECL|CAN_F10R1_FB1_Msk|macro|CAN_F10R1_FB1_Msk
DECL|CAN_F10R1_FB1_Pos|macro|CAN_F10R1_FB1_Pos
DECL|CAN_F10R1_FB1|macro|CAN_F10R1_FB1
DECL|CAN_F10R1_FB20_Msk|macro|CAN_F10R1_FB20_Msk
DECL|CAN_F10R1_FB20_Pos|macro|CAN_F10R1_FB20_Pos
DECL|CAN_F10R1_FB20|macro|CAN_F10R1_FB20
DECL|CAN_F10R1_FB21_Msk|macro|CAN_F10R1_FB21_Msk
DECL|CAN_F10R1_FB21_Pos|macro|CAN_F10R1_FB21_Pos
DECL|CAN_F10R1_FB21|macro|CAN_F10R1_FB21
DECL|CAN_F10R1_FB22_Msk|macro|CAN_F10R1_FB22_Msk
DECL|CAN_F10R1_FB22_Pos|macro|CAN_F10R1_FB22_Pos
DECL|CAN_F10R1_FB22|macro|CAN_F10R1_FB22
DECL|CAN_F10R1_FB23_Msk|macro|CAN_F10R1_FB23_Msk
DECL|CAN_F10R1_FB23_Pos|macro|CAN_F10R1_FB23_Pos
DECL|CAN_F10R1_FB23|macro|CAN_F10R1_FB23
DECL|CAN_F10R1_FB24_Msk|macro|CAN_F10R1_FB24_Msk
DECL|CAN_F10R1_FB24_Pos|macro|CAN_F10R1_FB24_Pos
DECL|CAN_F10R1_FB24|macro|CAN_F10R1_FB24
DECL|CAN_F10R1_FB25_Msk|macro|CAN_F10R1_FB25_Msk
DECL|CAN_F10R1_FB25_Pos|macro|CAN_F10R1_FB25_Pos
DECL|CAN_F10R1_FB25|macro|CAN_F10R1_FB25
DECL|CAN_F10R1_FB26_Msk|macro|CAN_F10R1_FB26_Msk
DECL|CAN_F10R1_FB26_Pos|macro|CAN_F10R1_FB26_Pos
DECL|CAN_F10R1_FB26|macro|CAN_F10R1_FB26
DECL|CAN_F10R1_FB27_Msk|macro|CAN_F10R1_FB27_Msk
DECL|CAN_F10R1_FB27_Pos|macro|CAN_F10R1_FB27_Pos
DECL|CAN_F10R1_FB27|macro|CAN_F10R1_FB27
DECL|CAN_F10R1_FB28_Msk|macro|CAN_F10R1_FB28_Msk
DECL|CAN_F10R1_FB28_Pos|macro|CAN_F10R1_FB28_Pos
DECL|CAN_F10R1_FB28|macro|CAN_F10R1_FB28
DECL|CAN_F10R1_FB29_Msk|macro|CAN_F10R1_FB29_Msk
DECL|CAN_F10R1_FB29_Pos|macro|CAN_F10R1_FB29_Pos
DECL|CAN_F10R1_FB29|macro|CAN_F10R1_FB29
DECL|CAN_F10R1_FB2_Msk|macro|CAN_F10R1_FB2_Msk
DECL|CAN_F10R1_FB2_Pos|macro|CAN_F10R1_FB2_Pos
DECL|CAN_F10R1_FB2|macro|CAN_F10R1_FB2
DECL|CAN_F10R1_FB30_Msk|macro|CAN_F10R1_FB30_Msk
DECL|CAN_F10R1_FB30_Pos|macro|CAN_F10R1_FB30_Pos
DECL|CAN_F10R1_FB30|macro|CAN_F10R1_FB30
DECL|CAN_F10R1_FB31_Msk|macro|CAN_F10R1_FB31_Msk
DECL|CAN_F10R1_FB31_Pos|macro|CAN_F10R1_FB31_Pos
DECL|CAN_F10R1_FB31|macro|CAN_F10R1_FB31
DECL|CAN_F10R1_FB3_Msk|macro|CAN_F10R1_FB3_Msk
DECL|CAN_F10R1_FB3_Pos|macro|CAN_F10R1_FB3_Pos
DECL|CAN_F10R1_FB3|macro|CAN_F10R1_FB3
DECL|CAN_F10R1_FB4_Msk|macro|CAN_F10R1_FB4_Msk
DECL|CAN_F10R1_FB4_Pos|macro|CAN_F10R1_FB4_Pos
DECL|CAN_F10R1_FB4|macro|CAN_F10R1_FB4
DECL|CAN_F10R1_FB5_Msk|macro|CAN_F10R1_FB5_Msk
DECL|CAN_F10R1_FB5_Pos|macro|CAN_F10R1_FB5_Pos
DECL|CAN_F10R1_FB5|macro|CAN_F10R1_FB5
DECL|CAN_F10R1_FB6_Msk|macro|CAN_F10R1_FB6_Msk
DECL|CAN_F10R1_FB6_Pos|macro|CAN_F10R1_FB6_Pos
DECL|CAN_F10R1_FB6|macro|CAN_F10R1_FB6
DECL|CAN_F10R1_FB7_Msk|macro|CAN_F10R1_FB7_Msk
DECL|CAN_F10R1_FB7_Pos|macro|CAN_F10R1_FB7_Pos
DECL|CAN_F10R1_FB7|macro|CAN_F10R1_FB7
DECL|CAN_F10R1_FB8_Msk|macro|CAN_F10R1_FB8_Msk
DECL|CAN_F10R1_FB8_Pos|macro|CAN_F10R1_FB8_Pos
DECL|CAN_F10R1_FB8|macro|CAN_F10R1_FB8
DECL|CAN_F10R1_FB9_Msk|macro|CAN_F10R1_FB9_Msk
DECL|CAN_F10R1_FB9_Pos|macro|CAN_F10R1_FB9_Pos
DECL|CAN_F10R1_FB9|macro|CAN_F10R1_FB9
DECL|CAN_F10R2_FB0_Msk|macro|CAN_F10R2_FB0_Msk
DECL|CAN_F10R2_FB0_Pos|macro|CAN_F10R2_FB0_Pos
DECL|CAN_F10R2_FB0|macro|CAN_F10R2_FB0
DECL|CAN_F10R2_FB10_Msk|macro|CAN_F10R2_FB10_Msk
DECL|CAN_F10R2_FB10_Pos|macro|CAN_F10R2_FB10_Pos
DECL|CAN_F10R2_FB10|macro|CAN_F10R2_FB10
DECL|CAN_F10R2_FB11_Msk|macro|CAN_F10R2_FB11_Msk
DECL|CAN_F10R2_FB11_Pos|macro|CAN_F10R2_FB11_Pos
DECL|CAN_F10R2_FB11|macro|CAN_F10R2_FB11
DECL|CAN_F10R2_FB12_Msk|macro|CAN_F10R2_FB12_Msk
DECL|CAN_F10R2_FB12_Pos|macro|CAN_F10R2_FB12_Pos
DECL|CAN_F10R2_FB12|macro|CAN_F10R2_FB12
DECL|CAN_F10R2_FB13_Msk|macro|CAN_F10R2_FB13_Msk
DECL|CAN_F10R2_FB13_Pos|macro|CAN_F10R2_FB13_Pos
DECL|CAN_F10R2_FB13|macro|CAN_F10R2_FB13
DECL|CAN_F10R2_FB14_Msk|macro|CAN_F10R2_FB14_Msk
DECL|CAN_F10R2_FB14_Pos|macro|CAN_F10R2_FB14_Pos
DECL|CAN_F10R2_FB14|macro|CAN_F10R2_FB14
DECL|CAN_F10R2_FB15_Msk|macro|CAN_F10R2_FB15_Msk
DECL|CAN_F10R2_FB15_Pos|macro|CAN_F10R2_FB15_Pos
DECL|CAN_F10R2_FB15|macro|CAN_F10R2_FB15
DECL|CAN_F10R2_FB16_Msk|macro|CAN_F10R2_FB16_Msk
DECL|CAN_F10R2_FB16_Pos|macro|CAN_F10R2_FB16_Pos
DECL|CAN_F10R2_FB16|macro|CAN_F10R2_FB16
DECL|CAN_F10R2_FB17_Msk|macro|CAN_F10R2_FB17_Msk
DECL|CAN_F10R2_FB17_Pos|macro|CAN_F10R2_FB17_Pos
DECL|CAN_F10R2_FB17|macro|CAN_F10R2_FB17
DECL|CAN_F10R2_FB18_Msk|macro|CAN_F10R2_FB18_Msk
DECL|CAN_F10R2_FB18_Pos|macro|CAN_F10R2_FB18_Pos
DECL|CAN_F10R2_FB18|macro|CAN_F10R2_FB18
DECL|CAN_F10R2_FB19_Msk|macro|CAN_F10R2_FB19_Msk
DECL|CAN_F10R2_FB19_Pos|macro|CAN_F10R2_FB19_Pos
DECL|CAN_F10R2_FB19|macro|CAN_F10R2_FB19
DECL|CAN_F10R2_FB1_Msk|macro|CAN_F10R2_FB1_Msk
DECL|CAN_F10R2_FB1_Pos|macro|CAN_F10R2_FB1_Pos
DECL|CAN_F10R2_FB1|macro|CAN_F10R2_FB1
DECL|CAN_F10R2_FB20_Msk|macro|CAN_F10R2_FB20_Msk
DECL|CAN_F10R2_FB20_Pos|macro|CAN_F10R2_FB20_Pos
DECL|CAN_F10R2_FB20|macro|CAN_F10R2_FB20
DECL|CAN_F10R2_FB21_Msk|macro|CAN_F10R2_FB21_Msk
DECL|CAN_F10R2_FB21_Pos|macro|CAN_F10R2_FB21_Pos
DECL|CAN_F10R2_FB21|macro|CAN_F10R2_FB21
DECL|CAN_F10R2_FB22_Msk|macro|CAN_F10R2_FB22_Msk
DECL|CAN_F10R2_FB22_Pos|macro|CAN_F10R2_FB22_Pos
DECL|CAN_F10R2_FB22|macro|CAN_F10R2_FB22
DECL|CAN_F10R2_FB23_Msk|macro|CAN_F10R2_FB23_Msk
DECL|CAN_F10R2_FB23_Pos|macro|CAN_F10R2_FB23_Pos
DECL|CAN_F10R2_FB23|macro|CAN_F10R2_FB23
DECL|CAN_F10R2_FB24_Msk|macro|CAN_F10R2_FB24_Msk
DECL|CAN_F10R2_FB24_Pos|macro|CAN_F10R2_FB24_Pos
DECL|CAN_F10R2_FB24|macro|CAN_F10R2_FB24
DECL|CAN_F10R2_FB25_Msk|macro|CAN_F10R2_FB25_Msk
DECL|CAN_F10R2_FB25_Pos|macro|CAN_F10R2_FB25_Pos
DECL|CAN_F10R2_FB25|macro|CAN_F10R2_FB25
DECL|CAN_F10R2_FB26_Msk|macro|CAN_F10R2_FB26_Msk
DECL|CAN_F10R2_FB26_Pos|macro|CAN_F10R2_FB26_Pos
DECL|CAN_F10R2_FB26|macro|CAN_F10R2_FB26
DECL|CAN_F10R2_FB27_Msk|macro|CAN_F10R2_FB27_Msk
DECL|CAN_F10R2_FB27_Pos|macro|CAN_F10R2_FB27_Pos
DECL|CAN_F10R2_FB27|macro|CAN_F10R2_FB27
DECL|CAN_F10R2_FB28_Msk|macro|CAN_F10R2_FB28_Msk
DECL|CAN_F10R2_FB28_Pos|macro|CAN_F10R2_FB28_Pos
DECL|CAN_F10R2_FB28|macro|CAN_F10R2_FB28
DECL|CAN_F10R2_FB29_Msk|macro|CAN_F10R2_FB29_Msk
DECL|CAN_F10R2_FB29_Pos|macro|CAN_F10R2_FB29_Pos
DECL|CAN_F10R2_FB29|macro|CAN_F10R2_FB29
DECL|CAN_F10R2_FB2_Msk|macro|CAN_F10R2_FB2_Msk
DECL|CAN_F10R2_FB2_Pos|macro|CAN_F10R2_FB2_Pos
DECL|CAN_F10R2_FB2|macro|CAN_F10R2_FB2
DECL|CAN_F10R2_FB30_Msk|macro|CAN_F10R2_FB30_Msk
DECL|CAN_F10R2_FB30_Pos|macro|CAN_F10R2_FB30_Pos
DECL|CAN_F10R2_FB30|macro|CAN_F10R2_FB30
DECL|CAN_F10R2_FB31_Msk|macro|CAN_F10R2_FB31_Msk
DECL|CAN_F10R2_FB31_Pos|macro|CAN_F10R2_FB31_Pos
DECL|CAN_F10R2_FB31|macro|CAN_F10R2_FB31
DECL|CAN_F10R2_FB3_Msk|macro|CAN_F10R2_FB3_Msk
DECL|CAN_F10R2_FB3_Pos|macro|CAN_F10R2_FB3_Pos
DECL|CAN_F10R2_FB3|macro|CAN_F10R2_FB3
DECL|CAN_F10R2_FB4_Msk|macro|CAN_F10R2_FB4_Msk
DECL|CAN_F10R2_FB4_Pos|macro|CAN_F10R2_FB4_Pos
DECL|CAN_F10R2_FB4|macro|CAN_F10R2_FB4
DECL|CAN_F10R2_FB5_Msk|macro|CAN_F10R2_FB5_Msk
DECL|CAN_F10R2_FB5_Pos|macro|CAN_F10R2_FB5_Pos
DECL|CAN_F10R2_FB5|macro|CAN_F10R2_FB5
DECL|CAN_F10R2_FB6_Msk|macro|CAN_F10R2_FB6_Msk
DECL|CAN_F10R2_FB6_Pos|macro|CAN_F10R2_FB6_Pos
DECL|CAN_F10R2_FB6|macro|CAN_F10R2_FB6
DECL|CAN_F10R2_FB7_Msk|macro|CAN_F10R2_FB7_Msk
DECL|CAN_F10R2_FB7_Pos|macro|CAN_F10R2_FB7_Pos
DECL|CAN_F10R2_FB7|macro|CAN_F10R2_FB7
DECL|CAN_F10R2_FB8_Msk|macro|CAN_F10R2_FB8_Msk
DECL|CAN_F10R2_FB8_Pos|macro|CAN_F10R2_FB8_Pos
DECL|CAN_F10R2_FB8|macro|CAN_F10R2_FB8
DECL|CAN_F10R2_FB9_Msk|macro|CAN_F10R2_FB9_Msk
DECL|CAN_F10R2_FB9_Pos|macro|CAN_F10R2_FB9_Pos
DECL|CAN_F10R2_FB9|macro|CAN_F10R2_FB9
DECL|CAN_F11R1_FB0_Msk|macro|CAN_F11R1_FB0_Msk
DECL|CAN_F11R1_FB0_Pos|macro|CAN_F11R1_FB0_Pos
DECL|CAN_F11R1_FB0|macro|CAN_F11R1_FB0
DECL|CAN_F11R1_FB10_Msk|macro|CAN_F11R1_FB10_Msk
DECL|CAN_F11R1_FB10_Pos|macro|CAN_F11R1_FB10_Pos
DECL|CAN_F11R1_FB10|macro|CAN_F11R1_FB10
DECL|CAN_F11R1_FB11_Msk|macro|CAN_F11R1_FB11_Msk
DECL|CAN_F11R1_FB11_Pos|macro|CAN_F11R1_FB11_Pos
DECL|CAN_F11R1_FB11|macro|CAN_F11R1_FB11
DECL|CAN_F11R1_FB12_Msk|macro|CAN_F11R1_FB12_Msk
DECL|CAN_F11R1_FB12_Pos|macro|CAN_F11R1_FB12_Pos
DECL|CAN_F11R1_FB12|macro|CAN_F11R1_FB12
DECL|CAN_F11R1_FB13_Msk|macro|CAN_F11R1_FB13_Msk
DECL|CAN_F11R1_FB13_Pos|macro|CAN_F11R1_FB13_Pos
DECL|CAN_F11R1_FB13|macro|CAN_F11R1_FB13
DECL|CAN_F11R1_FB14_Msk|macro|CAN_F11R1_FB14_Msk
DECL|CAN_F11R1_FB14_Pos|macro|CAN_F11R1_FB14_Pos
DECL|CAN_F11R1_FB14|macro|CAN_F11R1_FB14
DECL|CAN_F11R1_FB15_Msk|macro|CAN_F11R1_FB15_Msk
DECL|CAN_F11R1_FB15_Pos|macro|CAN_F11R1_FB15_Pos
DECL|CAN_F11R1_FB15|macro|CAN_F11R1_FB15
DECL|CAN_F11R1_FB16_Msk|macro|CAN_F11R1_FB16_Msk
DECL|CAN_F11R1_FB16_Pos|macro|CAN_F11R1_FB16_Pos
DECL|CAN_F11R1_FB16|macro|CAN_F11R1_FB16
DECL|CAN_F11R1_FB17_Msk|macro|CAN_F11R1_FB17_Msk
DECL|CAN_F11R1_FB17_Pos|macro|CAN_F11R1_FB17_Pos
DECL|CAN_F11R1_FB17|macro|CAN_F11R1_FB17
DECL|CAN_F11R1_FB18_Msk|macro|CAN_F11R1_FB18_Msk
DECL|CAN_F11R1_FB18_Pos|macro|CAN_F11R1_FB18_Pos
DECL|CAN_F11R1_FB18|macro|CAN_F11R1_FB18
DECL|CAN_F11R1_FB19_Msk|macro|CAN_F11R1_FB19_Msk
DECL|CAN_F11R1_FB19_Pos|macro|CAN_F11R1_FB19_Pos
DECL|CAN_F11R1_FB19|macro|CAN_F11R1_FB19
DECL|CAN_F11R1_FB1_Msk|macro|CAN_F11R1_FB1_Msk
DECL|CAN_F11R1_FB1_Pos|macro|CAN_F11R1_FB1_Pos
DECL|CAN_F11R1_FB1|macro|CAN_F11R1_FB1
DECL|CAN_F11R1_FB20_Msk|macro|CAN_F11R1_FB20_Msk
DECL|CAN_F11R1_FB20_Pos|macro|CAN_F11R1_FB20_Pos
DECL|CAN_F11R1_FB20|macro|CAN_F11R1_FB20
DECL|CAN_F11R1_FB21_Msk|macro|CAN_F11R1_FB21_Msk
DECL|CAN_F11R1_FB21_Pos|macro|CAN_F11R1_FB21_Pos
DECL|CAN_F11R1_FB21|macro|CAN_F11R1_FB21
DECL|CAN_F11R1_FB22_Msk|macro|CAN_F11R1_FB22_Msk
DECL|CAN_F11R1_FB22_Pos|macro|CAN_F11R1_FB22_Pos
DECL|CAN_F11R1_FB22|macro|CAN_F11R1_FB22
DECL|CAN_F11R1_FB23_Msk|macro|CAN_F11R1_FB23_Msk
DECL|CAN_F11R1_FB23_Pos|macro|CAN_F11R1_FB23_Pos
DECL|CAN_F11R1_FB23|macro|CAN_F11R1_FB23
DECL|CAN_F11R1_FB24_Msk|macro|CAN_F11R1_FB24_Msk
DECL|CAN_F11R1_FB24_Pos|macro|CAN_F11R1_FB24_Pos
DECL|CAN_F11R1_FB24|macro|CAN_F11R1_FB24
DECL|CAN_F11R1_FB25_Msk|macro|CAN_F11R1_FB25_Msk
DECL|CAN_F11R1_FB25_Pos|macro|CAN_F11R1_FB25_Pos
DECL|CAN_F11R1_FB25|macro|CAN_F11R1_FB25
DECL|CAN_F11R1_FB26_Msk|macro|CAN_F11R1_FB26_Msk
DECL|CAN_F11R1_FB26_Pos|macro|CAN_F11R1_FB26_Pos
DECL|CAN_F11R1_FB26|macro|CAN_F11R1_FB26
DECL|CAN_F11R1_FB27_Msk|macro|CAN_F11R1_FB27_Msk
DECL|CAN_F11R1_FB27_Pos|macro|CAN_F11R1_FB27_Pos
DECL|CAN_F11R1_FB27|macro|CAN_F11R1_FB27
DECL|CAN_F11R1_FB28_Msk|macro|CAN_F11R1_FB28_Msk
DECL|CAN_F11R1_FB28_Pos|macro|CAN_F11R1_FB28_Pos
DECL|CAN_F11R1_FB28|macro|CAN_F11R1_FB28
DECL|CAN_F11R1_FB29_Msk|macro|CAN_F11R1_FB29_Msk
DECL|CAN_F11R1_FB29_Pos|macro|CAN_F11R1_FB29_Pos
DECL|CAN_F11R1_FB29|macro|CAN_F11R1_FB29
DECL|CAN_F11R1_FB2_Msk|macro|CAN_F11R1_FB2_Msk
DECL|CAN_F11R1_FB2_Pos|macro|CAN_F11R1_FB2_Pos
DECL|CAN_F11R1_FB2|macro|CAN_F11R1_FB2
DECL|CAN_F11R1_FB30_Msk|macro|CAN_F11R1_FB30_Msk
DECL|CAN_F11R1_FB30_Pos|macro|CAN_F11R1_FB30_Pos
DECL|CAN_F11R1_FB30|macro|CAN_F11R1_FB30
DECL|CAN_F11R1_FB31_Msk|macro|CAN_F11R1_FB31_Msk
DECL|CAN_F11R1_FB31_Pos|macro|CAN_F11R1_FB31_Pos
DECL|CAN_F11R1_FB31|macro|CAN_F11R1_FB31
DECL|CAN_F11R1_FB3_Msk|macro|CAN_F11R1_FB3_Msk
DECL|CAN_F11R1_FB3_Pos|macro|CAN_F11R1_FB3_Pos
DECL|CAN_F11R1_FB3|macro|CAN_F11R1_FB3
DECL|CAN_F11R1_FB4_Msk|macro|CAN_F11R1_FB4_Msk
DECL|CAN_F11R1_FB4_Pos|macro|CAN_F11R1_FB4_Pos
DECL|CAN_F11R1_FB4|macro|CAN_F11R1_FB4
DECL|CAN_F11R1_FB5_Msk|macro|CAN_F11R1_FB5_Msk
DECL|CAN_F11R1_FB5_Pos|macro|CAN_F11R1_FB5_Pos
DECL|CAN_F11R1_FB5|macro|CAN_F11R1_FB5
DECL|CAN_F11R1_FB6_Msk|macro|CAN_F11R1_FB6_Msk
DECL|CAN_F11R1_FB6_Pos|macro|CAN_F11R1_FB6_Pos
DECL|CAN_F11R1_FB6|macro|CAN_F11R1_FB6
DECL|CAN_F11R1_FB7_Msk|macro|CAN_F11R1_FB7_Msk
DECL|CAN_F11R1_FB7_Pos|macro|CAN_F11R1_FB7_Pos
DECL|CAN_F11R1_FB7|macro|CAN_F11R1_FB7
DECL|CAN_F11R1_FB8_Msk|macro|CAN_F11R1_FB8_Msk
DECL|CAN_F11R1_FB8_Pos|macro|CAN_F11R1_FB8_Pos
DECL|CAN_F11R1_FB8|macro|CAN_F11R1_FB8
DECL|CAN_F11R1_FB9_Msk|macro|CAN_F11R1_FB9_Msk
DECL|CAN_F11R1_FB9_Pos|macro|CAN_F11R1_FB9_Pos
DECL|CAN_F11R1_FB9|macro|CAN_F11R1_FB9
DECL|CAN_F11R2_FB0_Msk|macro|CAN_F11R2_FB0_Msk
DECL|CAN_F11R2_FB0_Pos|macro|CAN_F11R2_FB0_Pos
DECL|CAN_F11R2_FB0|macro|CAN_F11R2_FB0
DECL|CAN_F11R2_FB10_Msk|macro|CAN_F11R2_FB10_Msk
DECL|CAN_F11R2_FB10_Pos|macro|CAN_F11R2_FB10_Pos
DECL|CAN_F11R2_FB10|macro|CAN_F11R2_FB10
DECL|CAN_F11R2_FB11_Msk|macro|CAN_F11R2_FB11_Msk
DECL|CAN_F11R2_FB11_Pos|macro|CAN_F11R2_FB11_Pos
DECL|CAN_F11R2_FB11|macro|CAN_F11R2_FB11
DECL|CAN_F11R2_FB12_Msk|macro|CAN_F11R2_FB12_Msk
DECL|CAN_F11R2_FB12_Pos|macro|CAN_F11R2_FB12_Pos
DECL|CAN_F11R2_FB12|macro|CAN_F11R2_FB12
DECL|CAN_F11R2_FB13_Msk|macro|CAN_F11R2_FB13_Msk
DECL|CAN_F11R2_FB13_Pos|macro|CAN_F11R2_FB13_Pos
DECL|CAN_F11R2_FB13|macro|CAN_F11R2_FB13
DECL|CAN_F11R2_FB14_Msk|macro|CAN_F11R2_FB14_Msk
DECL|CAN_F11R2_FB14_Pos|macro|CAN_F11R2_FB14_Pos
DECL|CAN_F11R2_FB14|macro|CAN_F11R2_FB14
DECL|CAN_F11R2_FB15_Msk|macro|CAN_F11R2_FB15_Msk
DECL|CAN_F11R2_FB15_Pos|macro|CAN_F11R2_FB15_Pos
DECL|CAN_F11R2_FB15|macro|CAN_F11R2_FB15
DECL|CAN_F11R2_FB16_Msk|macro|CAN_F11R2_FB16_Msk
DECL|CAN_F11R2_FB16_Pos|macro|CAN_F11R2_FB16_Pos
DECL|CAN_F11R2_FB16|macro|CAN_F11R2_FB16
DECL|CAN_F11R2_FB17_Msk|macro|CAN_F11R2_FB17_Msk
DECL|CAN_F11R2_FB17_Pos|macro|CAN_F11R2_FB17_Pos
DECL|CAN_F11R2_FB17|macro|CAN_F11R2_FB17
DECL|CAN_F11R2_FB18_Msk|macro|CAN_F11R2_FB18_Msk
DECL|CAN_F11R2_FB18_Pos|macro|CAN_F11R2_FB18_Pos
DECL|CAN_F11R2_FB18|macro|CAN_F11R2_FB18
DECL|CAN_F11R2_FB19_Msk|macro|CAN_F11R2_FB19_Msk
DECL|CAN_F11R2_FB19_Pos|macro|CAN_F11R2_FB19_Pos
DECL|CAN_F11R2_FB19|macro|CAN_F11R2_FB19
DECL|CAN_F11R2_FB1_Msk|macro|CAN_F11R2_FB1_Msk
DECL|CAN_F11R2_FB1_Pos|macro|CAN_F11R2_FB1_Pos
DECL|CAN_F11R2_FB1|macro|CAN_F11R2_FB1
DECL|CAN_F11R2_FB20_Msk|macro|CAN_F11R2_FB20_Msk
DECL|CAN_F11R2_FB20_Pos|macro|CAN_F11R2_FB20_Pos
DECL|CAN_F11R2_FB20|macro|CAN_F11R2_FB20
DECL|CAN_F11R2_FB21_Msk|macro|CAN_F11R2_FB21_Msk
DECL|CAN_F11R2_FB21_Pos|macro|CAN_F11R2_FB21_Pos
DECL|CAN_F11R2_FB21|macro|CAN_F11R2_FB21
DECL|CAN_F11R2_FB22_Msk|macro|CAN_F11R2_FB22_Msk
DECL|CAN_F11R2_FB22_Pos|macro|CAN_F11R2_FB22_Pos
DECL|CAN_F11R2_FB22|macro|CAN_F11R2_FB22
DECL|CAN_F11R2_FB23_Msk|macro|CAN_F11R2_FB23_Msk
DECL|CAN_F11R2_FB23_Pos|macro|CAN_F11R2_FB23_Pos
DECL|CAN_F11R2_FB23|macro|CAN_F11R2_FB23
DECL|CAN_F11R2_FB24_Msk|macro|CAN_F11R2_FB24_Msk
DECL|CAN_F11R2_FB24_Pos|macro|CAN_F11R2_FB24_Pos
DECL|CAN_F11R2_FB24|macro|CAN_F11R2_FB24
DECL|CAN_F11R2_FB25_Msk|macro|CAN_F11R2_FB25_Msk
DECL|CAN_F11R2_FB25_Pos|macro|CAN_F11R2_FB25_Pos
DECL|CAN_F11R2_FB25|macro|CAN_F11R2_FB25
DECL|CAN_F11R2_FB26_Msk|macro|CAN_F11R2_FB26_Msk
DECL|CAN_F11R2_FB26_Pos|macro|CAN_F11R2_FB26_Pos
DECL|CAN_F11R2_FB26|macro|CAN_F11R2_FB26
DECL|CAN_F11R2_FB27_Msk|macro|CAN_F11R2_FB27_Msk
DECL|CAN_F11R2_FB27_Pos|macro|CAN_F11R2_FB27_Pos
DECL|CAN_F11R2_FB27|macro|CAN_F11R2_FB27
DECL|CAN_F11R2_FB28_Msk|macro|CAN_F11R2_FB28_Msk
DECL|CAN_F11R2_FB28_Pos|macro|CAN_F11R2_FB28_Pos
DECL|CAN_F11R2_FB28|macro|CAN_F11R2_FB28
DECL|CAN_F11R2_FB29_Msk|macro|CAN_F11R2_FB29_Msk
DECL|CAN_F11R2_FB29_Pos|macro|CAN_F11R2_FB29_Pos
DECL|CAN_F11R2_FB29|macro|CAN_F11R2_FB29
DECL|CAN_F11R2_FB2_Msk|macro|CAN_F11R2_FB2_Msk
DECL|CAN_F11R2_FB2_Pos|macro|CAN_F11R2_FB2_Pos
DECL|CAN_F11R2_FB2|macro|CAN_F11R2_FB2
DECL|CAN_F11R2_FB30_Msk|macro|CAN_F11R2_FB30_Msk
DECL|CAN_F11R2_FB30_Pos|macro|CAN_F11R2_FB30_Pos
DECL|CAN_F11R2_FB30|macro|CAN_F11R2_FB30
DECL|CAN_F11R2_FB31_Msk|macro|CAN_F11R2_FB31_Msk
DECL|CAN_F11R2_FB31_Pos|macro|CAN_F11R2_FB31_Pos
DECL|CAN_F11R2_FB31|macro|CAN_F11R2_FB31
DECL|CAN_F11R2_FB3_Msk|macro|CAN_F11R2_FB3_Msk
DECL|CAN_F11R2_FB3_Pos|macro|CAN_F11R2_FB3_Pos
DECL|CAN_F11R2_FB3|macro|CAN_F11R2_FB3
DECL|CAN_F11R2_FB4_Msk|macro|CAN_F11R2_FB4_Msk
DECL|CAN_F11R2_FB4_Pos|macro|CAN_F11R2_FB4_Pos
DECL|CAN_F11R2_FB4|macro|CAN_F11R2_FB4
DECL|CAN_F11R2_FB5_Msk|macro|CAN_F11R2_FB5_Msk
DECL|CAN_F11R2_FB5_Pos|macro|CAN_F11R2_FB5_Pos
DECL|CAN_F11R2_FB5|macro|CAN_F11R2_FB5
DECL|CAN_F11R2_FB6_Msk|macro|CAN_F11R2_FB6_Msk
DECL|CAN_F11R2_FB6_Pos|macro|CAN_F11R2_FB6_Pos
DECL|CAN_F11R2_FB6|macro|CAN_F11R2_FB6
DECL|CAN_F11R2_FB7_Msk|macro|CAN_F11R2_FB7_Msk
DECL|CAN_F11R2_FB7_Pos|macro|CAN_F11R2_FB7_Pos
DECL|CAN_F11R2_FB7|macro|CAN_F11R2_FB7
DECL|CAN_F11R2_FB8_Msk|macro|CAN_F11R2_FB8_Msk
DECL|CAN_F11R2_FB8_Pos|macro|CAN_F11R2_FB8_Pos
DECL|CAN_F11R2_FB8|macro|CAN_F11R2_FB8
DECL|CAN_F11R2_FB9_Msk|macro|CAN_F11R2_FB9_Msk
DECL|CAN_F11R2_FB9_Pos|macro|CAN_F11R2_FB9_Pos
DECL|CAN_F11R2_FB9|macro|CAN_F11R2_FB9
DECL|CAN_F12R1_FB0_Msk|macro|CAN_F12R1_FB0_Msk
DECL|CAN_F12R1_FB0_Pos|macro|CAN_F12R1_FB0_Pos
DECL|CAN_F12R1_FB0|macro|CAN_F12R1_FB0
DECL|CAN_F12R1_FB10_Msk|macro|CAN_F12R1_FB10_Msk
DECL|CAN_F12R1_FB10_Pos|macro|CAN_F12R1_FB10_Pos
DECL|CAN_F12R1_FB10|macro|CAN_F12R1_FB10
DECL|CAN_F12R1_FB11_Msk|macro|CAN_F12R1_FB11_Msk
DECL|CAN_F12R1_FB11_Pos|macro|CAN_F12R1_FB11_Pos
DECL|CAN_F12R1_FB11|macro|CAN_F12R1_FB11
DECL|CAN_F12R1_FB12_Msk|macro|CAN_F12R1_FB12_Msk
DECL|CAN_F12R1_FB12_Pos|macro|CAN_F12R1_FB12_Pos
DECL|CAN_F12R1_FB12|macro|CAN_F12R1_FB12
DECL|CAN_F12R1_FB13_Msk|macro|CAN_F12R1_FB13_Msk
DECL|CAN_F12R1_FB13_Pos|macro|CAN_F12R1_FB13_Pos
DECL|CAN_F12R1_FB13|macro|CAN_F12R1_FB13
DECL|CAN_F12R1_FB14_Msk|macro|CAN_F12R1_FB14_Msk
DECL|CAN_F12R1_FB14_Pos|macro|CAN_F12R1_FB14_Pos
DECL|CAN_F12R1_FB14|macro|CAN_F12R1_FB14
DECL|CAN_F12R1_FB15_Msk|macro|CAN_F12R1_FB15_Msk
DECL|CAN_F12R1_FB15_Pos|macro|CAN_F12R1_FB15_Pos
DECL|CAN_F12R1_FB15|macro|CAN_F12R1_FB15
DECL|CAN_F12R1_FB16_Msk|macro|CAN_F12R1_FB16_Msk
DECL|CAN_F12R1_FB16_Pos|macro|CAN_F12R1_FB16_Pos
DECL|CAN_F12R1_FB16|macro|CAN_F12R1_FB16
DECL|CAN_F12R1_FB17_Msk|macro|CAN_F12R1_FB17_Msk
DECL|CAN_F12R1_FB17_Pos|macro|CAN_F12R1_FB17_Pos
DECL|CAN_F12R1_FB17|macro|CAN_F12R1_FB17
DECL|CAN_F12R1_FB18_Msk|macro|CAN_F12R1_FB18_Msk
DECL|CAN_F12R1_FB18_Pos|macro|CAN_F12R1_FB18_Pos
DECL|CAN_F12R1_FB18|macro|CAN_F12R1_FB18
DECL|CAN_F12R1_FB19_Msk|macro|CAN_F12R1_FB19_Msk
DECL|CAN_F12R1_FB19_Pos|macro|CAN_F12R1_FB19_Pos
DECL|CAN_F12R1_FB19|macro|CAN_F12R1_FB19
DECL|CAN_F12R1_FB1_Msk|macro|CAN_F12R1_FB1_Msk
DECL|CAN_F12R1_FB1_Pos|macro|CAN_F12R1_FB1_Pos
DECL|CAN_F12R1_FB1|macro|CAN_F12R1_FB1
DECL|CAN_F12R1_FB20_Msk|macro|CAN_F12R1_FB20_Msk
DECL|CAN_F12R1_FB20_Pos|macro|CAN_F12R1_FB20_Pos
DECL|CAN_F12R1_FB20|macro|CAN_F12R1_FB20
DECL|CAN_F12R1_FB21_Msk|macro|CAN_F12R1_FB21_Msk
DECL|CAN_F12R1_FB21_Pos|macro|CAN_F12R1_FB21_Pos
DECL|CAN_F12R1_FB21|macro|CAN_F12R1_FB21
DECL|CAN_F12R1_FB22_Msk|macro|CAN_F12R1_FB22_Msk
DECL|CAN_F12R1_FB22_Pos|macro|CAN_F12R1_FB22_Pos
DECL|CAN_F12R1_FB22|macro|CAN_F12R1_FB22
DECL|CAN_F12R1_FB23_Msk|macro|CAN_F12R1_FB23_Msk
DECL|CAN_F12R1_FB23_Pos|macro|CAN_F12R1_FB23_Pos
DECL|CAN_F12R1_FB23|macro|CAN_F12R1_FB23
DECL|CAN_F12R1_FB24_Msk|macro|CAN_F12R1_FB24_Msk
DECL|CAN_F12R1_FB24_Pos|macro|CAN_F12R1_FB24_Pos
DECL|CAN_F12R1_FB24|macro|CAN_F12R1_FB24
DECL|CAN_F12R1_FB25_Msk|macro|CAN_F12R1_FB25_Msk
DECL|CAN_F12R1_FB25_Pos|macro|CAN_F12R1_FB25_Pos
DECL|CAN_F12R1_FB25|macro|CAN_F12R1_FB25
DECL|CAN_F12R1_FB26_Msk|macro|CAN_F12R1_FB26_Msk
DECL|CAN_F12R1_FB26_Pos|macro|CAN_F12R1_FB26_Pos
DECL|CAN_F12R1_FB26|macro|CAN_F12R1_FB26
DECL|CAN_F12R1_FB27_Msk|macro|CAN_F12R1_FB27_Msk
DECL|CAN_F12R1_FB27_Pos|macro|CAN_F12R1_FB27_Pos
DECL|CAN_F12R1_FB27|macro|CAN_F12R1_FB27
DECL|CAN_F12R1_FB28_Msk|macro|CAN_F12R1_FB28_Msk
DECL|CAN_F12R1_FB28_Pos|macro|CAN_F12R1_FB28_Pos
DECL|CAN_F12R1_FB28|macro|CAN_F12R1_FB28
DECL|CAN_F12R1_FB29_Msk|macro|CAN_F12R1_FB29_Msk
DECL|CAN_F12R1_FB29_Pos|macro|CAN_F12R1_FB29_Pos
DECL|CAN_F12R1_FB29|macro|CAN_F12R1_FB29
DECL|CAN_F12R1_FB2_Msk|macro|CAN_F12R1_FB2_Msk
DECL|CAN_F12R1_FB2_Pos|macro|CAN_F12R1_FB2_Pos
DECL|CAN_F12R1_FB2|macro|CAN_F12R1_FB2
DECL|CAN_F12R1_FB30_Msk|macro|CAN_F12R1_FB30_Msk
DECL|CAN_F12R1_FB30_Pos|macro|CAN_F12R1_FB30_Pos
DECL|CAN_F12R1_FB30|macro|CAN_F12R1_FB30
DECL|CAN_F12R1_FB31_Msk|macro|CAN_F12R1_FB31_Msk
DECL|CAN_F12R1_FB31_Pos|macro|CAN_F12R1_FB31_Pos
DECL|CAN_F12R1_FB31|macro|CAN_F12R1_FB31
DECL|CAN_F12R1_FB3_Msk|macro|CAN_F12R1_FB3_Msk
DECL|CAN_F12R1_FB3_Pos|macro|CAN_F12R1_FB3_Pos
DECL|CAN_F12R1_FB3|macro|CAN_F12R1_FB3
DECL|CAN_F12R1_FB4_Msk|macro|CAN_F12R1_FB4_Msk
DECL|CAN_F12R1_FB4_Pos|macro|CAN_F12R1_FB4_Pos
DECL|CAN_F12R1_FB4|macro|CAN_F12R1_FB4
DECL|CAN_F12R1_FB5_Msk|macro|CAN_F12R1_FB5_Msk
DECL|CAN_F12R1_FB5_Pos|macro|CAN_F12R1_FB5_Pos
DECL|CAN_F12R1_FB5|macro|CAN_F12R1_FB5
DECL|CAN_F12R1_FB6_Msk|macro|CAN_F12R1_FB6_Msk
DECL|CAN_F12R1_FB6_Pos|macro|CAN_F12R1_FB6_Pos
DECL|CAN_F12R1_FB6|macro|CAN_F12R1_FB6
DECL|CAN_F12R1_FB7_Msk|macro|CAN_F12R1_FB7_Msk
DECL|CAN_F12R1_FB7_Pos|macro|CAN_F12R1_FB7_Pos
DECL|CAN_F12R1_FB7|macro|CAN_F12R1_FB7
DECL|CAN_F12R1_FB8_Msk|macro|CAN_F12R1_FB8_Msk
DECL|CAN_F12R1_FB8_Pos|macro|CAN_F12R1_FB8_Pos
DECL|CAN_F12R1_FB8|macro|CAN_F12R1_FB8
DECL|CAN_F12R1_FB9_Msk|macro|CAN_F12R1_FB9_Msk
DECL|CAN_F12R1_FB9_Pos|macro|CAN_F12R1_FB9_Pos
DECL|CAN_F12R1_FB9|macro|CAN_F12R1_FB9
DECL|CAN_F12R2_FB0_Msk|macro|CAN_F12R2_FB0_Msk
DECL|CAN_F12R2_FB0_Pos|macro|CAN_F12R2_FB0_Pos
DECL|CAN_F12R2_FB0|macro|CAN_F12R2_FB0
DECL|CAN_F12R2_FB10_Msk|macro|CAN_F12R2_FB10_Msk
DECL|CAN_F12R2_FB10_Pos|macro|CAN_F12R2_FB10_Pos
DECL|CAN_F12R2_FB10|macro|CAN_F12R2_FB10
DECL|CAN_F12R2_FB11_Msk|macro|CAN_F12R2_FB11_Msk
DECL|CAN_F12R2_FB11_Pos|macro|CAN_F12R2_FB11_Pos
DECL|CAN_F12R2_FB11|macro|CAN_F12R2_FB11
DECL|CAN_F12R2_FB12_Msk|macro|CAN_F12R2_FB12_Msk
DECL|CAN_F12R2_FB12_Pos|macro|CAN_F12R2_FB12_Pos
DECL|CAN_F12R2_FB12|macro|CAN_F12R2_FB12
DECL|CAN_F12R2_FB13_Msk|macro|CAN_F12R2_FB13_Msk
DECL|CAN_F12R2_FB13_Pos|macro|CAN_F12R2_FB13_Pos
DECL|CAN_F12R2_FB13|macro|CAN_F12R2_FB13
DECL|CAN_F12R2_FB14_Msk|macro|CAN_F12R2_FB14_Msk
DECL|CAN_F12R2_FB14_Pos|macro|CAN_F12R2_FB14_Pos
DECL|CAN_F12R2_FB14|macro|CAN_F12R2_FB14
DECL|CAN_F12R2_FB15_Msk|macro|CAN_F12R2_FB15_Msk
DECL|CAN_F12R2_FB15_Pos|macro|CAN_F12R2_FB15_Pos
DECL|CAN_F12R2_FB15|macro|CAN_F12R2_FB15
DECL|CAN_F12R2_FB16_Msk|macro|CAN_F12R2_FB16_Msk
DECL|CAN_F12R2_FB16_Pos|macro|CAN_F12R2_FB16_Pos
DECL|CAN_F12R2_FB16|macro|CAN_F12R2_FB16
DECL|CAN_F12R2_FB17_Msk|macro|CAN_F12R2_FB17_Msk
DECL|CAN_F12R2_FB17_Pos|macro|CAN_F12R2_FB17_Pos
DECL|CAN_F12R2_FB17|macro|CAN_F12R2_FB17
DECL|CAN_F12R2_FB18_Msk|macro|CAN_F12R2_FB18_Msk
DECL|CAN_F12R2_FB18_Pos|macro|CAN_F12R2_FB18_Pos
DECL|CAN_F12R2_FB18|macro|CAN_F12R2_FB18
DECL|CAN_F12R2_FB19_Msk|macro|CAN_F12R2_FB19_Msk
DECL|CAN_F12R2_FB19_Pos|macro|CAN_F12R2_FB19_Pos
DECL|CAN_F12R2_FB19|macro|CAN_F12R2_FB19
DECL|CAN_F12R2_FB1_Msk|macro|CAN_F12R2_FB1_Msk
DECL|CAN_F12R2_FB1_Pos|macro|CAN_F12R2_FB1_Pos
DECL|CAN_F12R2_FB1|macro|CAN_F12R2_FB1
DECL|CAN_F12R2_FB20_Msk|macro|CAN_F12R2_FB20_Msk
DECL|CAN_F12R2_FB20_Pos|macro|CAN_F12R2_FB20_Pos
DECL|CAN_F12R2_FB20|macro|CAN_F12R2_FB20
DECL|CAN_F12R2_FB21_Msk|macro|CAN_F12R2_FB21_Msk
DECL|CAN_F12R2_FB21_Pos|macro|CAN_F12R2_FB21_Pos
DECL|CAN_F12R2_FB21|macro|CAN_F12R2_FB21
DECL|CAN_F12R2_FB22_Msk|macro|CAN_F12R2_FB22_Msk
DECL|CAN_F12R2_FB22_Pos|macro|CAN_F12R2_FB22_Pos
DECL|CAN_F12R2_FB22|macro|CAN_F12R2_FB22
DECL|CAN_F12R2_FB23_Msk|macro|CAN_F12R2_FB23_Msk
DECL|CAN_F12R2_FB23_Pos|macro|CAN_F12R2_FB23_Pos
DECL|CAN_F12R2_FB23|macro|CAN_F12R2_FB23
DECL|CAN_F12R2_FB24_Msk|macro|CAN_F12R2_FB24_Msk
DECL|CAN_F12R2_FB24_Pos|macro|CAN_F12R2_FB24_Pos
DECL|CAN_F12R2_FB24|macro|CAN_F12R2_FB24
DECL|CAN_F12R2_FB25_Msk|macro|CAN_F12R2_FB25_Msk
DECL|CAN_F12R2_FB25_Pos|macro|CAN_F12R2_FB25_Pos
DECL|CAN_F12R2_FB25|macro|CAN_F12R2_FB25
DECL|CAN_F12R2_FB26_Msk|macro|CAN_F12R2_FB26_Msk
DECL|CAN_F12R2_FB26_Pos|macro|CAN_F12R2_FB26_Pos
DECL|CAN_F12R2_FB26|macro|CAN_F12R2_FB26
DECL|CAN_F12R2_FB27_Msk|macro|CAN_F12R2_FB27_Msk
DECL|CAN_F12R2_FB27_Pos|macro|CAN_F12R2_FB27_Pos
DECL|CAN_F12R2_FB27|macro|CAN_F12R2_FB27
DECL|CAN_F12R2_FB28_Msk|macro|CAN_F12R2_FB28_Msk
DECL|CAN_F12R2_FB28_Pos|macro|CAN_F12R2_FB28_Pos
DECL|CAN_F12R2_FB28|macro|CAN_F12R2_FB28
DECL|CAN_F12R2_FB29_Msk|macro|CAN_F12R2_FB29_Msk
DECL|CAN_F12R2_FB29_Pos|macro|CAN_F12R2_FB29_Pos
DECL|CAN_F12R2_FB29|macro|CAN_F12R2_FB29
DECL|CAN_F12R2_FB2_Msk|macro|CAN_F12R2_FB2_Msk
DECL|CAN_F12R2_FB2_Pos|macro|CAN_F12R2_FB2_Pos
DECL|CAN_F12R2_FB2|macro|CAN_F12R2_FB2
DECL|CAN_F12R2_FB30_Msk|macro|CAN_F12R2_FB30_Msk
DECL|CAN_F12R2_FB30_Pos|macro|CAN_F12R2_FB30_Pos
DECL|CAN_F12R2_FB30|macro|CAN_F12R2_FB30
DECL|CAN_F12R2_FB31_Msk|macro|CAN_F12R2_FB31_Msk
DECL|CAN_F12R2_FB31_Pos|macro|CAN_F12R2_FB31_Pos
DECL|CAN_F12R2_FB31|macro|CAN_F12R2_FB31
DECL|CAN_F12R2_FB3_Msk|macro|CAN_F12R2_FB3_Msk
DECL|CAN_F12R2_FB3_Pos|macro|CAN_F12R2_FB3_Pos
DECL|CAN_F12R2_FB3|macro|CAN_F12R2_FB3
DECL|CAN_F12R2_FB4_Msk|macro|CAN_F12R2_FB4_Msk
DECL|CAN_F12R2_FB4_Pos|macro|CAN_F12R2_FB4_Pos
DECL|CAN_F12R2_FB4|macro|CAN_F12R2_FB4
DECL|CAN_F12R2_FB5_Msk|macro|CAN_F12R2_FB5_Msk
DECL|CAN_F12R2_FB5_Pos|macro|CAN_F12R2_FB5_Pos
DECL|CAN_F12R2_FB5|macro|CAN_F12R2_FB5
DECL|CAN_F12R2_FB6_Msk|macro|CAN_F12R2_FB6_Msk
DECL|CAN_F12R2_FB6_Pos|macro|CAN_F12R2_FB6_Pos
DECL|CAN_F12R2_FB6|macro|CAN_F12R2_FB6
DECL|CAN_F12R2_FB7_Msk|macro|CAN_F12R2_FB7_Msk
DECL|CAN_F12R2_FB7_Pos|macro|CAN_F12R2_FB7_Pos
DECL|CAN_F12R2_FB7|macro|CAN_F12R2_FB7
DECL|CAN_F12R2_FB8_Msk|macro|CAN_F12R2_FB8_Msk
DECL|CAN_F12R2_FB8_Pos|macro|CAN_F12R2_FB8_Pos
DECL|CAN_F12R2_FB8|macro|CAN_F12R2_FB8
DECL|CAN_F12R2_FB9_Msk|macro|CAN_F12R2_FB9_Msk
DECL|CAN_F12R2_FB9_Pos|macro|CAN_F12R2_FB9_Pos
DECL|CAN_F12R2_FB9|macro|CAN_F12R2_FB9
DECL|CAN_F13R1_FB0_Msk|macro|CAN_F13R1_FB0_Msk
DECL|CAN_F13R1_FB0_Pos|macro|CAN_F13R1_FB0_Pos
DECL|CAN_F13R1_FB0|macro|CAN_F13R1_FB0
DECL|CAN_F13R1_FB10_Msk|macro|CAN_F13R1_FB10_Msk
DECL|CAN_F13R1_FB10_Pos|macro|CAN_F13R1_FB10_Pos
DECL|CAN_F13R1_FB10|macro|CAN_F13R1_FB10
DECL|CAN_F13R1_FB11_Msk|macro|CAN_F13R1_FB11_Msk
DECL|CAN_F13R1_FB11_Pos|macro|CAN_F13R1_FB11_Pos
DECL|CAN_F13R1_FB11|macro|CAN_F13R1_FB11
DECL|CAN_F13R1_FB12_Msk|macro|CAN_F13R1_FB12_Msk
DECL|CAN_F13R1_FB12_Pos|macro|CAN_F13R1_FB12_Pos
DECL|CAN_F13R1_FB12|macro|CAN_F13R1_FB12
DECL|CAN_F13R1_FB13_Msk|macro|CAN_F13R1_FB13_Msk
DECL|CAN_F13R1_FB13_Pos|macro|CAN_F13R1_FB13_Pos
DECL|CAN_F13R1_FB13|macro|CAN_F13R1_FB13
DECL|CAN_F13R1_FB14_Msk|macro|CAN_F13R1_FB14_Msk
DECL|CAN_F13R1_FB14_Pos|macro|CAN_F13R1_FB14_Pos
DECL|CAN_F13R1_FB14|macro|CAN_F13R1_FB14
DECL|CAN_F13R1_FB15_Msk|macro|CAN_F13R1_FB15_Msk
DECL|CAN_F13R1_FB15_Pos|macro|CAN_F13R1_FB15_Pos
DECL|CAN_F13R1_FB15|macro|CAN_F13R1_FB15
DECL|CAN_F13R1_FB16_Msk|macro|CAN_F13R1_FB16_Msk
DECL|CAN_F13R1_FB16_Pos|macro|CAN_F13R1_FB16_Pos
DECL|CAN_F13R1_FB16|macro|CAN_F13R1_FB16
DECL|CAN_F13R1_FB17_Msk|macro|CAN_F13R1_FB17_Msk
DECL|CAN_F13R1_FB17_Pos|macro|CAN_F13R1_FB17_Pos
DECL|CAN_F13R1_FB17|macro|CAN_F13R1_FB17
DECL|CAN_F13R1_FB18_Msk|macro|CAN_F13R1_FB18_Msk
DECL|CAN_F13R1_FB18_Pos|macro|CAN_F13R1_FB18_Pos
DECL|CAN_F13R1_FB18|macro|CAN_F13R1_FB18
DECL|CAN_F13R1_FB19_Msk|macro|CAN_F13R1_FB19_Msk
DECL|CAN_F13R1_FB19_Pos|macro|CAN_F13R1_FB19_Pos
DECL|CAN_F13R1_FB19|macro|CAN_F13R1_FB19
DECL|CAN_F13R1_FB1_Msk|macro|CAN_F13R1_FB1_Msk
DECL|CAN_F13R1_FB1_Pos|macro|CAN_F13R1_FB1_Pos
DECL|CAN_F13R1_FB1|macro|CAN_F13R1_FB1
DECL|CAN_F13R1_FB20_Msk|macro|CAN_F13R1_FB20_Msk
DECL|CAN_F13R1_FB20_Pos|macro|CAN_F13R1_FB20_Pos
DECL|CAN_F13R1_FB20|macro|CAN_F13R1_FB20
DECL|CAN_F13R1_FB21_Msk|macro|CAN_F13R1_FB21_Msk
DECL|CAN_F13R1_FB21_Pos|macro|CAN_F13R1_FB21_Pos
DECL|CAN_F13R1_FB21|macro|CAN_F13R1_FB21
DECL|CAN_F13R1_FB22_Msk|macro|CAN_F13R1_FB22_Msk
DECL|CAN_F13R1_FB22_Pos|macro|CAN_F13R1_FB22_Pos
DECL|CAN_F13R1_FB22|macro|CAN_F13R1_FB22
DECL|CAN_F13R1_FB23_Msk|macro|CAN_F13R1_FB23_Msk
DECL|CAN_F13R1_FB23_Pos|macro|CAN_F13R1_FB23_Pos
DECL|CAN_F13R1_FB23|macro|CAN_F13R1_FB23
DECL|CAN_F13R1_FB24_Msk|macro|CAN_F13R1_FB24_Msk
DECL|CAN_F13R1_FB24_Pos|macro|CAN_F13R1_FB24_Pos
DECL|CAN_F13R1_FB24|macro|CAN_F13R1_FB24
DECL|CAN_F13R1_FB25_Msk|macro|CAN_F13R1_FB25_Msk
DECL|CAN_F13R1_FB25_Pos|macro|CAN_F13R1_FB25_Pos
DECL|CAN_F13R1_FB25|macro|CAN_F13R1_FB25
DECL|CAN_F13R1_FB26_Msk|macro|CAN_F13R1_FB26_Msk
DECL|CAN_F13R1_FB26_Pos|macro|CAN_F13R1_FB26_Pos
DECL|CAN_F13R1_FB26|macro|CAN_F13R1_FB26
DECL|CAN_F13R1_FB27_Msk|macro|CAN_F13R1_FB27_Msk
DECL|CAN_F13R1_FB27_Pos|macro|CAN_F13R1_FB27_Pos
DECL|CAN_F13R1_FB27|macro|CAN_F13R1_FB27
DECL|CAN_F13R1_FB28_Msk|macro|CAN_F13R1_FB28_Msk
DECL|CAN_F13R1_FB28_Pos|macro|CAN_F13R1_FB28_Pos
DECL|CAN_F13R1_FB28|macro|CAN_F13R1_FB28
DECL|CAN_F13R1_FB29_Msk|macro|CAN_F13R1_FB29_Msk
DECL|CAN_F13R1_FB29_Pos|macro|CAN_F13R1_FB29_Pos
DECL|CAN_F13R1_FB29|macro|CAN_F13R1_FB29
DECL|CAN_F13R1_FB2_Msk|macro|CAN_F13R1_FB2_Msk
DECL|CAN_F13R1_FB2_Pos|macro|CAN_F13R1_FB2_Pos
DECL|CAN_F13R1_FB2|macro|CAN_F13R1_FB2
DECL|CAN_F13R1_FB30_Msk|macro|CAN_F13R1_FB30_Msk
DECL|CAN_F13R1_FB30_Pos|macro|CAN_F13R1_FB30_Pos
DECL|CAN_F13R1_FB30|macro|CAN_F13R1_FB30
DECL|CAN_F13R1_FB31_Msk|macro|CAN_F13R1_FB31_Msk
DECL|CAN_F13R1_FB31_Pos|macro|CAN_F13R1_FB31_Pos
DECL|CAN_F13R1_FB31|macro|CAN_F13R1_FB31
DECL|CAN_F13R1_FB3_Msk|macro|CAN_F13R1_FB3_Msk
DECL|CAN_F13R1_FB3_Pos|macro|CAN_F13R1_FB3_Pos
DECL|CAN_F13R1_FB3|macro|CAN_F13R1_FB3
DECL|CAN_F13R1_FB4_Msk|macro|CAN_F13R1_FB4_Msk
DECL|CAN_F13R1_FB4_Pos|macro|CAN_F13R1_FB4_Pos
DECL|CAN_F13R1_FB4|macro|CAN_F13R1_FB4
DECL|CAN_F13R1_FB5_Msk|macro|CAN_F13R1_FB5_Msk
DECL|CAN_F13R1_FB5_Pos|macro|CAN_F13R1_FB5_Pos
DECL|CAN_F13R1_FB5|macro|CAN_F13R1_FB5
DECL|CAN_F13R1_FB6_Msk|macro|CAN_F13R1_FB6_Msk
DECL|CAN_F13R1_FB6_Pos|macro|CAN_F13R1_FB6_Pos
DECL|CAN_F13R1_FB6|macro|CAN_F13R1_FB6
DECL|CAN_F13R1_FB7_Msk|macro|CAN_F13R1_FB7_Msk
DECL|CAN_F13R1_FB7_Pos|macro|CAN_F13R1_FB7_Pos
DECL|CAN_F13R1_FB7|macro|CAN_F13R1_FB7
DECL|CAN_F13R1_FB8_Msk|macro|CAN_F13R1_FB8_Msk
DECL|CAN_F13R1_FB8_Pos|macro|CAN_F13R1_FB8_Pos
DECL|CAN_F13R1_FB8|macro|CAN_F13R1_FB8
DECL|CAN_F13R1_FB9_Msk|macro|CAN_F13R1_FB9_Msk
DECL|CAN_F13R1_FB9_Pos|macro|CAN_F13R1_FB9_Pos
DECL|CAN_F13R1_FB9|macro|CAN_F13R1_FB9
DECL|CAN_F13R2_FB0_Msk|macro|CAN_F13R2_FB0_Msk
DECL|CAN_F13R2_FB0_Pos|macro|CAN_F13R2_FB0_Pos
DECL|CAN_F13R2_FB0|macro|CAN_F13R2_FB0
DECL|CAN_F13R2_FB10_Msk|macro|CAN_F13R2_FB10_Msk
DECL|CAN_F13R2_FB10_Pos|macro|CAN_F13R2_FB10_Pos
DECL|CAN_F13R2_FB10|macro|CAN_F13R2_FB10
DECL|CAN_F13R2_FB11_Msk|macro|CAN_F13R2_FB11_Msk
DECL|CAN_F13R2_FB11_Pos|macro|CAN_F13R2_FB11_Pos
DECL|CAN_F13R2_FB11|macro|CAN_F13R2_FB11
DECL|CAN_F13R2_FB12_Msk|macro|CAN_F13R2_FB12_Msk
DECL|CAN_F13R2_FB12_Pos|macro|CAN_F13R2_FB12_Pos
DECL|CAN_F13R2_FB12|macro|CAN_F13R2_FB12
DECL|CAN_F13R2_FB13_Msk|macro|CAN_F13R2_FB13_Msk
DECL|CAN_F13R2_FB13_Pos|macro|CAN_F13R2_FB13_Pos
DECL|CAN_F13R2_FB13|macro|CAN_F13R2_FB13
DECL|CAN_F13R2_FB14_Msk|macro|CAN_F13R2_FB14_Msk
DECL|CAN_F13R2_FB14_Pos|macro|CAN_F13R2_FB14_Pos
DECL|CAN_F13R2_FB14|macro|CAN_F13R2_FB14
DECL|CAN_F13R2_FB15_Msk|macro|CAN_F13R2_FB15_Msk
DECL|CAN_F13R2_FB15_Pos|macro|CAN_F13R2_FB15_Pos
DECL|CAN_F13R2_FB15|macro|CAN_F13R2_FB15
DECL|CAN_F13R2_FB16_Msk|macro|CAN_F13R2_FB16_Msk
DECL|CAN_F13R2_FB16_Pos|macro|CAN_F13R2_FB16_Pos
DECL|CAN_F13R2_FB16|macro|CAN_F13R2_FB16
DECL|CAN_F13R2_FB17_Msk|macro|CAN_F13R2_FB17_Msk
DECL|CAN_F13R2_FB17_Pos|macro|CAN_F13R2_FB17_Pos
DECL|CAN_F13R2_FB17|macro|CAN_F13R2_FB17
DECL|CAN_F13R2_FB18_Msk|macro|CAN_F13R2_FB18_Msk
DECL|CAN_F13R2_FB18_Pos|macro|CAN_F13R2_FB18_Pos
DECL|CAN_F13R2_FB18|macro|CAN_F13R2_FB18
DECL|CAN_F13R2_FB19_Msk|macro|CAN_F13R2_FB19_Msk
DECL|CAN_F13R2_FB19_Pos|macro|CAN_F13R2_FB19_Pos
DECL|CAN_F13R2_FB19|macro|CAN_F13R2_FB19
DECL|CAN_F13R2_FB1_Msk|macro|CAN_F13R2_FB1_Msk
DECL|CAN_F13R2_FB1_Pos|macro|CAN_F13R2_FB1_Pos
DECL|CAN_F13R2_FB1|macro|CAN_F13R2_FB1
DECL|CAN_F13R2_FB20_Msk|macro|CAN_F13R2_FB20_Msk
DECL|CAN_F13R2_FB20_Pos|macro|CAN_F13R2_FB20_Pos
DECL|CAN_F13R2_FB20|macro|CAN_F13R2_FB20
DECL|CAN_F13R2_FB21_Msk|macro|CAN_F13R2_FB21_Msk
DECL|CAN_F13R2_FB21_Pos|macro|CAN_F13R2_FB21_Pos
DECL|CAN_F13R2_FB21|macro|CAN_F13R2_FB21
DECL|CAN_F13R2_FB22_Msk|macro|CAN_F13R2_FB22_Msk
DECL|CAN_F13R2_FB22_Pos|macro|CAN_F13R2_FB22_Pos
DECL|CAN_F13R2_FB22|macro|CAN_F13R2_FB22
DECL|CAN_F13R2_FB23_Msk|macro|CAN_F13R2_FB23_Msk
DECL|CAN_F13R2_FB23_Pos|macro|CAN_F13R2_FB23_Pos
DECL|CAN_F13R2_FB23|macro|CAN_F13R2_FB23
DECL|CAN_F13R2_FB24_Msk|macro|CAN_F13R2_FB24_Msk
DECL|CAN_F13R2_FB24_Pos|macro|CAN_F13R2_FB24_Pos
DECL|CAN_F13R2_FB24|macro|CAN_F13R2_FB24
DECL|CAN_F13R2_FB25_Msk|macro|CAN_F13R2_FB25_Msk
DECL|CAN_F13R2_FB25_Pos|macro|CAN_F13R2_FB25_Pos
DECL|CAN_F13R2_FB25|macro|CAN_F13R2_FB25
DECL|CAN_F13R2_FB26_Msk|macro|CAN_F13R2_FB26_Msk
DECL|CAN_F13R2_FB26_Pos|macro|CAN_F13R2_FB26_Pos
DECL|CAN_F13R2_FB26|macro|CAN_F13R2_FB26
DECL|CAN_F13R2_FB27_Msk|macro|CAN_F13R2_FB27_Msk
DECL|CAN_F13R2_FB27_Pos|macro|CAN_F13R2_FB27_Pos
DECL|CAN_F13R2_FB27|macro|CAN_F13R2_FB27
DECL|CAN_F13R2_FB28_Msk|macro|CAN_F13R2_FB28_Msk
DECL|CAN_F13R2_FB28_Pos|macro|CAN_F13R2_FB28_Pos
DECL|CAN_F13R2_FB28|macro|CAN_F13R2_FB28
DECL|CAN_F13R2_FB29_Msk|macro|CAN_F13R2_FB29_Msk
DECL|CAN_F13R2_FB29_Pos|macro|CAN_F13R2_FB29_Pos
DECL|CAN_F13R2_FB29|macro|CAN_F13R2_FB29
DECL|CAN_F13R2_FB2_Msk|macro|CAN_F13R2_FB2_Msk
DECL|CAN_F13R2_FB2_Pos|macro|CAN_F13R2_FB2_Pos
DECL|CAN_F13R2_FB2|macro|CAN_F13R2_FB2
DECL|CAN_F13R2_FB30_Msk|macro|CAN_F13R2_FB30_Msk
DECL|CAN_F13R2_FB30_Pos|macro|CAN_F13R2_FB30_Pos
DECL|CAN_F13R2_FB30|macro|CAN_F13R2_FB30
DECL|CAN_F13R2_FB31_Msk|macro|CAN_F13R2_FB31_Msk
DECL|CAN_F13R2_FB31_Pos|macro|CAN_F13R2_FB31_Pos
DECL|CAN_F13R2_FB31|macro|CAN_F13R2_FB31
DECL|CAN_F13R2_FB3_Msk|macro|CAN_F13R2_FB3_Msk
DECL|CAN_F13R2_FB3_Pos|macro|CAN_F13R2_FB3_Pos
DECL|CAN_F13R2_FB3|macro|CAN_F13R2_FB3
DECL|CAN_F13R2_FB4_Msk|macro|CAN_F13R2_FB4_Msk
DECL|CAN_F13R2_FB4_Pos|macro|CAN_F13R2_FB4_Pos
DECL|CAN_F13R2_FB4|macro|CAN_F13R2_FB4
DECL|CAN_F13R2_FB5_Msk|macro|CAN_F13R2_FB5_Msk
DECL|CAN_F13R2_FB5_Pos|macro|CAN_F13R2_FB5_Pos
DECL|CAN_F13R2_FB5|macro|CAN_F13R2_FB5
DECL|CAN_F13R2_FB6_Msk|macro|CAN_F13R2_FB6_Msk
DECL|CAN_F13R2_FB6_Pos|macro|CAN_F13R2_FB6_Pos
DECL|CAN_F13R2_FB6|macro|CAN_F13R2_FB6
DECL|CAN_F13R2_FB7_Msk|macro|CAN_F13R2_FB7_Msk
DECL|CAN_F13R2_FB7_Pos|macro|CAN_F13R2_FB7_Pos
DECL|CAN_F13R2_FB7|macro|CAN_F13R2_FB7
DECL|CAN_F13R2_FB8_Msk|macro|CAN_F13R2_FB8_Msk
DECL|CAN_F13R2_FB8_Pos|macro|CAN_F13R2_FB8_Pos
DECL|CAN_F13R2_FB8|macro|CAN_F13R2_FB8
DECL|CAN_F13R2_FB9_Msk|macro|CAN_F13R2_FB9_Msk
DECL|CAN_F13R2_FB9_Pos|macro|CAN_F13R2_FB9_Pos
DECL|CAN_F13R2_FB9|macro|CAN_F13R2_FB9
DECL|CAN_F1R1_FB0_Msk|macro|CAN_F1R1_FB0_Msk
DECL|CAN_F1R1_FB0_Pos|macro|CAN_F1R1_FB0_Pos
DECL|CAN_F1R1_FB0|macro|CAN_F1R1_FB0
DECL|CAN_F1R1_FB10_Msk|macro|CAN_F1R1_FB10_Msk
DECL|CAN_F1R1_FB10_Pos|macro|CAN_F1R1_FB10_Pos
DECL|CAN_F1R1_FB10|macro|CAN_F1R1_FB10
DECL|CAN_F1R1_FB11_Msk|macro|CAN_F1R1_FB11_Msk
DECL|CAN_F1R1_FB11_Pos|macro|CAN_F1R1_FB11_Pos
DECL|CAN_F1R1_FB11|macro|CAN_F1R1_FB11
DECL|CAN_F1R1_FB12_Msk|macro|CAN_F1R1_FB12_Msk
DECL|CAN_F1R1_FB12_Pos|macro|CAN_F1R1_FB12_Pos
DECL|CAN_F1R1_FB12|macro|CAN_F1R1_FB12
DECL|CAN_F1R1_FB13_Msk|macro|CAN_F1R1_FB13_Msk
DECL|CAN_F1R1_FB13_Pos|macro|CAN_F1R1_FB13_Pos
DECL|CAN_F1R1_FB13|macro|CAN_F1R1_FB13
DECL|CAN_F1R1_FB14_Msk|macro|CAN_F1R1_FB14_Msk
DECL|CAN_F1R1_FB14_Pos|macro|CAN_F1R1_FB14_Pos
DECL|CAN_F1R1_FB14|macro|CAN_F1R1_FB14
DECL|CAN_F1R1_FB15_Msk|macro|CAN_F1R1_FB15_Msk
DECL|CAN_F1R1_FB15_Pos|macro|CAN_F1R1_FB15_Pos
DECL|CAN_F1R1_FB15|macro|CAN_F1R1_FB15
DECL|CAN_F1R1_FB16_Msk|macro|CAN_F1R1_FB16_Msk
DECL|CAN_F1R1_FB16_Pos|macro|CAN_F1R1_FB16_Pos
DECL|CAN_F1R1_FB16|macro|CAN_F1R1_FB16
DECL|CAN_F1R1_FB17_Msk|macro|CAN_F1R1_FB17_Msk
DECL|CAN_F1R1_FB17_Pos|macro|CAN_F1R1_FB17_Pos
DECL|CAN_F1R1_FB17|macro|CAN_F1R1_FB17
DECL|CAN_F1R1_FB18_Msk|macro|CAN_F1R1_FB18_Msk
DECL|CAN_F1R1_FB18_Pos|macro|CAN_F1R1_FB18_Pos
DECL|CAN_F1R1_FB18|macro|CAN_F1R1_FB18
DECL|CAN_F1R1_FB19_Msk|macro|CAN_F1R1_FB19_Msk
DECL|CAN_F1R1_FB19_Pos|macro|CAN_F1R1_FB19_Pos
DECL|CAN_F1R1_FB19|macro|CAN_F1R1_FB19
DECL|CAN_F1R1_FB1_Msk|macro|CAN_F1R1_FB1_Msk
DECL|CAN_F1R1_FB1_Pos|macro|CAN_F1R1_FB1_Pos
DECL|CAN_F1R1_FB1|macro|CAN_F1R1_FB1
DECL|CAN_F1R1_FB20_Msk|macro|CAN_F1R1_FB20_Msk
DECL|CAN_F1R1_FB20_Pos|macro|CAN_F1R1_FB20_Pos
DECL|CAN_F1R1_FB20|macro|CAN_F1R1_FB20
DECL|CAN_F1R1_FB21_Msk|macro|CAN_F1R1_FB21_Msk
DECL|CAN_F1R1_FB21_Pos|macro|CAN_F1R1_FB21_Pos
DECL|CAN_F1R1_FB21|macro|CAN_F1R1_FB21
DECL|CAN_F1R1_FB22_Msk|macro|CAN_F1R1_FB22_Msk
DECL|CAN_F1R1_FB22_Pos|macro|CAN_F1R1_FB22_Pos
DECL|CAN_F1R1_FB22|macro|CAN_F1R1_FB22
DECL|CAN_F1R1_FB23_Msk|macro|CAN_F1R1_FB23_Msk
DECL|CAN_F1R1_FB23_Pos|macro|CAN_F1R1_FB23_Pos
DECL|CAN_F1R1_FB23|macro|CAN_F1R1_FB23
DECL|CAN_F1R1_FB24_Msk|macro|CAN_F1R1_FB24_Msk
DECL|CAN_F1R1_FB24_Pos|macro|CAN_F1R1_FB24_Pos
DECL|CAN_F1R1_FB24|macro|CAN_F1R1_FB24
DECL|CAN_F1R1_FB25_Msk|macro|CAN_F1R1_FB25_Msk
DECL|CAN_F1R1_FB25_Pos|macro|CAN_F1R1_FB25_Pos
DECL|CAN_F1R1_FB25|macro|CAN_F1R1_FB25
DECL|CAN_F1R1_FB26_Msk|macro|CAN_F1R1_FB26_Msk
DECL|CAN_F1R1_FB26_Pos|macro|CAN_F1R1_FB26_Pos
DECL|CAN_F1R1_FB26|macro|CAN_F1R1_FB26
DECL|CAN_F1R1_FB27_Msk|macro|CAN_F1R1_FB27_Msk
DECL|CAN_F1R1_FB27_Pos|macro|CAN_F1R1_FB27_Pos
DECL|CAN_F1R1_FB27|macro|CAN_F1R1_FB27
DECL|CAN_F1R1_FB28_Msk|macro|CAN_F1R1_FB28_Msk
DECL|CAN_F1R1_FB28_Pos|macro|CAN_F1R1_FB28_Pos
DECL|CAN_F1R1_FB28|macro|CAN_F1R1_FB28
DECL|CAN_F1R1_FB29_Msk|macro|CAN_F1R1_FB29_Msk
DECL|CAN_F1R1_FB29_Pos|macro|CAN_F1R1_FB29_Pos
DECL|CAN_F1R1_FB29|macro|CAN_F1R1_FB29
DECL|CAN_F1R1_FB2_Msk|macro|CAN_F1R1_FB2_Msk
DECL|CAN_F1R1_FB2_Pos|macro|CAN_F1R1_FB2_Pos
DECL|CAN_F1R1_FB2|macro|CAN_F1R1_FB2
DECL|CAN_F1R1_FB30_Msk|macro|CAN_F1R1_FB30_Msk
DECL|CAN_F1R1_FB30_Pos|macro|CAN_F1R1_FB30_Pos
DECL|CAN_F1R1_FB30|macro|CAN_F1R1_FB30
DECL|CAN_F1R1_FB31_Msk|macro|CAN_F1R1_FB31_Msk
DECL|CAN_F1R1_FB31_Pos|macro|CAN_F1R1_FB31_Pos
DECL|CAN_F1R1_FB31|macro|CAN_F1R1_FB31
DECL|CAN_F1R1_FB3_Msk|macro|CAN_F1R1_FB3_Msk
DECL|CAN_F1R1_FB3_Pos|macro|CAN_F1R1_FB3_Pos
DECL|CAN_F1R1_FB3|macro|CAN_F1R1_FB3
DECL|CAN_F1R1_FB4_Msk|macro|CAN_F1R1_FB4_Msk
DECL|CAN_F1R1_FB4_Pos|macro|CAN_F1R1_FB4_Pos
DECL|CAN_F1R1_FB4|macro|CAN_F1R1_FB4
DECL|CAN_F1R1_FB5_Msk|macro|CAN_F1R1_FB5_Msk
DECL|CAN_F1R1_FB5_Pos|macro|CAN_F1R1_FB5_Pos
DECL|CAN_F1R1_FB5|macro|CAN_F1R1_FB5
DECL|CAN_F1R1_FB6_Msk|macro|CAN_F1R1_FB6_Msk
DECL|CAN_F1R1_FB6_Pos|macro|CAN_F1R1_FB6_Pos
DECL|CAN_F1R1_FB6|macro|CAN_F1R1_FB6
DECL|CAN_F1R1_FB7_Msk|macro|CAN_F1R1_FB7_Msk
DECL|CAN_F1R1_FB7_Pos|macro|CAN_F1R1_FB7_Pos
DECL|CAN_F1R1_FB7|macro|CAN_F1R1_FB7
DECL|CAN_F1R1_FB8_Msk|macro|CAN_F1R1_FB8_Msk
DECL|CAN_F1R1_FB8_Pos|macro|CAN_F1R1_FB8_Pos
DECL|CAN_F1R1_FB8|macro|CAN_F1R1_FB8
DECL|CAN_F1R1_FB9_Msk|macro|CAN_F1R1_FB9_Msk
DECL|CAN_F1R1_FB9_Pos|macro|CAN_F1R1_FB9_Pos
DECL|CAN_F1R1_FB9|macro|CAN_F1R1_FB9
DECL|CAN_F1R2_FB0_Msk|macro|CAN_F1R2_FB0_Msk
DECL|CAN_F1R2_FB0_Pos|macro|CAN_F1R2_FB0_Pos
DECL|CAN_F1R2_FB0|macro|CAN_F1R2_FB0
DECL|CAN_F1R2_FB10_Msk|macro|CAN_F1R2_FB10_Msk
DECL|CAN_F1R2_FB10_Pos|macro|CAN_F1R2_FB10_Pos
DECL|CAN_F1R2_FB10|macro|CAN_F1R2_FB10
DECL|CAN_F1R2_FB11_Msk|macro|CAN_F1R2_FB11_Msk
DECL|CAN_F1R2_FB11_Pos|macro|CAN_F1R2_FB11_Pos
DECL|CAN_F1R2_FB11|macro|CAN_F1R2_FB11
DECL|CAN_F1R2_FB12_Msk|macro|CAN_F1R2_FB12_Msk
DECL|CAN_F1R2_FB12_Pos|macro|CAN_F1R2_FB12_Pos
DECL|CAN_F1R2_FB12|macro|CAN_F1R2_FB12
DECL|CAN_F1R2_FB13_Msk|macro|CAN_F1R2_FB13_Msk
DECL|CAN_F1R2_FB13_Pos|macro|CAN_F1R2_FB13_Pos
DECL|CAN_F1R2_FB13|macro|CAN_F1R2_FB13
DECL|CAN_F1R2_FB14_Msk|macro|CAN_F1R2_FB14_Msk
DECL|CAN_F1R2_FB14_Pos|macro|CAN_F1R2_FB14_Pos
DECL|CAN_F1R2_FB14|macro|CAN_F1R2_FB14
DECL|CAN_F1R2_FB15_Msk|macro|CAN_F1R2_FB15_Msk
DECL|CAN_F1R2_FB15_Pos|macro|CAN_F1R2_FB15_Pos
DECL|CAN_F1R2_FB15|macro|CAN_F1R2_FB15
DECL|CAN_F1R2_FB16_Msk|macro|CAN_F1R2_FB16_Msk
DECL|CAN_F1R2_FB16_Pos|macro|CAN_F1R2_FB16_Pos
DECL|CAN_F1R2_FB16|macro|CAN_F1R2_FB16
DECL|CAN_F1R2_FB17_Msk|macro|CAN_F1R2_FB17_Msk
DECL|CAN_F1R2_FB17_Pos|macro|CAN_F1R2_FB17_Pos
DECL|CAN_F1R2_FB17|macro|CAN_F1R2_FB17
DECL|CAN_F1R2_FB18_Msk|macro|CAN_F1R2_FB18_Msk
DECL|CAN_F1R2_FB18_Pos|macro|CAN_F1R2_FB18_Pos
DECL|CAN_F1R2_FB18|macro|CAN_F1R2_FB18
DECL|CAN_F1R2_FB19_Msk|macro|CAN_F1R2_FB19_Msk
DECL|CAN_F1R2_FB19_Pos|macro|CAN_F1R2_FB19_Pos
DECL|CAN_F1R2_FB19|macro|CAN_F1R2_FB19
DECL|CAN_F1R2_FB1_Msk|macro|CAN_F1R2_FB1_Msk
DECL|CAN_F1R2_FB1_Pos|macro|CAN_F1R2_FB1_Pos
DECL|CAN_F1R2_FB1|macro|CAN_F1R2_FB1
DECL|CAN_F1R2_FB20_Msk|macro|CAN_F1R2_FB20_Msk
DECL|CAN_F1R2_FB20_Pos|macro|CAN_F1R2_FB20_Pos
DECL|CAN_F1R2_FB20|macro|CAN_F1R2_FB20
DECL|CAN_F1R2_FB21_Msk|macro|CAN_F1R2_FB21_Msk
DECL|CAN_F1R2_FB21_Pos|macro|CAN_F1R2_FB21_Pos
DECL|CAN_F1R2_FB21|macro|CAN_F1R2_FB21
DECL|CAN_F1R2_FB22_Msk|macro|CAN_F1R2_FB22_Msk
DECL|CAN_F1R2_FB22_Pos|macro|CAN_F1R2_FB22_Pos
DECL|CAN_F1R2_FB22|macro|CAN_F1R2_FB22
DECL|CAN_F1R2_FB23_Msk|macro|CAN_F1R2_FB23_Msk
DECL|CAN_F1R2_FB23_Pos|macro|CAN_F1R2_FB23_Pos
DECL|CAN_F1R2_FB23|macro|CAN_F1R2_FB23
DECL|CAN_F1R2_FB24_Msk|macro|CAN_F1R2_FB24_Msk
DECL|CAN_F1R2_FB24_Pos|macro|CAN_F1R2_FB24_Pos
DECL|CAN_F1R2_FB24|macro|CAN_F1R2_FB24
DECL|CAN_F1R2_FB25_Msk|macro|CAN_F1R2_FB25_Msk
DECL|CAN_F1R2_FB25_Pos|macro|CAN_F1R2_FB25_Pos
DECL|CAN_F1R2_FB25|macro|CAN_F1R2_FB25
DECL|CAN_F1R2_FB26_Msk|macro|CAN_F1R2_FB26_Msk
DECL|CAN_F1R2_FB26_Pos|macro|CAN_F1R2_FB26_Pos
DECL|CAN_F1R2_FB26|macro|CAN_F1R2_FB26
DECL|CAN_F1R2_FB27_Msk|macro|CAN_F1R2_FB27_Msk
DECL|CAN_F1R2_FB27_Pos|macro|CAN_F1R2_FB27_Pos
DECL|CAN_F1R2_FB27|macro|CAN_F1R2_FB27
DECL|CAN_F1R2_FB28_Msk|macro|CAN_F1R2_FB28_Msk
DECL|CAN_F1R2_FB28_Pos|macro|CAN_F1R2_FB28_Pos
DECL|CAN_F1R2_FB28|macro|CAN_F1R2_FB28
DECL|CAN_F1R2_FB29_Msk|macro|CAN_F1R2_FB29_Msk
DECL|CAN_F1R2_FB29_Pos|macro|CAN_F1R2_FB29_Pos
DECL|CAN_F1R2_FB29|macro|CAN_F1R2_FB29
DECL|CAN_F1R2_FB2_Msk|macro|CAN_F1R2_FB2_Msk
DECL|CAN_F1R2_FB2_Pos|macro|CAN_F1R2_FB2_Pos
DECL|CAN_F1R2_FB2|macro|CAN_F1R2_FB2
DECL|CAN_F1R2_FB30_Msk|macro|CAN_F1R2_FB30_Msk
DECL|CAN_F1R2_FB30_Pos|macro|CAN_F1R2_FB30_Pos
DECL|CAN_F1R2_FB30|macro|CAN_F1R2_FB30
DECL|CAN_F1R2_FB31_Msk|macro|CAN_F1R2_FB31_Msk
DECL|CAN_F1R2_FB31_Pos|macro|CAN_F1R2_FB31_Pos
DECL|CAN_F1R2_FB31|macro|CAN_F1R2_FB31
DECL|CAN_F1R2_FB3_Msk|macro|CAN_F1R2_FB3_Msk
DECL|CAN_F1R2_FB3_Pos|macro|CAN_F1R2_FB3_Pos
DECL|CAN_F1R2_FB3|macro|CAN_F1R2_FB3
DECL|CAN_F1R2_FB4_Msk|macro|CAN_F1R2_FB4_Msk
DECL|CAN_F1R2_FB4_Pos|macro|CAN_F1R2_FB4_Pos
DECL|CAN_F1R2_FB4|macro|CAN_F1R2_FB4
DECL|CAN_F1R2_FB5_Msk|macro|CAN_F1R2_FB5_Msk
DECL|CAN_F1R2_FB5_Pos|macro|CAN_F1R2_FB5_Pos
DECL|CAN_F1R2_FB5|macro|CAN_F1R2_FB5
DECL|CAN_F1R2_FB6_Msk|macro|CAN_F1R2_FB6_Msk
DECL|CAN_F1R2_FB6_Pos|macro|CAN_F1R2_FB6_Pos
DECL|CAN_F1R2_FB6|macro|CAN_F1R2_FB6
DECL|CAN_F1R2_FB7_Msk|macro|CAN_F1R2_FB7_Msk
DECL|CAN_F1R2_FB7_Pos|macro|CAN_F1R2_FB7_Pos
DECL|CAN_F1R2_FB7|macro|CAN_F1R2_FB7
DECL|CAN_F1R2_FB8_Msk|macro|CAN_F1R2_FB8_Msk
DECL|CAN_F1R2_FB8_Pos|macro|CAN_F1R2_FB8_Pos
DECL|CAN_F1R2_FB8|macro|CAN_F1R2_FB8
DECL|CAN_F1R2_FB9_Msk|macro|CAN_F1R2_FB9_Msk
DECL|CAN_F1R2_FB9_Pos|macro|CAN_F1R2_FB9_Pos
DECL|CAN_F1R2_FB9|macro|CAN_F1R2_FB9
DECL|CAN_F2R1_FB0_Msk|macro|CAN_F2R1_FB0_Msk
DECL|CAN_F2R1_FB0_Pos|macro|CAN_F2R1_FB0_Pos
DECL|CAN_F2R1_FB0|macro|CAN_F2R1_FB0
DECL|CAN_F2R1_FB10_Msk|macro|CAN_F2R1_FB10_Msk
DECL|CAN_F2R1_FB10_Pos|macro|CAN_F2R1_FB10_Pos
DECL|CAN_F2R1_FB10|macro|CAN_F2R1_FB10
DECL|CAN_F2R1_FB11_Msk|macro|CAN_F2R1_FB11_Msk
DECL|CAN_F2R1_FB11_Pos|macro|CAN_F2R1_FB11_Pos
DECL|CAN_F2R1_FB11|macro|CAN_F2R1_FB11
DECL|CAN_F2R1_FB12_Msk|macro|CAN_F2R1_FB12_Msk
DECL|CAN_F2R1_FB12_Pos|macro|CAN_F2R1_FB12_Pos
DECL|CAN_F2R1_FB12|macro|CAN_F2R1_FB12
DECL|CAN_F2R1_FB13_Msk|macro|CAN_F2R1_FB13_Msk
DECL|CAN_F2R1_FB13_Pos|macro|CAN_F2R1_FB13_Pos
DECL|CAN_F2R1_FB13|macro|CAN_F2R1_FB13
DECL|CAN_F2R1_FB14_Msk|macro|CAN_F2R1_FB14_Msk
DECL|CAN_F2R1_FB14_Pos|macro|CAN_F2R1_FB14_Pos
DECL|CAN_F2R1_FB14|macro|CAN_F2R1_FB14
DECL|CAN_F2R1_FB15_Msk|macro|CAN_F2R1_FB15_Msk
DECL|CAN_F2R1_FB15_Pos|macro|CAN_F2R1_FB15_Pos
DECL|CAN_F2R1_FB15|macro|CAN_F2R1_FB15
DECL|CAN_F2R1_FB16_Msk|macro|CAN_F2R1_FB16_Msk
DECL|CAN_F2R1_FB16_Pos|macro|CAN_F2R1_FB16_Pos
DECL|CAN_F2R1_FB16|macro|CAN_F2R1_FB16
DECL|CAN_F2R1_FB17_Msk|macro|CAN_F2R1_FB17_Msk
DECL|CAN_F2R1_FB17_Pos|macro|CAN_F2R1_FB17_Pos
DECL|CAN_F2R1_FB17|macro|CAN_F2R1_FB17
DECL|CAN_F2R1_FB18_Msk|macro|CAN_F2R1_FB18_Msk
DECL|CAN_F2R1_FB18_Pos|macro|CAN_F2R1_FB18_Pos
DECL|CAN_F2R1_FB18|macro|CAN_F2R1_FB18
DECL|CAN_F2R1_FB19_Msk|macro|CAN_F2R1_FB19_Msk
DECL|CAN_F2R1_FB19_Pos|macro|CAN_F2R1_FB19_Pos
DECL|CAN_F2R1_FB19|macro|CAN_F2R1_FB19
DECL|CAN_F2R1_FB1_Msk|macro|CAN_F2R1_FB1_Msk
DECL|CAN_F2R1_FB1_Pos|macro|CAN_F2R1_FB1_Pos
DECL|CAN_F2R1_FB1|macro|CAN_F2R1_FB1
DECL|CAN_F2R1_FB20_Msk|macro|CAN_F2R1_FB20_Msk
DECL|CAN_F2R1_FB20_Pos|macro|CAN_F2R1_FB20_Pos
DECL|CAN_F2R1_FB20|macro|CAN_F2R1_FB20
DECL|CAN_F2R1_FB21_Msk|macro|CAN_F2R1_FB21_Msk
DECL|CAN_F2R1_FB21_Pos|macro|CAN_F2R1_FB21_Pos
DECL|CAN_F2R1_FB21|macro|CAN_F2R1_FB21
DECL|CAN_F2R1_FB22_Msk|macro|CAN_F2R1_FB22_Msk
DECL|CAN_F2R1_FB22_Pos|macro|CAN_F2R1_FB22_Pos
DECL|CAN_F2R1_FB22|macro|CAN_F2R1_FB22
DECL|CAN_F2R1_FB23_Msk|macro|CAN_F2R1_FB23_Msk
DECL|CAN_F2R1_FB23_Pos|macro|CAN_F2R1_FB23_Pos
DECL|CAN_F2R1_FB23|macro|CAN_F2R1_FB23
DECL|CAN_F2R1_FB24_Msk|macro|CAN_F2R1_FB24_Msk
DECL|CAN_F2R1_FB24_Pos|macro|CAN_F2R1_FB24_Pos
DECL|CAN_F2R1_FB24|macro|CAN_F2R1_FB24
DECL|CAN_F2R1_FB25_Msk|macro|CAN_F2R1_FB25_Msk
DECL|CAN_F2R1_FB25_Pos|macro|CAN_F2R1_FB25_Pos
DECL|CAN_F2R1_FB25|macro|CAN_F2R1_FB25
DECL|CAN_F2R1_FB26_Msk|macro|CAN_F2R1_FB26_Msk
DECL|CAN_F2R1_FB26_Pos|macro|CAN_F2R1_FB26_Pos
DECL|CAN_F2R1_FB26|macro|CAN_F2R1_FB26
DECL|CAN_F2R1_FB27_Msk|macro|CAN_F2R1_FB27_Msk
DECL|CAN_F2R1_FB27_Pos|macro|CAN_F2R1_FB27_Pos
DECL|CAN_F2R1_FB27|macro|CAN_F2R1_FB27
DECL|CAN_F2R1_FB28_Msk|macro|CAN_F2R1_FB28_Msk
DECL|CAN_F2R1_FB28_Pos|macro|CAN_F2R1_FB28_Pos
DECL|CAN_F2R1_FB28|macro|CAN_F2R1_FB28
DECL|CAN_F2R1_FB29_Msk|macro|CAN_F2R1_FB29_Msk
DECL|CAN_F2R1_FB29_Pos|macro|CAN_F2R1_FB29_Pos
DECL|CAN_F2R1_FB29|macro|CAN_F2R1_FB29
DECL|CAN_F2R1_FB2_Msk|macro|CAN_F2R1_FB2_Msk
DECL|CAN_F2R1_FB2_Pos|macro|CAN_F2R1_FB2_Pos
DECL|CAN_F2R1_FB2|macro|CAN_F2R1_FB2
DECL|CAN_F2R1_FB30_Msk|macro|CAN_F2R1_FB30_Msk
DECL|CAN_F2R1_FB30_Pos|macro|CAN_F2R1_FB30_Pos
DECL|CAN_F2R1_FB30|macro|CAN_F2R1_FB30
DECL|CAN_F2R1_FB31_Msk|macro|CAN_F2R1_FB31_Msk
DECL|CAN_F2R1_FB31_Pos|macro|CAN_F2R1_FB31_Pos
DECL|CAN_F2R1_FB31|macro|CAN_F2R1_FB31
DECL|CAN_F2R1_FB3_Msk|macro|CAN_F2R1_FB3_Msk
DECL|CAN_F2R1_FB3_Pos|macro|CAN_F2R1_FB3_Pos
DECL|CAN_F2R1_FB3|macro|CAN_F2R1_FB3
DECL|CAN_F2R1_FB4_Msk|macro|CAN_F2R1_FB4_Msk
DECL|CAN_F2R1_FB4_Pos|macro|CAN_F2R1_FB4_Pos
DECL|CAN_F2R1_FB4|macro|CAN_F2R1_FB4
DECL|CAN_F2R1_FB5_Msk|macro|CAN_F2R1_FB5_Msk
DECL|CAN_F2R1_FB5_Pos|macro|CAN_F2R1_FB5_Pos
DECL|CAN_F2R1_FB5|macro|CAN_F2R1_FB5
DECL|CAN_F2R1_FB6_Msk|macro|CAN_F2R1_FB6_Msk
DECL|CAN_F2R1_FB6_Pos|macro|CAN_F2R1_FB6_Pos
DECL|CAN_F2R1_FB6|macro|CAN_F2R1_FB6
DECL|CAN_F2R1_FB7_Msk|macro|CAN_F2R1_FB7_Msk
DECL|CAN_F2R1_FB7_Pos|macro|CAN_F2R1_FB7_Pos
DECL|CAN_F2R1_FB7|macro|CAN_F2R1_FB7
DECL|CAN_F2R1_FB8_Msk|macro|CAN_F2R1_FB8_Msk
DECL|CAN_F2R1_FB8_Pos|macro|CAN_F2R1_FB8_Pos
DECL|CAN_F2R1_FB8|macro|CAN_F2R1_FB8
DECL|CAN_F2R1_FB9_Msk|macro|CAN_F2R1_FB9_Msk
DECL|CAN_F2R1_FB9_Pos|macro|CAN_F2R1_FB9_Pos
DECL|CAN_F2R1_FB9|macro|CAN_F2R1_FB9
DECL|CAN_F2R2_FB0_Msk|macro|CAN_F2R2_FB0_Msk
DECL|CAN_F2R2_FB0_Pos|macro|CAN_F2R2_FB0_Pos
DECL|CAN_F2R2_FB0|macro|CAN_F2R2_FB0
DECL|CAN_F2R2_FB10_Msk|macro|CAN_F2R2_FB10_Msk
DECL|CAN_F2R2_FB10_Pos|macro|CAN_F2R2_FB10_Pos
DECL|CAN_F2R2_FB10|macro|CAN_F2R2_FB10
DECL|CAN_F2R2_FB11_Msk|macro|CAN_F2R2_FB11_Msk
DECL|CAN_F2R2_FB11_Pos|macro|CAN_F2R2_FB11_Pos
DECL|CAN_F2R2_FB11|macro|CAN_F2R2_FB11
DECL|CAN_F2R2_FB12_Msk|macro|CAN_F2R2_FB12_Msk
DECL|CAN_F2R2_FB12_Pos|macro|CAN_F2R2_FB12_Pos
DECL|CAN_F2R2_FB12|macro|CAN_F2R2_FB12
DECL|CAN_F2R2_FB13_Msk|macro|CAN_F2R2_FB13_Msk
DECL|CAN_F2R2_FB13_Pos|macro|CAN_F2R2_FB13_Pos
DECL|CAN_F2R2_FB13|macro|CAN_F2R2_FB13
DECL|CAN_F2R2_FB14_Msk|macro|CAN_F2R2_FB14_Msk
DECL|CAN_F2R2_FB14_Pos|macro|CAN_F2R2_FB14_Pos
DECL|CAN_F2R2_FB14|macro|CAN_F2R2_FB14
DECL|CAN_F2R2_FB15_Msk|macro|CAN_F2R2_FB15_Msk
DECL|CAN_F2R2_FB15_Pos|macro|CAN_F2R2_FB15_Pos
DECL|CAN_F2R2_FB15|macro|CAN_F2R2_FB15
DECL|CAN_F2R2_FB16_Msk|macro|CAN_F2R2_FB16_Msk
DECL|CAN_F2R2_FB16_Pos|macro|CAN_F2R2_FB16_Pos
DECL|CAN_F2R2_FB16|macro|CAN_F2R2_FB16
DECL|CAN_F2R2_FB17_Msk|macro|CAN_F2R2_FB17_Msk
DECL|CAN_F2R2_FB17_Pos|macro|CAN_F2R2_FB17_Pos
DECL|CAN_F2R2_FB17|macro|CAN_F2R2_FB17
DECL|CAN_F2R2_FB18_Msk|macro|CAN_F2R2_FB18_Msk
DECL|CAN_F2R2_FB18_Pos|macro|CAN_F2R2_FB18_Pos
DECL|CAN_F2R2_FB18|macro|CAN_F2R2_FB18
DECL|CAN_F2R2_FB19_Msk|macro|CAN_F2R2_FB19_Msk
DECL|CAN_F2R2_FB19_Pos|macro|CAN_F2R2_FB19_Pos
DECL|CAN_F2R2_FB19|macro|CAN_F2R2_FB19
DECL|CAN_F2R2_FB1_Msk|macro|CAN_F2R2_FB1_Msk
DECL|CAN_F2R2_FB1_Pos|macro|CAN_F2R2_FB1_Pos
DECL|CAN_F2R2_FB1|macro|CAN_F2R2_FB1
DECL|CAN_F2R2_FB20_Msk|macro|CAN_F2R2_FB20_Msk
DECL|CAN_F2R2_FB20_Pos|macro|CAN_F2R2_FB20_Pos
DECL|CAN_F2R2_FB20|macro|CAN_F2R2_FB20
DECL|CAN_F2R2_FB21_Msk|macro|CAN_F2R2_FB21_Msk
DECL|CAN_F2R2_FB21_Pos|macro|CAN_F2R2_FB21_Pos
DECL|CAN_F2R2_FB21|macro|CAN_F2R2_FB21
DECL|CAN_F2R2_FB22_Msk|macro|CAN_F2R2_FB22_Msk
DECL|CAN_F2R2_FB22_Pos|macro|CAN_F2R2_FB22_Pos
DECL|CAN_F2R2_FB22|macro|CAN_F2R2_FB22
DECL|CAN_F2R2_FB23_Msk|macro|CAN_F2R2_FB23_Msk
DECL|CAN_F2R2_FB23_Pos|macro|CAN_F2R2_FB23_Pos
DECL|CAN_F2R2_FB23|macro|CAN_F2R2_FB23
DECL|CAN_F2R2_FB24_Msk|macro|CAN_F2R2_FB24_Msk
DECL|CAN_F2R2_FB24_Pos|macro|CAN_F2R2_FB24_Pos
DECL|CAN_F2R2_FB24|macro|CAN_F2R2_FB24
DECL|CAN_F2R2_FB25_Msk|macro|CAN_F2R2_FB25_Msk
DECL|CAN_F2R2_FB25_Pos|macro|CAN_F2R2_FB25_Pos
DECL|CAN_F2R2_FB25|macro|CAN_F2R2_FB25
DECL|CAN_F2R2_FB26_Msk|macro|CAN_F2R2_FB26_Msk
DECL|CAN_F2R2_FB26_Pos|macro|CAN_F2R2_FB26_Pos
DECL|CAN_F2R2_FB26|macro|CAN_F2R2_FB26
DECL|CAN_F2R2_FB27_Msk|macro|CAN_F2R2_FB27_Msk
DECL|CAN_F2R2_FB27_Pos|macro|CAN_F2R2_FB27_Pos
DECL|CAN_F2R2_FB27|macro|CAN_F2R2_FB27
DECL|CAN_F2R2_FB28_Msk|macro|CAN_F2R2_FB28_Msk
DECL|CAN_F2R2_FB28_Pos|macro|CAN_F2R2_FB28_Pos
DECL|CAN_F2R2_FB28|macro|CAN_F2R2_FB28
DECL|CAN_F2R2_FB29_Msk|macro|CAN_F2R2_FB29_Msk
DECL|CAN_F2R2_FB29_Pos|macro|CAN_F2R2_FB29_Pos
DECL|CAN_F2R2_FB29|macro|CAN_F2R2_FB29
DECL|CAN_F2R2_FB2_Msk|macro|CAN_F2R2_FB2_Msk
DECL|CAN_F2R2_FB2_Pos|macro|CAN_F2R2_FB2_Pos
DECL|CAN_F2R2_FB2|macro|CAN_F2R2_FB2
DECL|CAN_F2R2_FB30_Msk|macro|CAN_F2R2_FB30_Msk
DECL|CAN_F2R2_FB30_Pos|macro|CAN_F2R2_FB30_Pos
DECL|CAN_F2R2_FB30|macro|CAN_F2R2_FB30
DECL|CAN_F2R2_FB31_Msk|macro|CAN_F2R2_FB31_Msk
DECL|CAN_F2R2_FB31_Pos|macro|CAN_F2R2_FB31_Pos
DECL|CAN_F2R2_FB31|macro|CAN_F2R2_FB31
DECL|CAN_F2R2_FB3_Msk|macro|CAN_F2R2_FB3_Msk
DECL|CAN_F2R2_FB3_Pos|macro|CAN_F2R2_FB3_Pos
DECL|CAN_F2R2_FB3|macro|CAN_F2R2_FB3
DECL|CAN_F2R2_FB4_Msk|macro|CAN_F2R2_FB4_Msk
DECL|CAN_F2R2_FB4_Pos|macro|CAN_F2R2_FB4_Pos
DECL|CAN_F2R2_FB4|macro|CAN_F2R2_FB4
DECL|CAN_F2R2_FB5_Msk|macro|CAN_F2R2_FB5_Msk
DECL|CAN_F2R2_FB5_Pos|macro|CAN_F2R2_FB5_Pos
DECL|CAN_F2R2_FB5|macro|CAN_F2R2_FB5
DECL|CAN_F2R2_FB6_Msk|macro|CAN_F2R2_FB6_Msk
DECL|CAN_F2R2_FB6_Pos|macro|CAN_F2R2_FB6_Pos
DECL|CAN_F2R2_FB6|macro|CAN_F2R2_FB6
DECL|CAN_F2R2_FB7_Msk|macro|CAN_F2R2_FB7_Msk
DECL|CAN_F2R2_FB7_Pos|macro|CAN_F2R2_FB7_Pos
DECL|CAN_F2R2_FB7|macro|CAN_F2R2_FB7
DECL|CAN_F2R2_FB8_Msk|macro|CAN_F2R2_FB8_Msk
DECL|CAN_F2R2_FB8_Pos|macro|CAN_F2R2_FB8_Pos
DECL|CAN_F2R2_FB8|macro|CAN_F2R2_FB8
DECL|CAN_F2R2_FB9_Msk|macro|CAN_F2R2_FB9_Msk
DECL|CAN_F2R2_FB9_Pos|macro|CAN_F2R2_FB9_Pos
DECL|CAN_F2R2_FB9|macro|CAN_F2R2_FB9
DECL|CAN_F3R1_FB0_Msk|macro|CAN_F3R1_FB0_Msk
DECL|CAN_F3R1_FB0_Pos|macro|CAN_F3R1_FB0_Pos
DECL|CAN_F3R1_FB0|macro|CAN_F3R1_FB0
DECL|CAN_F3R1_FB10_Msk|macro|CAN_F3R1_FB10_Msk
DECL|CAN_F3R1_FB10_Pos|macro|CAN_F3R1_FB10_Pos
DECL|CAN_F3R1_FB10|macro|CAN_F3R1_FB10
DECL|CAN_F3R1_FB11_Msk|macro|CAN_F3R1_FB11_Msk
DECL|CAN_F3R1_FB11_Pos|macro|CAN_F3R1_FB11_Pos
DECL|CAN_F3R1_FB11|macro|CAN_F3R1_FB11
DECL|CAN_F3R1_FB12_Msk|macro|CAN_F3R1_FB12_Msk
DECL|CAN_F3R1_FB12_Pos|macro|CAN_F3R1_FB12_Pos
DECL|CAN_F3R1_FB12|macro|CAN_F3R1_FB12
DECL|CAN_F3R1_FB13_Msk|macro|CAN_F3R1_FB13_Msk
DECL|CAN_F3R1_FB13_Pos|macro|CAN_F3R1_FB13_Pos
DECL|CAN_F3R1_FB13|macro|CAN_F3R1_FB13
DECL|CAN_F3R1_FB14_Msk|macro|CAN_F3R1_FB14_Msk
DECL|CAN_F3R1_FB14_Pos|macro|CAN_F3R1_FB14_Pos
DECL|CAN_F3R1_FB14|macro|CAN_F3R1_FB14
DECL|CAN_F3R1_FB15_Msk|macro|CAN_F3R1_FB15_Msk
DECL|CAN_F3R1_FB15_Pos|macro|CAN_F3R1_FB15_Pos
DECL|CAN_F3R1_FB15|macro|CAN_F3R1_FB15
DECL|CAN_F3R1_FB16_Msk|macro|CAN_F3R1_FB16_Msk
DECL|CAN_F3R1_FB16_Pos|macro|CAN_F3R1_FB16_Pos
DECL|CAN_F3R1_FB16|macro|CAN_F3R1_FB16
DECL|CAN_F3R1_FB17_Msk|macro|CAN_F3R1_FB17_Msk
DECL|CAN_F3R1_FB17_Pos|macro|CAN_F3R1_FB17_Pos
DECL|CAN_F3R1_FB17|macro|CAN_F3R1_FB17
DECL|CAN_F3R1_FB18_Msk|macro|CAN_F3R1_FB18_Msk
DECL|CAN_F3R1_FB18_Pos|macro|CAN_F3R1_FB18_Pos
DECL|CAN_F3R1_FB18|macro|CAN_F3R1_FB18
DECL|CAN_F3R1_FB19_Msk|macro|CAN_F3R1_FB19_Msk
DECL|CAN_F3R1_FB19_Pos|macro|CAN_F3R1_FB19_Pos
DECL|CAN_F3R1_FB19|macro|CAN_F3R1_FB19
DECL|CAN_F3R1_FB1_Msk|macro|CAN_F3R1_FB1_Msk
DECL|CAN_F3R1_FB1_Pos|macro|CAN_F3R1_FB1_Pos
DECL|CAN_F3R1_FB1|macro|CAN_F3R1_FB1
DECL|CAN_F3R1_FB20_Msk|macro|CAN_F3R1_FB20_Msk
DECL|CAN_F3R1_FB20_Pos|macro|CAN_F3R1_FB20_Pos
DECL|CAN_F3R1_FB20|macro|CAN_F3R1_FB20
DECL|CAN_F3R1_FB21_Msk|macro|CAN_F3R1_FB21_Msk
DECL|CAN_F3R1_FB21_Pos|macro|CAN_F3R1_FB21_Pos
DECL|CAN_F3R1_FB21|macro|CAN_F3R1_FB21
DECL|CAN_F3R1_FB22_Msk|macro|CAN_F3R1_FB22_Msk
DECL|CAN_F3R1_FB22_Pos|macro|CAN_F3R1_FB22_Pos
DECL|CAN_F3R1_FB22|macro|CAN_F3R1_FB22
DECL|CAN_F3R1_FB23_Msk|macro|CAN_F3R1_FB23_Msk
DECL|CAN_F3R1_FB23_Pos|macro|CAN_F3R1_FB23_Pos
DECL|CAN_F3R1_FB23|macro|CAN_F3R1_FB23
DECL|CAN_F3R1_FB24_Msk|macro|CAN_F3R1_FB24_Msk
DECL|CAN_F3R1_FB24_Pos|macro|CAN_F3R1_FB24_Pos
DECL|CAN_F3R1_FB24|macro|CAN_F3R1_FB24
DECL|CAN_F3R1_FB25_Msk|macro|CAN_F3R1_FB25_Msk
DECL|CAN_F3R1_FB25_Pos|macro|CAN_F3R1_FB25_Pos
DECL|CAN_F3R1_FB25|macro|CAN_F3R1_FB25
DECL|CAN_F3R1_FB26_Msk|macro|CAN_F3R1_FB26_Msk
DECL|CAN_F3R1_FB26_Pos|macro|CAN_F3R1_FB26_Pos
DECL|CAN_F3R1_FB26|macro|CAN_F3R1_FB26
DECL|CAN_F3R1_FB27_Msk|macro|CAN_F3R1_FB27_Msk
DECL|CAN_F3R1_FB27_Pos|macro|CAN_F3R1_FB27_Pos
DECL|CAN_F3R1_FB27|macro|CAN_F3R1_FB27
DECL|CAN_F3R1_FB28_Msk|macro|CAN_F3R1_FB28_Msk
DECL|CAN_F3R1_FB28_Pos|macro|CAN_F3R1_FB28_Pos
DECL|CAN_F3R1_FB28|macro|CAN_F3R1_FB28
DECL|CAN_F3R1_FB29_Msk|macro|CAN_F3R1_FB29_Msk
DECL|CAN_F3R1_FB29_Pos|macro|CAN_F3R1_FB29_Pos
DECL|CAN_F3R1_FB29|macro|CAN_F3R1_FB29
DECL|CAN_F3R1_FB2_Msk|macro|CAN_F3R1_FB2_Msk
DECL|CAN_F3R1_FB2_Pos|macro|CAN_F3R1_FB2_Pos
DECL|CAN_F3R1_FB2|macro|CAN_F3R1_FB2
DECL|CAN_F3R1_FB30_Msk|macro|CAN_F3R1_FB30_Msk
DECL|CAN_F3R1_FB30_Pos|macro|CAN_F3R1_FB30_Pos
DECL|CAN_F3R1_FB30|macro|CAN_F3R1_FB30
DECL|CAN_F3R1_FB31_Msk|macro|CAN_F3R1_FB31_Msk
DECL|CAN_F3R1_FB31_Pos|macro|CAN_F3R1_FB31_Pos
DECL|CAN_F3R1_FB31|macro|CAN_F3R1_FB31
DECL|CAN_F3R1_FB3_Msk|macro|CAN_F3R1_FB3_Msk
DECL|CAN_F3R1_FB3_Pos|macro|CAN_F3R1_FB3_Pos
DECL|CAN_F3R1_FB3|macro|CAN_F3R1_FB3
DECL|CAN_F3R1_FB4_Msk|macro|CAN_F3R1_FB4_Msk
DECL|CAN_F3R1_FB4_Pos|macro|CAN_F3R1_FB4_Pos
DECL|CAN_F3R1_FB4|macro|CAN_F3R1_FB4
DECL|CAN_F3R1_FB5_Msk|macro|CAN_F3R1_FB5_Msk
DECL|CAN_F3R1_FB5_Pos|macro|CAN_F3R1_FB5_Pos
DECL|CAN_F3R1_FB5|macro|CAN_F3R1_FB5
DECL|CAN_F3R1_FB6_Msk|macro|CAN_F3R1_FB6_Msk
DECL|CAN_F3R1_FB6_Pos|macro|CAN_F3R1_FB6_Pos
DECL|CAN_F3R1_FB6|macro|CAN_F3R1_FB6
DECL|CAN_F3R1_FB7_Msk|macro|CAN_F3R1_FB7_Msk
DECL|CAN_F3R1_FB7_Pos|macro|CAN_F3R1_FB7_Pos
DECL|CAN_F3R1_FB7|macro|CAN_F3R1_FB7
DECL|CAN_F3R1_FB8_Msk|macro|CAN_F3R1_FB8_Msk
DECL|CAN_F3R1_FB8_Pos|macro|CAN_F3R1_FB8_Pos
DECL|CAN_F3R1_FB8|macro|CAN_F3R1_FB8
DECL|CAN_F3R1_FB9_Msk|macro|CAN_F3R1_FB9_Msk
DECL|CAN_F3R1_FB9_Pos|macro|CAN_F3R1_FB9_Pos
DECL|CAN_F3R1_FB9|macro|CAN_F3R1_FB9
DECL|CAN_F3R2_FB0_Msk|macro|CAN_F3R2_FB0_Msk
DECL|CAN_F3R2_FB0_Pos|macro|CAN_F3R2_FB0_Pos
DECL|CAN_F3R2_FB0|macro|CAN_F3R2_FB0
DECL|CAN_F3R2_FB10_Msk|macro|CAN_F3R2_FB10_Msk
DECL|CAN_F3R2_FB10_Pos|macro|CAN_F3R2_FB10_Pos
DECL|CAN_F3R2_FB10|macro|CAN_F3R2_FB10
DECL|CAN_F3R2_FB11_Msk|macro|CAN_F3R2_FB11_Msk
DECL|CAN_F3R2_FB11_Pos|macro|CAN_F3R2_FB11_Pos
DECL|CAN_F3R2_FB11|macro|CAN_F3R2_FB11
DECL|CAN_F3R2_FB12_Msk|macro|CAN_F3R2_FB12_Msk
DECL|CAN_F3R2_FB12_Pos|macro|CAN_F3R2_FB12_Pos
DECL|CAN_F3R2_FB12|macro|CAN_F3R2_FB12
DECL|CAN_F3R2_FB13_Msk|macro|CAN_F3R2_FB13_Msk
DECL|CAN_F3R2_FB13_Pos|macro|CAN_F3R2_FB13_Pos
DECL|CAN_F3R2_FB13|macro|CAN_F3R2_FB13
DECL|CAN_F3R2_FB14_Msk|macro|CAN_F3R2_FB14_Msk
DECL|CAN_F3R2_FB14_Pos|macro|CAN_F3R2_FB14_Pos
DECL|CAN_F3R2_FB14|macro|CAN_F3R2_FB14
DECL|CAN_F3R2_FB15_Msk|macro|CAN_F3R2_FB15_Msk
DECL|CAN_F3R2_FB15_Pos|macro|CAN_F3R2_FB15_Pos
DECL|CAN_F3R2_FB15|macro|CAN_F3R2_FB15
DECL|CAN_F3R2_FB16_Msk|macro|CAN_F3R2_FB16_Msk
DECL|CAN_F3R2_FB16_Pos|macro|CAN_F3R2_FB16_Pos
DECL|CAN_F3R2_FB16|macro|CAN_F3R2_FB16
DECL|CAN_F3R2_FB17_Msk|macro|CAN_F3R2_FB17_Msk
DECL|CAN_F3R2_FB17_Pos|macro|CAN_F3R2_FB17_Pos
DECL|CAN_F3R2_FB17|macro|CAN_F3R2_FB17
DECL|CAN_F3R2_FB18_Msk|macro|CAN_F3R2_FB18_Msk
DECL|CAN_F3R2_FB18_Pos|macro|CAN_F3R2_FB18_Pos
DECL|CAN_F3R2_FB18|macro|CAN_F3R2_FB18
DECL|CAN_F3R2_FB19_Msk|macro|CAN_F3R2_FB19_Msk
DECL|CAN_F3R2_FB19_Pos|macro|CAN_F3R2_FB19_Pos
DECL|CAN_F3R2_FB19|macro|CAN_F3R2_FB19
DECL|CAN_F3R2_FB1_Msk|macro|CAN_F3R2_FB1_Msk
DECL|CAN_F3R2_FB1_Pos|macro|CAN_F3R2_FB1_Pos
DECL|CAN_F3R2_FB1|macro|CAN_F3R2_FB1
DECL|CAN_F3R2_FB20_Msk|macro|CAN_F3R2_FB20_Msk
DECL|CAN_F3R2_FB20_Pos|macro|CAN_F3R2_FB20_Pos
DECL|CAN_F3R2_FB20|macro|CAN_F3R2_FB20
DECL|CAN_F3R2_FB21_Msk|macro|CAN_F3R2_FB21_Msk
DECL|CAN_F3R2_FB21_Pos|macro|CAN_F3R2_FB21_Pos
DECL|CAN_F3R2_FB21|macro|CAN_F3R2_FB21
DECL|CAN_F3R2_FB22_Msk|macro|CAN_F3R2_FB22_Msk
DECL|CAN_F3R2_FB22_Pos|macro|CAN_F3R2_FB22_Pos
DECL|CAN_F3R2_FB22|macro|CAN_F3R2_FB22
DECL|CAN_F3R2_FB23_Msk|macro|CAN_F3R2_FB23_Msk
DECL|CAN_F3R2_FB23_Pos|macro|CAN_F3R2_FB23_Pos
DECL|CAN_F3R2_FB23|macro|CAN_F3R2_FB23
DECL|CAN_F3R2_FB24_Msk|macro|CAN_F3R2_FB24_Msk
DECL|CAN_F3R2_FB24_Pos|macro|CAN_F3R2_FB24_Pos
DECL|CAN_F3R2_FB24|macro|CAN_F3R2_FB24
DECL|CAN_F3R2_FB25_Msk|macro|CAN_F3R2_FB25_Msk
DECL|CAN_F3R2_FB25_Pos|macro|CAN_F3R2_FB25_Pos
DECL|CAN_F3R2_FB25|macro|CAN_F3R2_FB25
DECL|CAN_F3R2_FB26_Msk|macro|CAN_F3R2_FB26_Msk
DECL|CAN_F3R2_FB26_Pos|macro|CAN_F3R2_FB26_Pos
DECL|CAN_F3R2_FB26|macro|CAN_F3R2_FB26
DECL|CAN_F3R2_FB27_Msk|macro|CAN_F3R2_FB27_Msk
DECL|CAN_F3R2_FB27_Pos|macro|CAN_F3R2_FB27_Pos
DECL|CAN_F3R2_FB27|macro|CAN_F3R2_FB27
DECL|CAN_F3R2_FB28_Msk|macro|CAN_F3R2_FB28_Msk
DECL|CAN_F3R2_FB28_Pos|macro|CAN_F3R2_FB28_Pos
DECL|CAN_F3R2_FB28|macro|CAN_F3R2_FB28
DECL|CAN_F3R2_FB29_Msk|macro|CAN_F3R2_FB29_Msk
DECL|CAN_F3R2_FB29_Pos|macro|CAN_F3R2_FB29_Pos
DECL|CAN_F3R2_FB29|macro|CAN_F3R2_FB29
DECL|CAN_F3R2_FB2_Msk|macro|CAN_F3R2_FB2_Msk
DECL|CAN_F3R2_FB2_Pos|macro|CAN_F3R2_FB2_Pos
DECL|CAN_F3R2_FB2|macro|CAN_F3R2_FB2
DECL|CAN_F3R2_FB30_Msk|macro|CAN_F3R2_FB30_Msk
DECL|CAN_F3R2_FB30_Pos|macro|CAN_F3R2_FB30_Pos
DECL|CAN_F3R2_FB30|macro|CAN_F3R2_FB30
DECL|CAN_F3R2_FB31_Msk|macro|CAN_F3R2_FB31_Msk
DECL|CAN_F3R2_FB31_Pos|macro|CAN_F3R2_FB31_Pos
DECL|CAN_F3R2_FB31|macro|CAN_F3R2_FB31
DECL|CAN_F3R2_FB3_Msk|macro|CAN_F3R2_FB3_Msk
DECL|CAN_F3R2_FB3_Pos|macro|CAN_F3R2_FB3_Pos
DECL|CAN_F3R2_FB3|macro|CAN_F3R2_FB3
DECL|CAN_F3R2_FB4_Msk|macro|CAN_F3R2_FB4_Msk
DECL|CAN_F3R2_FB4_Pos|macro|CAN_F3R2_FB4_Pos
DECL|CAN_F3R2_FB4|macro|CAN_F3R2_FB4
DECL|CAN_F3R2_FB5_Msk|macro|CAN_F3R2_FB5_Msk
DECL|CAN_F3R2_FB5_Pos|macro|CAN_F3R2_FB5_Pos
DECL|CAN_F3R2_FB5|macro|CAN_F3R2_FB5
DECL|CAN_F3R2_FB6_Msk|macro|CAN_F3R2_FB6_Msk
DECL|CAN_F3R2_FB6_Pos|macro|CAN_F3R2_FB6_Pos
DECL|CAN_F3R2_FB6|macro|CAN_F3R2_FB6
DECL|CAN_F3R2_FB7_Msk|macro|CAN_F3R2_FB7_Msk
DECL|CAN_F3R2_FB7_Pos|macro|CAN_F3R2_FB7_Pos
DECL|CAN_F3R2_FB7|macro|CAN_F3R2_FB7
DECL|CAN_F3R2_FB8_Msk|macro|CAN_F3R2_FB8_Msk
DECL|CAN_F3R2_FB8_Pos|macro|CAN_F3R2_FB8_Pos
DECL|CAN_F3R2_FB8|macro|CAN_F3R2_FB8
DECL|CAN_F3R2_FB9_Msk|macro|CAN_F3R2_FB9_Msk
DECL|CAN_F3R2_FB9_Pos|macro|CAN_F3R2_FB9_Pos
DECL|CAN_F3R2_FB9|macro|CAN_F3R2_FB9
DECL|CAN_F4R1_FB0_Msk|macro|CAN_F4R1_FB0_Msk
DECL|CAN_F4R1_FB0_Pos|macro|CAN_F4R1_FB0_Pos
DECL|CAN_F4R1_FB0|macro|CAN_F4R1_FB0
DECL|CAN_F4R1_FB10_Msk|macro|CAN_F4R1_FB10_Msk
DECL|CAN_F4R1_FB10_Pos|macro|CAN_F4R1_FB10_Pos
DECL|CAN_F4R1_FB10|macro|CAN_F4R1_FB10
DECL|CAN_F4R1_FB11_Msk|macro|CAN_F4R1_FB11_Msk
DECL|CAN_F4R1_FB11_Pos|macro|CAN_F4R1_FB11_Pos
DECL|CAN_F4R1_FB11|macro|CAN_F4R1_FB11
DECL|CAN_F4R1_FB12_Msk|macro|CAN_F4R1_FB12_Msk
DECL|CAN_F4R1_FB12_Pos|macro|CAN_F4R1_FB12_Pos
DECL|CAN_F4R1_FB12|macro|CAN_F4R1_FB12
DECL|CAN_F4R1_FB13_Msk|macro|CAN_F4R1_FB13_Msk
DECL|CAN_F4R1_FB13_Pos|macro|CAN_F4R1_FB13_Pos
DECL|CAN_F4R1_FB13|macro|CAN_F4R1_FB13
DECL|CAN_F4R1_FB14_Msk|macro|CAN_F4R1_FB14_Msk
DECL|CAN_F4R1_FB14_Pos|macro|CAN_F4R1_FB14_Pos
DECL|CAN_F4R1_FB14|macro|CAN_F4R1_FB14
DECL|CAN_F4R1_FB15_Msk|macro|CAN_F4R1_FB15_Msk
DECL|CAN_F4R1_FB15_Pos|macro|CAN_F4R1_FB15_Pos
DECL|CAN_F4R1_FB15|macro|CAN_F4R1_FB15
DECL|CAN_F4R1_FB16_Msk|macro|CAN_F4R1_FB16_Msk
DECL|CAN_F4R1_FB16_Pos|macro|CAN_F4R1_FB16_Pos
DECL|CAN_F4R1_FB16|macro|CAN_F4R1_FB16
DECL|CAN_F4R1_FB17_Msk|macro|CAN_F4R1_FB17_Msk
DECL|CAN_F4R1_FB17_Pos|macro|CAN_F4R1_FB17_Pos
DECL|CAN_F4R1_FB17|macro|CAN_F4R1_FB17
DECL|CAN_F4R1_FB18_Msk|macro|CAN_F4R1_FB18_Msk
DECL|CAN_F4R1_FB18_Pos|macro|CAN_F4R1_FB18_Pos
DECL|CAN_F4R1_FB18|macro|CAN_F4R1_FB18
DECL|CAN_F4R1_FB19_Msk|macro|CAN_F4R1_FB19_Msk
DECL|CAN_F4R1_FB19_Pos|macro|CAN_F4R1_FB19_Pos
DECL|CAN_F4R1_FB19|macro|CAN_F4R1_FB19
DECL|CAN_F4R1_FB1_Msk|macro|CAN_F4R1_FB1_Msk
DECL|CAN_F4R1_FB1_Pos|macro|CAN_F4R1_FB1_Pos
DECL|CAN_F4R1_FB1|macro|CAN_F4R1_FB1
DECL|CAN_F4R1_FB20_Msk|macro|CAN_F4R1_FB20_Msk
DECL|CAN_F4R1_FB20_Pos|macro|CAN_F4R1_FB20_Pos
DECL|CAN_F4R1_FB20|macro|CAN_F4R1_FB20
DECL|CAN_F4R1_FB21_Msk|macro|CAN_F4R1_FB21_Msk
DECL|CAN_F4R1_FB21_Pos|macro|CAN_F4R1_FB21_Pos
DECL|CAN_F4R1_FB21|macro|CAN_F4R1_FB21
DECL|CAN_F4R1_FB22_Msk|macro|CAN_F4R1_FB22_Msk
DECL|CAN_F4R1_FB22_Pos|macro|CAN_F4R1_FB22_Pos
DECL|CAN_F4R1_FB22|macro|CAN_F4R1_FB22
DECL|CAN_F4R1_FB23_Msk|macro|CAN_F4R1_FB23_Msk
DECL|CAN_F4R1_FB23_Pos|macro|CAN_F4R1_FB23_Pos
DECL|CAN_F4R1_FB23|macro|CAN_F4R1_FB23
DECL|CAN_F4R1_FB24_Msk|macro|CAN_F4R1_FB24_Msk
DECL|CAN_F4R1_FB24_Pos|macro|CAN_F4R1_FB24_Pos
DECL|CAN_F4R1_FB24|macro|CAN_F4R1_FB24
DECL|CAN_F4R1_FB25_Msk|macro|CAN_F4R1_FB25_Msk
DECL|CAN_F4R1_FB25_Pos|macro|CAN_F4R1_FB25_Pos
DECL|CAN_F4R1_FB25|macro|CAN_F4R1_FB25
DECL|CAN_F4R1_FB26_Msk|macro|CAN_F4R1_FB26_Msk
DECL|CAN_F4R1_FB26_Pos|macro|CAN_F4R1_FB26_Pos
DECL|CAN_F4R1_FB26|macro|CAN_F4R1_FB26
DECL|CAN_F4R1_FB27_Msk|macro|CAN_F4R1_FB27_Msk
DECL|CAN_F4R1_FB27_Pos|macro|CAN_F4R1_FB27_Pos
DECL|CAN_F4R1_FB27|macro|CAN_F4R1_FB27
DECL|CAN_F4R1_FB28_Msk|macro|CAN_F4R1_FB28_Msk
DECL|CAN_F4R1_FB28_Pos|macro|CAN_F4R1_FB28_Pos
DECL|CAN_F4R1_FB28|macro|CAN_F4R1_FB28
DECL|CAN_F4R1_FB29_Msk|macro|CAN_F4R1_FB29_Msk
DECL|CAN_F4R1_FB29_Pos|macro|CAN_F4R1_FB29_Pos
DECL|CAN_F4R1_FB29|macro|CAN_F4R1_FB29
DECL|CAN_F4R1_FB2_Msk|macro|CAN_F4R1_FB2_Msk
DECL|CAN_F4R1_FB2_Pos|macro|CAN_F4R1_FB2_Pos
DECL|CAN_F4R1_FB2|macro|CAN_F4R1_FB2
DECL|CAN_F4R1_FB30_Msk|macro|CAN_F4R1_FB30_Msk
DECL|CAN_F4R1_FB30_Pos|macro|CAN_F4R1_FB30_Pos
DECL|CAN_F4R1_FB30|macro|CAN_F4R1_FB30
DECL|CAN_F4R1_FB31_Msk|macro|CAN_F4R1_FB31_Msk
DECL|CAN_F4R1_FB31_Pos|macro|CAN_F4R1_FB31_Pos
DECL|CAN_F4R1_FB31|macro|CAN_F4R1_FB31
DECL|CAN_F4R1_FB3_Msk|macro|CAN_F4R1_FB3_Msk
DECL|CAN_F4R1_FB3_Pos|macro|CAN_F4R1_FB3_Pos
DECL|CAN_F4R1_FB3|macro|CAN_F4R1_FB3
DECL|CAN_F4R1_FB4_Msk|macro|CAN_F4R1_FB4_Msk
DECL|CAN_F4R1_FB4_Pos|macro|CAN_F4R1_FB4_Pos
DECL|CAN_F4R1_FB4|macro|CAN_F4R1_FB4
DECL|CAN_F4R1_FB5_Msk|macro|CAN_F4R1_FB5_Msk
DECL|CAN_F4R1_FB5_Pos|macro|CAN_F4R1_FB5_Pos
DECL|CAN_F4R1_FB5|macro|CAN_F4R1_FB5
DECL|CAN_F4R1_FB6_Msk|macro|CAN_F4R1_FB6_Msk
DECL|CAN_F4R1_FB6_Pos|macro|CAN_F4R1_FB6_Pos
DECL|CAN_F4R1_FB6|macro|CAN_F4R1_FB6
DECL|CAN_F4R1_FB7_Msk|macro|CAN_F4R1_FB7_Msk
DECL|CAN_F4R1_FB7_Pos|macro|CAN_F4R1_FB7_Pos
DECL|CAN_F4R1_FB7|macro|CAN_F4R1_FB7
DECL|CAN_F4R1_FB8_Msk|macro|CAN_F4R1_FB8_Msk
DECL|CAN_F4R1_FB8_Pos|macro|CAN_F4R1_FB8_Pos
DECL|CAN_F4R1_FB8|macro|CAN_F4R1_FB8
DECL|CAN_F4R1_FB9_Msk|macro|CAN_F4R1_FB9_Msk
DECL|CAN_F4R1_FB9_Pos|macro|CAN_F4R1_FB9_Pos
DECL|CAN_F4R1_FB9|macro|CAN_F4R1_FB9
DECL|CAN_F4R2_FB0_Msk|macro|CAN_F4R2_FB0_Msk
DECL|CAN_F4R2_FB0_Pos|macro|CAN_F4R2_FB0_Pos
DECL|CAN_F4R2_FB0|macro|CAN_F4R2_FB0
DECL|CAN_F4R2_FB10_Msk|macro|CAN_F4R2_FB10_Msk
DECL|CAN_F4R2_FB10_Pos|macro|CAN_F4R2_FB10_Pos
DECL|CAN_F4R2_FB10|macro|CAN_F4R2_FB10
DECL|CAN_F4R2_FB11_Msk|macro|CAN_F4R2_FB11_Msk
DECL|CAN_F4R2_FB11_Pos|macro|CAN_F4R2_FB11_Pos
DECL|CAN_F4R2_FB11|macro|CAN_F4R2_FB11
DECL|CAN_F4R2_FB12_Msk|macro|CAN_F4R2_FB12_Msk
DECL|CAN_F4R2_FB12_Pos|macro|CAN_F4R2_FB12_Pos
DECL|CAN_F4R2_FB12|macro|CAN_F4R2_FB12
DECL|CAN_F4R2_FB13_Msk|macro|CAN_F4R2_FB13_Msk
DECL|CAN_F4R2_FB13_Pos|macro|CAN_F4R2_FB13_Pos
DECL|CAN_F4R2_FB13|macro|CAN_F4R2_FB13
DECL|CAN_F4R2_FB14_Msk|macro|CAN_F4R2_FB14_Msk
DECL|CAN_F4R2_FB14_Pos|macro|CAN_F4R2_FB14_Pos
DECL|CAN_F4R2_FB14|macro|CAN_F4R2_FB14
DECL|CAN_F4R2_FB15_Msk|macro|CAN_F4R2_FB15_Msk
DECL|CAN_F4R2_FB15_Pos|macro|CAN_F4R2_FB15_Pos
DECL|CAN_F4R2_FB15|macro|CAN_F4R2_FB15
DECL|CAN_F4R2_FB16_Msk|macro|CAN_F4R2_FB16_Msk
DECL|CAN_F4R2_FB16_Pos|macro|CAN_F4R2_FB16_Pos
DECL|CAN_F4R2_FB16|macro|CAN_F4R2_FB16
DECL|CAN_F4R2_FB17_Msk|macro|CAN_F4R2_FB17_Msk
DECL|CAN_F4R2_FB17_Pos|macro|CAN_F4R2_FB17_Pos
DECL|CAN_F4R2_FB17|macro|CAN_F4R2_FB17
DECL|CAN_F4R2_FB18_Msk|macro|CAN_F4R2_FB18_Msk
DECL|CAN_F4R2_FB18_Pos|macro|CAN_F4R2_FB18_Pos
DECL|CAN_F4R2_FB18|macro|CAN_F4R2_FB18
DECL|CAN_F4R2_FB19_Msk|macro|CAN_F4R2_FB19_Msk
DECL|CAN_F4R2_FB19_Pos|macro|CAN_F4R2_FB19_Pos
DECL|CAN_F4R2_FB19|macro|CAN_F4R2_FB19
DECL|CAN_F4R2_FB1_Msk|macro|CAN_F4R2_FB1_Msk
DECL|CAN_F4R2_FB1_Pos|macro|CAN_F4R2_FB1_Pos
DECL|CAN_F4R2_FB1|macro|CAN_F4R2_FB1
DECL|CAN_F4R2_FB20_Msk|macro|CAN_F4R2_FB20_Msk
DECL|CAN_F4R2_FB20_Pos|macro|CAN_F4R2_FB20_Pos
DECL|CAN_F4R2_FB20|macro|CAN_F4R2_FB20
DECL|CAN_F4R2_FB21_Msk|macro|CAN_F4R2_FB21_Msk
DECL|CAN_F4R2_FB21_Pos|macro|CAN_F4R2_FB21_Pos
DECL|CAN_F4R2_FB21|macro|CAN_F4R2_FB21
DECL|CAN_F4R2_FB22_Msk|macro|CAN_F4R2_FB22_Msk
DECL|CAN_F4R2_FB22_Pos|macro|CAN_F4R2_FB22_Pos
DECL|CAN_F4R2_FB22|macro|CAN_F4R2_FB22
DECL|CAN_F4R2_FB23_Msk|macro|CAN_F4R2_FB23_Msk
DECL|CAN_F4R2_FB23_Pos|macro|CAN_F4R2_FB23_Pos
DECL|CAN_F4R2_FB23|macro|CAN_F4R2_FB23
DECL|CAN_F4R2_FB24_Msk|macro|CAN_F4R2_FB24_Msk
DECL|CAN_F4R2_FB24_Pos|macro|CAN_F4R2_FB24_Pos
DECL|CAN_F4R2_FB24|macro|CAN_F4R2_FB24
DECL|CAN_F4R2_FB25_Msk|macro|CAN_F4R2_FB25_Msk
DECL|CAN_F4R2_FB25_Pos|macro|CAN_F4R2_FB25_Pos
DECL|CAN_F4R2_FB25|macro|CAN_F4R2_FB25
DECL|CAN_F4R2_FB26_Msk|macro|CAN_F4R2_FB26_Msk
DECL|CAN_F4R2_FB26_Pos|macro|CAN_F4R2_FB26_Pos
DECL|CAN_F4R2_FB26|macro|CAN_F4R2_FB26
DECL|CAN_F4R2_FB27_Msk|macro|CAN_F4R2_FB27_Msk
DECL|CAN_F4R2_FB27_Pos|macro|CAN_F4R2_FB27_Pos
DECL|CAN_F4R2_FB27|macro|CAN_F4R2_FB27
DECL|CAN_F4R2_FB28_Msk|macro|CAN_F4R2_FB28_Msk
DECL|CAN_F4R2_FB28_Pos|macro|CAN_F4R2_FB28_Pos
DECL|CAN_F4R2_FB28|macro|CAN_F4R2_FB28
DECL|CAN_F4R2_FB29_Msk|macro|CAN_F4R2_FB29_Msk
DECL|CAN_F4R2_FB29_Pos|macro|CAN_F4R2_FB29_Pos
DECL|CAN_F4R2_FB29|macro|CAN_F4R2_FB29
DECL|CAN_F4R2_FB2_Msk|macro|CAN_F4R2_FB2_Msk
DECL|CAN_F4R2_FB2_Pos|macro|CAN_F4R2_FB2_Pos
DECL|CAN_F4R2_FB2|macro|CAN_F4R2_FB2
DECL|CAN_F4R2_FB30_Msk|macro|CAN_F4R2_FB30_Msk
DECL|CAN_F4R2_FB30_Pos|macro|CAN_F4R2_FB30_Pos
DECL|CAN_F4R2_FB30|macro|CAN_F4R2_FB30
DECL|CAN_F4R2_FB31_Msk|macro|CAN_F4R2_FB31_Msk
DECL|CAN_F4R2_FB31_Pos|macro|CAN_F4R2_FB31_Pos
DECL|CAN_F4R2_FB31|macro|CAN_F4R2_FB31
DECL|CAN_F4R2_FB3_Msk|macro|CAN_F4R2_FB3_Msk
DECL|CAN_F4R2_FB3_Pos|macro|CAN_F4R2_FB3_Pos
DECL|CAN_F4R2_FB3|macro|CAN_F4R2_FB3
DECL|CAN_F4R2_FB4_Msk|macro|CAN_F4R2_FB4_Msk
DECL|CAN_F4R2_FB4_Pos|macro|CAN_F4R2_FB4_Pos
DECL|CAN_F4R2_FB4|macro|CAN_F4R2_FB4
DECL|CAN_F4R2_FB5_Msk|macro|CAN_F4R2_FB5_Msk
DECL|CAN_F4R2_FB5_Pos|macro|CAN_F4R2_FB5_Pos
DECL|CAN_F4R2_FB5|macro|CAN_F4R2_FB5
DECL|CAN_F4R2_FB6_Msk|macro|CAN_F4R2_FB6_Msk
DECL|CAN_F4R2_FB6_Pos|macro|CAN_F4R2_FB6_Pos
DECL|CAN_F4R2_FB6|macro|CAN_F4R2_FB6
DECL|CAN_F4R2_FB7_Msk|macro|CAN_F4R2_FB7_Msk
DECL|CAN_F4R2_FB7_Pos|macro|CAN_F4R2_FB7_Pos
DECL|CAN_F4R2_FB7|macro|CAN_F4R2_FB7
DECL|CAN_F4R2_FB8_Msk|macro|CAN_F4R2_FB8_Msk
DECL|CAN_F4R2_FB8_Pos|macro|CAN_F4R2_FB8_Pos
DECL|CAN_F4R2_FB8|macro|CAN_F4R2_FB8
DECL|CAN_F4R2_FB9_Msk|macro|CAN_F4R2_FB9_Msk
DECL|CAN_F4R2_FB9_Pos|macro|CAN_F4R2_FB9_Pos
DECL|CAN_F4R2_FB9|macro|CAN_F4R2_FB9
DECL|CAN_F5R1_FB0_Msk|macro|CAN_F5R1_FB0_Msk
DECL|CAN_F5R1_FB0_Pos|macro|CAN_F5R1_FB0_Pos
DECL|CAN_F5R1_FB0|macro|CAN_F5R1_FB0
DECL|CAN_F5R1_FB10_Msk|macro|CAN_F5R1_FB10_Msk
DECL|CAN_F5R1_FB10_Pos|macro|CAN_F5R1_FB10_Pos
DECL|CAN_F5R1_FB10|macro|CAN_F5R1_FB10
DECL|CAN_F5R1_FB11_Msk|macro|CAN_F5R1_FB11_Msk
DECL|CAN_F5R1_FB11_Pos|macro|CAN_F5R1_FB11_Pos
DECL|CAN_F5R1_FB11|macro|CAN_F5R1_FB11
DECL|CAN_F5R1_FB12_Msk|macro|CAN_F5R1_FB12_Msk
DECL|CAN_F5R1_FB12_Pos|macro|CAN_F5R1_FB12_Pos
DECL|CAN_F5R1_FB12|macro|CAN_F5R1_FB12
DECL|CAN_F5R1_FB13_Msk|macro|CAN_F5R1_FB13_Msk
DECL|CAN_F5R1_FB13_Pos|macro|CAN_F5R1_FB13_Pos
DECL|CAN_F5R1_FB13|macro|CAN_F5R1_FB13
DECL|CAN_F5R1_FB14_Msk|macro|CAN_F5R1_FB14_Msk
DECL|CAN_F5R1_FB14_Pos|macro|CAN_F5R1_FB14_Pos
DECL|CAN_F5R1_FB14|macro|CAN_F5R1_FB14
DECL|CAN_F5R1_FB15_Msk|macro|CAN_F5R1_FB15_Msk
DECL|CAN_F5R1_FB15_Pos|macro|CAN_F5R1_FB15_Pos
DECL|CAN_F5R1_FB15|macro|CAN_F5R1_FB15
DECL|CAN_F5R1_FB16_Msk|macro|CAN_F5R1_FB16_Msk
DECL|CAN_F5R1_FB16_Pos|macro|CAN_F5R1_FB16_Pos
DECL|CAN_F5R1_FB16|macro|CAN_F5R1_FB16
DECL|CAN_F5R1_FB17_Msk|macro|CAN_F5R1_FB17_Msk
DECL|CAN_F5R1_FB17_Pos|macro|CAN_F5R1_FB17_Pos
DECL|CAN_F5R1_FB17|macro|CAN_F5R1_FB17
DECL|CAN_F5R1_FB18_Msk|macro|CAN_F5R1_FB18_Msk
DECL|CAN_F5R1_FB18_Pos|macro|CAN_F5R1_FB18_Pos
DECL|CAN_F5R1_FB18|macro|CAN_F5R1_FB18
DECL|CAN_F5R1_FB19_Msk|macro|CAN_F5R1_FB19_Msk
DECL|CAN_F5R1_FB19_Pos|macro|CAN_F5R1_FB19_Pos
DECL|CAN_F5R1_FB19|macro|CAN_F5R1_FB19
DECL|CAN_F5R1_FB1_Msk|macro|CAN_F5R1_FB1_Msk
DECL|CAN_F5R1_FB1_Pos|macro|CAN_F5R1_FB1_Pos
DECL|CAN_F5R1_FB1|macro|CAN_F5R1_FB1
DECL|CAN_F5R1_FB20_Msk|macro|CAN_F5R1_FB20_Msk
DECL|CAN_F5R1_FB20_Pos|macro|CAN_F5R1_FB20_Pos
DECL|CAN_F5R1_FB20|macro|CAN_F5R1_FB20
DECL|CAN_F5R1_FB21_Msk|macro|CAN_F5R1_FB21_Msk
DECL|CAN_F5R1_FB21_Pos|macro|CAN_F5R1_FB21_Pos
DECL|CAN_F5R1_FB21|macro|CAN_F5R1_FB21
DECL|CAN_F5R1_FB22_Msk|macro|CAN_F5R1_FB22_Msk
DECL|CAN_F5R1_FB22_Pos|macro|CAN_F5R1_FB22_Pos
DECL|CAN_F5R1_FB22|macro|CAN_F5R1_FB22
DECL|CAN_F5R1_FB23_Msk|macro|CAN_F5R1_FB23_Msk
DECL|CAN_F5R1_FB23_Pos|macro|CAN_F5R1_FB23_Pos
DECL|CAN_F5R1_FB23|macro|CAN_F5R1_FB23
DECL|CAN_F5R1_FB24_Msk|macro|CAN_F5R1_FB24_Msk
DECL|CAN_F5R1_FB24_Pos|macro|CAN_F5R1_FB24_Pos
DECL|CAN_F5R1_FB24|macro|CAN_F5R1_FB24
DECL|CAN_F5R1_FB25_Msk|macro|CAN_F5R1_FB25_Msk
DECL|CAN_F5R1_FB25_Pos|macro|CAN_F5R1_FB25_Pos
DECL|CAN_F5R1_FB25|macro|CAN_F5R1_FB25
DECL|CAN_F5R1_FB26_Msk|macro|CAN_F5R1_FB26_Msk
DECL|CAN_F5R1_FB26_Pos|macro|CAN_F5R1_FB26_Pos
DECL|CAN_F5R1_FB26|macro|CAN_F5R1_FB26
DECL|CAN_F5R1_FB27_Msk|macro|CAN_F5R1_FB27_Msk
DECL|CAN_F5R1_FB27_Pos|macro|CAN_F5R1_FB27_Pos
DECL|CAN_F5R1_FB27|macro|CAN_F5R1_FB27
DECL|CAN_F5R1_FB28_Msk|macro|CAN_F5R1_FB28_Msk
DECL|CAN_F5R1_FB28_Pos|macro|CAN_F5R1_FB28_Pos
DECL|CAN_F5R1_FB28|macro|CAN_F5R1_FB28
DECL|CAN_F5R1_FB29_Msk|macro|CAN_F5R1_FB29_Msk
DECL|CAN_F5R1_FB29_Pos|macro|CAN_F5R1_FB29_Pos
DECL|CAN_F5R1_FB29|macro|CAN_F5R1_FB29
DECL|CAN_F5R1_FB2_Msk|macro|CAN_F5R1_FB2_Msk
DECL|CAN_F5R1_FB2_Pos|macro|CAN_F5R1_FB2_Pos
DECL|CAN_F5R1_FB2|macro|CAN_F5R1_FB2
DECL|CAN_F5R1_FB30_Msk|macro|CAN_F5R1_FB30_Msk
DECL|CAN_F5R1_FB30_Pos|macro|CAN_F5R1_FB30_Pos
DECL|CAN_F5R1_FB30|macro|CAN_F5R1_FB30
DECL|CAN_F5R1_FB31_Msk|macro|CAN_F5R1_FB31_Msk
DECL|CAN_F5R1_FB31_Pos|macro|CAN_F5R1_FB31_Pos
DECL|CAN_F5R1_FB31|macro|CAN_F5R1_FB31
DECL|CAN_F5R1_FB3_Msk|macro|CAN_F5R1_FB3_Msk
DECL|CAN_F5R1_FB3_Pos|macro|CAN_F5R1_FB3_Pos
DECL|CAN_F5R1_FB3|macro|CAN_F5R1_FB3
DECL|CAN_F5R1_FB4_Msk|macro|CAN_F5R1_FB4_Msk
DECL|CAN_F5R1_FB4_Pos|macro|CAN_F5R1_FB4_Pos
DECL|CAN_F5R1_FB4|macro|CAN_F5R1_FB4
DECL|CAN_F5R1_FB5_Msk|macro|CAN_F5R1_FB5_Msk
DECL|CAN_F5R1_FB5_Pos|macro|CAN_F5R1_FB5_Pos
DECL|CAN_F5R1_FB5|macro|CAN_F5R1_FB5
DECL|CAN_F5R1_FB6_Msk|macro|CAN_F5R1_FB6_Msk
DECL|CAN_F5R1_FB6_Pos|macro|CAN_F5R1_FB6_Pos
DECL|CAN_F5R1_FB6|macro|CAN_F5R1_FB6
DECL|CAN_F5R1_FB7_Msk|macro|CAN_F5R1_FB7_Msk
DECL|CAN_F5R1_FB7_Pos|macro|CAN_F5R1_FB7_Pos
DECL|CAN_F5R1_FB7|macro|CAN_F5R1_FB7
DECL|CAN_F5R1_FB8_Msk|macro|CAN_F5R1_FB8_Msk
DECL|CAN_F5R1_FB8_Pos|macro|CAN_F5R1_FB8_Pos
DECL|CAN_F5R1_FB8|macro|CAN_F5R1_FB8
DECL|CAN_F5R1_FB9_Msk|macro|CAN_F5R1_FB9_Msk
DECL|CAN_F5R1_FB9_Pos|macro|CAN_F5R1_FB9_Pos
DECL|CAN_F5R1_FB9|macro|CAN_F5R1_FB9
DECL|CAN_F5R2_FB0_Msk|macro|CAN_F5R2_FB0_Msk
DECL|CAN_F5R2_FB0_Pos|macro|CAN_F5R2_FB0_Pos
DECL|CAN_F5R2_FB0|macro|CAN_F5R2_FB0
DECL|CAN_F5R2_FB10_Msk|macro|CAN_F5R2_FB10_Msk
DECL|CAN_F5R2_FB10_Pos|macro|CAN_F5R2_FB10_Pos
DECL|CAN_F5R2_FB10|macro|CAN_F5R2_FB10
DECL|CAN_F5R2_FB11_Msk|macro|CAN_F5R2_FB11_Msk
DECL|CAN_F5R2_FB11_Pos|macro|CAN_F5R2_FB11_Pos
DECL|CAN_F5R2_FB11|macro|CAN_F5R2_FB11
DECL|CAN_F5R2_FB12_Msk|macro|CAN_F5R2_FB12_Msk
DECL|CAN_F5R2_FB12_Pos|macro|CAN_F5R2_FB12_Pos
DECL|CAN_F5R2_FB12|macro|CAN_F5R2_FB12
DECL|CAN_F5R2_FB13_Msk|macro|CAN_F5R2_FB13_Msk
DECL|CAN_F5R2_FB13_Pos|macro|CAN_F5R2_FB13_Pos
DECL|CAN_F5R2_FB13|macro|CAN_F5R2_FB13
DECL|CAN_F5R2_FB14_Msk|macro|CAN_F5R2_FB14_Msk
DECL|CAN_F5R2_FB14_Pos|macro|CAN_F5R2_FB14_Pos
DECL|CAN_F5R2_FB14|macro|CAN_F5R2_FB14
DECL|CAN_F5R2_FB15_Msk|macro|CAN_F5R2_FB15_Msk
DECL|CAN_F5R2_FB15_Pos|macro|CAN_F5R2_FB15_Pos
DECL|CAN_F5R2_FB15|macro|CAN_F5R2_FB15
DECL|CAN_F5R2_FB16_Msk|macro|CAN_F5R2_FB16_Msk
DECL|CAN_F5R2_FB16_Pos|macro|CAN_F5R2_FB16_Pos
DECL|CAN_F5R2_FB16|macro|CAN_F5R2_FB16
DECL|CAN_F5R2_FB17_Msk|macro|CAN_F5R2_FB17_Msk
DECL|CAN_F5R2_FB17_Pos|macro|CAN_F5R2_FB17_Pos
DECL|CAN_F5R2_FB17|macro|CAN_F5R2_FB17
DECL|CAN_F5R2_FB18_Msk|macro|CAN_F5R2_FB18_Msk
DECL|CAN_F5R2_FB18_Pos|macro|CAN_F5R2_FB18_Pos
DECL|CAN_F5R2_FB18|macro|CAN_F5R2_FB18
DECL|CAN_F5R2_FB19_Msk|macro|CAN_F5R2_FB19_Msk
DECL|CAN_F5R2_FB19_Pos|macro|CAN_F5R2_FB19_Pos
DECL|CAN_F5R2_FB19|macro|CAN_F5R2_FB19
DECL|CAN_F5R2_FB1_Msk|macro|CAN_F5R2_FB1_Msk
DECL|CAN_F5R2_FB1_Pos|macro|CAN_F5R2_FB1_Pos
DECL|CAN_F5R2_FB1|macro|CAN_F5R2_FB1
DECL|CAN_F5R2_FB20_Msk|macro|CAN_F5R2_FB20_Msk
DECL|CAN_F5R2_FB20_Pos|macro|CAN_F5R2_FB20_Pos
DECL|CAN_F5R2_FB20|macro|CAN_F5R2_FB20
DECL|CAN_F5R2_FB21_Msk|macro|CAN_F5R2_FB21_Msk
DECL|CAN_F5R2_FB21_Pos|macro|CAN_F5R2_FB21_Pos
DECL|CAN_F5R2_FB21|macro|CAN_F5R2_FB21
DECL|CAN_F5R2_FB22_Msk|macro|CAN_F5R2_FB22_Msk
DECL|CAN_F5R2_FB22_Pos|macro|CAN_F5R2_FB22_Pos
DECL|CAN_F5R2_FB22|macro|CAN_F5R2_FB22
DECL|CAN_F5R2_FB23_Msk|macro|CAN_F5R2_FB23_Msk
DECL|CAN_F5R2_FB23_Pos|macro|CAN_F5R2_FB23_Pos
DECL|CAN_F5R2_FB23|macro|CAN_F5R2_FB23
DECL|CAN_F5R2_FB24_Msk|macro|CAN_F5R2_FB24_Msk
DECL|CAN_F5R2_FB24_Pos|macro|CAN_F5R2_FB24_Pos
DECL|CAN_F5R2_FB24|macro|CAN_F5R2_FB24
DECL|CAN_F5R2_FB25_Msk|macro|CAN_F5R2_FB25_Msk
DECL|CAN_F5R2_FB25_Pos|macro|CAN_F5R2_FB25_Pos
DECL|CAN_F5R2_FB25|macro|CAN_F5R2_FB25
DECL|CAN_F5R2_FB26_Msk|macro|CAN_F5R2_FB26_Msk
DECL|CAN_F5R2_FB26_Pos|macro|CAN_F5R2_FB26_Pos
DECL|CAN_F5R2_FB26|macro|CAN_F5R2_FB26
DECL|CAN_F5R2_FB27_Msk|macro|CAN_F5R2_FB27_Msk
DECL|CAN_F5R2_FB27_Pos|macro|CAN_F5R2_FB27_Pos
DECL|CAN_F5R2_FB27|macro|CAN_F5R2_FB27
DECL|CAN_F5R2_FB28_Msk|macro|CAN_F5R2_FB28_Msk
DECL|CAN_F5R2_FB28_Pos|macro|CAN_F5R2_FB28_Pos
DECL|CAN_F5R2_FB28|macro|CAN_F5R2_FB28
DECL|CAN_F5R2_FB29_Msk|macro|CAN_F5R2_FB29_Msk
DECL|CAN_F5R2_FB29_Pos|macro|CAN_F5R2_FB29_Pos
DECL|CAN_F5R2_FB29|macro|CAN_F5R2_FB29
DECL|CAN_F5R2_FB2_Msk|macro|CAN_F5R2_FB2_Msk
DECL|CAN_F5R2_FB2_Pos|macro|CAN_F5R2_FB2_Pos
DECL|CAN_F5R2_FB2|macro|CAN_F5R2_FB2
DECL|CAN_F5R2_FB30_Msk|macro|CAN_F5R2_FB30_Msk
DECL|CAN_F5R2_FB30_Pos|macro|CAN_F5R2_FB30_Pos
DECL|CAN_F5R2_FB30|macro|CAN_F5R2_FB30
DECL|CAN_F5R2_FB31_Msk|macro|CAN_F5R2_FB31_Msk
DECL|CAN_F5R2_FB31_Pos|macro|CAN_F5R2_FB31_Pos
DECL|CAN_F5R2_FB31|macro|CAN_F5R2_FB31
DECL|CAN_F5R2_FB3_Msk|macro|CAN_F5R2_FB3_Msk
DECL|CAN_F5R2_FB3_Pos|macro|CAN_F5R2_FB3_Pos
DECL|CAN_F5R2_FB3|macro|CAN_F5R2_FB3
DECL|CAN_F5R2_FB4_Msk|macro|CAN_F5R2_FB4_Msk
DECL|CAN_F5R2_FB4_Pos|macro|CAN_F5R2_FB4_Pos
DECL|CAN_F5R2_FB4|macro|CAN_F5R2_FB4
DECL|CAN_F5R2_FB5_Msk|macro|CAN_F5R2_FB5_Msk
DECL|CAN_F5R2_FB5_Pos|macro|CAN_F5R2_FB5_Pos
DECL|CAN_F5R2_FB5|macro|CAN_F5R2_FB5
DECL|CAN_F5R2_FB6_Msk|macro|CAN_F5R2_FB6_Msk
DECL|CAN_F5R2_FB6_Pos|macro|CAN_F5R2_FB6_Pos
DECL|CAN_F5R2_FB6|macro|CAN_F5R2_FB6
DECL|CAN_F5R2_FB7_Msk|macro|CAN_F5R2_FB7_Msk
DECL|CAN_F5R2_FB7_Pos|macro|CAN_F5R2_FB7_Pos
DECL|CAN_F5R2_FB7|macro|CAN_F5R2_FB7
DECL|CAN_F5R2_FB8_Msk|macro|CAN_F5R2_FB8_Msk
DECL|CAN_F5R2_FB8_Pos|macro|CAN_F5R2_FB8_Pos
DECL|CAN_F5R2_FB8|macro|CAN_F5R2_FB8
DECL|CAN_F5R2_FB9_Msk|macro|CAN_F5R2_FB9_Msk
DECL|CAN_F5R2_FB9_Pos|macro|CAN_F5R2_FB9_Pos
DECL|CAN_F5R2_FB9|macro|CAN_F5R2_FB9
DECL|CAN_F6R1_FB0_Msk|macro|CAN_F6R1_FB0_Msk
DECL|CAN_F6R1_FB0_Pos|macro|CAN_F6R1_FB0_Pos
DECL|CAN_F6R1_FB0|macro|CAN_F6R1_FB0
DECL|CAN_F6R1_FB10_Msk|macro|CAN_F6R1_FB10_Msk
DECL|CAN_F6R1_FB10_Pos|macro|CAN_F6R1_FB10_Pos
DECL|CAN_F6R1_FB10|macro|CAN_F6R1_FB10
DECL|CAN_F6R1_FB11_Msk|macro|CAN_F6R1_FB11_Msk
DECL|CAN_F6R1_FB11_Pos|macro|CAN_F6R1_FB11_Pos
DECL|CAN_F6R1_FB11|macro|CAN_F6R1_FB11
DECL|CAN_F6R1_FB12_Msk|macro|CAN_F6R1_FB12_Msk
DECL|CAN_F6R1_FB12_Pos|macro|CAN_F6R1_FB12_Pos
DECL|CAN_F6R1_FB12|macro|CAN_F6R1_FB12
DECL|CAN_F6R1_FB13_Msk|macro|CAN_F6R1_FB13_Msk
DECL|CAN_F6R1_FB13_Pos|macro|CAN_F6R1_FB13_Pos
DECL|CAN_F6R1_FB13|macro|CAN_F6R1_FB13
DECL|CAN_F6R1_FB14_Msk|macro|CAN_F6R1_FB14_Msk
DECL|CAN_F6R1_FB14_Pos|macro|CAN_F6R1_FB14_Pos
DECL|CAN_F6R1_FB14|macro|CAN_F6R1_FB14
DECL|CAN_F6R1_FB15_Msk|macro|CAN_F6R1_FB15_Msk
DECL|CAN_F6R1_FB15_Pos|macro|CAN_F6R1_FB15_Pos
DECL|CAN_F6R1_FB15|macro|CAN_F6R1_FB15
DECL|CAN_F6R1_FB16_Msk|macro|CAN_F6R1_FB16_Msk
DECL|CAN_F6R1_FB16_Pos|macro|CAN_F6R1_FB16_Pos
DECL|CAN_F6R1_FB16|macro|CAN_F6R1_FB16
DECL|CAN_F6R1_FB17_Msk|macro|CAN_F6R1_FB17_Msk
DECL|CAN_F6R1_FB17_Pos|macro|CAN_F6R1_FB17_Pos
DECL|CAN_F6R1_FB17|macro|CAN_F6R1_FB17
DECL|CAN_F6R1_FB18_Msk|macro|CAN_F6R1_FB18_Msk
DECL|CAN_F6R1_FB18_Pos|macro|CAN_F6R1_FB18_Pos
DECL|CAN_F6R1_FB18|macro|CAN_F6R1_FB18
DECL|CAN_F6R1_FB19_Msk|macro|CAN_F6R1_FB19_Msk
DECL|CAN_F6R1_FB19_Pos|macro|CAN_F6R1_FB19_Pos
DECL|CAN_F6R1_FB19|macro|CAN_F6R1_FB19
DECL|CAN_F6R1_FB1_Msk|macro|CAN_F6R1_FB1_Msk
DECL|CAN_F6R1_FB1_Pos|macro|CAN_F6R1_FB1_Pos
DECL|CAN_F6R1_FB1|macro|CAN_F6R1_FB1
DECL|CAN_F6R1_FB20_Msk|macro|CAN_F6R1_FB20_Msk
DECL|CAN_F6R1_FB20_Pos|macro|CAN_F6R1_FB20_Pos
DECL|CAN_F6R1_FB20|macro|CAN_F6R1_FB20
DECL|CAN_F6R1_FB21_Msk|macro|CAN_F6R1_FB21_Msk
DECL|CAN_F6R1_FB21_Pos|macro|CAN_F6R1_FB21_Pos
DECL|CAN_F6R1_FB21|macro|CAN_F6R1_FB21
DECL|CAN_F6R1_FB22_Msk|macro|CAN_F6R1_FB22_Msk
DECL|CAN_F6R1_FB22_Pos|macro|CAN_F6R1_FB22_Pos
DECL|CAN_F6R1_FB22|macro|CAN_F6R1_FB22
DECL|CAN_F6R1_FB23_Msk|macro|CAN_F6R1_FB23_Msk
DECL|CAN_F6R1_FB23_Pos|macro|CAN_F6R1_FB23_Pos
DECL|CAN_F6R1_FB23|macro|CAN_F6R1_FB23
DECL|CAN_F6R1_FB24_Msk|macro|CAN_F6R1_FB24_Msk
DECL|CAN_F6R1_FB24_Pos|macro|CAN_F6R1_FB24_Pos
DECL|CAN_F6R1_FB24|macro|CAN_F6R1_FB24
DECL|CAN_F6R1_FB25_Msk|macro|CAN_F6R1_FB25_Msk
DECL|CAN_F6R1_FB25_Pos|macro|CAN_F6R1_FB25_Pos
DECL|CAN_F6R1_FB25|macro|CAN_F6R1_FB25
DECL|CAN_F6R1_FB26_Msk|macro|CAN_F6R1_FB26_Msk
DECL|CAN_F6R1_FB26_Pos|macro|CAN_F6R1_FB26_Pos
DECL|CAN_F6R1_FB26|macro|CAN_F6R1_FB26
DECL|CAN_F6R1_FB27_Msk|macro|CAN_F6R1_FB27_Msk
DECL|CAN_F6R1_FB27_Pos|macro|CAN_F6R1_FB27_Pos
DECL|CAN_F6R1_FB27|macro|CAN_F6R1_FB27
DECL|CAN_F6R1_FB28_Msk|macro|CAN_F6R1_FB28_Msk
DECL|CAN_F6R1_FB28_Pos|macro|CAN_F6R1_FB28_Pos
DECL|CAN_F6R1_FB28|macro|CAN_F6R1_FB28
DECL|CAN_F6R1_FB29_Msk|macro|CAN_F6R1_FB29_Msk
DECL|CAN_F6R1_FB29_Pos|macro|CAN_F6R1_FB29_Pos
DECL|CAN_F6R1_FB29|macro|CAN_F6R1_FB29
DECL|CAN_F6R1_FB2_Msk|macro|CAN_F6R1_FB2_Msk
DECL|CAN_F6R1_FB2_Pos|macro|CAN_F6R1_FB2_Pos
DECL|CAN_F6R1_FB2|macro|CAN_F6R1_FB2
DECL|CAN_F6R1_FB30_Msk|macro|CAN_F6R1_FB30_Msk
DECL|CAN_F6R1_FB30_Pos|macro|CAN_F6R1_FB30_Pos
DECL|CAN_F6R1_FB30|macro|CAN_F6R1_FB30
DECL|CAN_F6R1_FB31_Msk|macro|CAN_F6R1_FB31_Msk
DECL|CAN_F6R1_FB31_Pos|macro|CAN_F6R1_FB31_Pos
DECL|CAN_F6R1_FB31|macro|CAN_F6R1_FB31
DECL|CAN_F6R1_FB3_Msk|macro|CAN_F6R1_FB3_Msk
DECL|CAN_F6R1_FB3_Pos|macro|CAN_F6R1_FB3_Pos
DECL|CAN_F6R1_FB3|macro|CAN_F6R1_FB3
DECL|CAN_F6R1_FB4_Msk|macro|CAN_F6R1_FB4_Msk
DECL|CAN_F6R1_FB4_Pos|macro|CAN_F6R1_FB4_Pos
DECL|CAN_F6R1_FB4|macro|CAN_F6R1_FB4
DECL|CAN_F6R1_FB5_Msk|macro|CAN_F6R1_FB5_Msk
DECL|CAN_F6R1_FB5_Pos|macro|CAN_F6R1_FB5_Pos
DECL|CAN_F6R1_FB5|macro|CAN_F6R1_FB5
DECL|CAN_F6R1_FB6_Msk|macro|CAN_F6R1_FB6_Msk
DECL|CAN_F6R1_FB6_Pos|macro|CAN_F6R1_FB6_Pos
DECL|CAN_F6R1_FB6|macro|CAN_F6R1_FB6
DECL|CAN_F6R1_FB7_Msk|macro|CAN_F6R1_FB7_Msk
DECL|CAN_F6R1_FB7_Pos|macro|CAN_F6R1_FB7_Pos
DECL|CAN_F6R1_FB7|macro|CAN_F6R1_FB7
DECL|CAN_F6R1_FB8_Msk|macro|CAN_F6R1_FB8_Msk
DECL|CAN_F6R1_FB8_Pos|macro|CAN_F6R1_FB8_Pos
DECL|CAN_F6R1_FB8|macro|CAN_F6R1_FB8
DECL|CAN_F6R1_FB9_Msk|macro|CAN_F6R1_FB9_Msk
DECL|CAN_F6R1_FB9_Pos|macro|CAN_F6R1_FB9_Pos
DECL|CAN_F6R1_FB9|macro|CAN_F6R1_FB9
DECL|CAN_F6R2_FB0_Msk|macro|CAN_F6R2_FB0_Msk
DECL|CAN_F6R2_FB0_Pos|macro|CAN_F6R2_FB0_Pos
DECL|CAN_F6R2_FB0|macro|CAN_F6R2_FB0
DECL|CAN_F6R2_FB10_Msk|macro|CAN_F6R2_FB10_Msk
DECL|CAN_F6R2_FB10_Pos|macro|CAN_F6R2_FB10_Pos
DECL|CAN_F6R2_FB10|macro|CAN_F6R2_FB10
DECL|CAN_F6R2_FB11_Msk|macro|CAN_F6R2_FB11_Msk
DECL|CAN_F6R2_FB11_Pos|macro|CAN_F6R2_FB11_Pos
DECL|CAN_F6R2_FB11|macro|CAN_F6R2_FB11
DECL|CAN_F6R2_FB12_Msk|macro|CAN_F6R2_FB12_Msk
DECL|CAN_F6R2_FB12_Pos|macro|CAN_F6R2_FB12_Pos
DECL|CAN_F6R2_FB12|macro|CAN_F6R2_FB12
DECL|CAN_F6R2_FB13_Msk|macro|CAN_F6R2_FB13_Msk
DECL|CAN_F6R2_FB13_Pos|macro|CAN_F6R2_FB13_Pos
DECL|CAN_F6R2_FB13|macro|CAN_F6R2_FB13
DECL|CAN_F6R2_FB14_Msk|macro|CAN_F6R2_FB14_Msk
DECL|CAN_F6R2_FB14_Pos|macro|CAN_F6R2_FB14_Pos
DECL|CAN_F6R2_FB14|macro|CAN_F6R2_FB14
DECL|CAN_F6R2_FB15_Msk|macro|CAN_F6R2_FB15_Msk
DECL|CAN_F6R2_FB15_Pos|macro|CAN_F6R2_FB15_Pos
DECL|CAN_F6R2_FB15|macro|CAN_F6R2_FB15
DECL|CAN_F6R2_FB16_Msk|macro|CAN_F6R2_FB16_Msk
DECL|CAN_F6R2_FB16_Pos|macro|CAN_F6R2_FB16_Pos
DECL|CAN_F6R2_FB16|macro|CAN_F6R2_FB16
DECL|CAN_F6R2_FB17_Msk|macro|CAN_F6R2_FB17_Msk
DECL|CAN_F6R2_FB17_Pos|macro|CAN_F6R2_FB17_Pos
DECL|CAN_F6R2_FB17|macro|CAN_F6R2_FB17
DECL|CAN_F6R2_FB18_Msk|macro|CAN_F6R2_FB18_Msk
DECL|CAN_F6R2_FB18_Pos|macro|CAN_F6R2_FB18_Pos
DECL|CAN_F6R2_FB18|macro|CAN_F6R2_FB18
DECL|CAN_F6R2_FB19_Msk|macro|CAN_F6R2_FB19_Msk
DECL|CAN_F6R2_FB19_Pos|macro|CAN_F6R2_FB19_Pos
DECL|CAN_F6R2_FB19|macro|CAN_F6R2_FB19
DECL|CAN_F6R2_FB1_Msk|macro|CAN_F6R2_FB1_Msk
DECL|CAN_F6R2_FB1_Pos|macro|CAN_F6R2_FB1_Pos
DECL|CAN_F6R2_FB1|macro|CAN_F6R2_FB1
DECL|CAN_F6R2_FB20_Msk|macro|CAN_F6R2_FB20_Msk
DECL|CAN_F6R2_FB20_Pos|macro|CAN_F6R2_FB20_Pos
DECL|CAN_F6R2_FB20|macro|CAN_F6R2_FB20
DECL|CAN_F6R2_FB21_Msk|macro|CAN_F6R2_FB21_Msk
DECL|CAN_F6R2_FB21_Pos|macro|CAN_F6R2_FB21_Pos
DECL|CAN_F6R2_FB21|macro|CAN_F6R2_FB21
DECL|CAN_F6R2_FB22_Msk|macro|CAN_F6R2_FB22_Msk
DECL|CAN_F6R2_FB22_Pos|macro|CAN_F6R2_FB22_Pos
DECL|CAN_F6R2_FB22|macro|CAN_F6R2_FB22
DECL|CAN_F6R2_FB23_Msk|macro|CAN_F6R2_FB23_Msk
DECL|CAN_F6R2_FB23_Pos|macro|CAN_F6R2_FB23_Pos
DECL|CAN_F6R2_FB23|macro|CAN_F6R2_FB23
DECL|CAN_F6R2_FB24_Msk|macro|CAN_F6R2_FB24_Msk
DECL|CAN_F6R2_FB24_Pos|macro|CAN_F6R2_FB24_Pos
DECL|CAN_F6R2_FB24|macro|CAN_F6R2_FB24
DECL|CAN_F6R2_FB25_Msk|macro|CAN_F6R2_FB25_Msk
DECL|CAN_F6R2_FB25_Pos|macro|CAN_F6R2_FB25_Pos
DECL|CAN_F6R2_FB25|macro|CAN_F6R2_FB25
DECL|CAN_F6R2_FB26_Msk|macro|CAN_F6R2_FB26_Msk
DECL|CAN_F6R2_FB26_Pos|macro|CAN_F6R2_FB26_Pos
DECL|CAN_F6R2_FB26|macro|CAN_F6R2_FB26
DECL|CAN_F6R2_FB27_Msk|macro|CAN_F6R2_FB27_Msk
DECL|CAN_F6R2_FB27_Pos|macro|CAN_F6R2_FB27_Pos
DECL|CAN_F6R2_FB27|macro|CAN_F6R2_FB27
DECL|CAN_F6R2_FB28_Msk|macro|CAN_F6R2_FB28_Msk
DECL|CAN_F6R2_FB28_Pos|macro|CAN_F6R2_FB28_Pos
DECL|CAN_F6R2_FB28|macro|CAN_F6R2_FB28
DECL|CAN_F6R2_FB29_Msk|macro|CAN_F6R2_FB29_Msk
DECL|CAN_F6R2_FB29_Pos|macro|CAN_F6R2_FB29_Pos
DECL|CAN_F6R2_FB29|macro|CAN_F6R2_FB29
DECL|CAN_F6R2_FB2_Msk|macro|CAN_F6R2_FB2_Msk
DECL|CAN_F6R2_FB2_Pos|macro|CAN_F6R2_FB2_Pos
DECL|CAN_F6R2_FB2|macro|CAN_F6R2_FB2
DECL|CAN_F6R2_FB30_Msk|macro|CAN_F6R2_FB30_Msk
DECL|CAN_F6R2_FB30_Pos|macro|CAN_F6R2_FB30_Pos
DECL|CAN_F6R2_FB30|macro|CAN_F6R2_FB30
DECL|CAN_F6R2_FB31_Msk|macro|CAN_F6R2_FB31_Msk
DECL|CAN_F6R2_FB31_Pos|macro|CAN_F6R2_FB31_Pos
DECL|CAN_F6R2_FB31|macro|CAN_F6R2_FB31
DECL|CAN_F6R2_FB3_Msk|macro|CAN_F6R2_FB3_Msk
DECL|CAN_F6R2_FB3_Pos|macro|CAN_F6R2_FB3_Pos
DECL|CAN_F6R2_FB3|macro|CAN_F6R2_FB3
DECL|CAN_F6R2_FB4_Msk|macro|CAN_F6R2_FB4_Msk
DECL|CAN_F6R2_FB4_Pos|macro|CAN_F6R2_FB4_Pos
DECL|CAN_F6R2_FB4|macro|CAN_F6R2_FB4
DECL|CAN_F6R2_FB5_Msk|macro|CAN_F6R2_FB5_Msk
DECL|CAN_F6R2_FB5_Pos|macro|CAN_F6R2_FB5_Pos
DECL|CAN_F6R2_FB5|macro|CAN_F6R2_FB5
DECL|CAN_F6R2_FB6_Msk|macro|CAN_F6R2_FB6_Msk
DECL|CAN_F6R2_FB6_Pos|macro|CAN_F6R2_FB6_Pos
DECL|CAN_F6R2_FB6|macro|CAN_F6R2_FB6
DECL|CAN_F6R2_FB7_Msk|macro|CAN_F6R2_FB7_Msk
DECL|CAN_F6R2_FB7_Pos|macro|CAN_F6R2_FB7_Pos
DECL|CAN_F6R2_FB7|macro|CAN_F6R2_FB7
DECL|CAN_F6R2_FB8_Msk|macro|CAN_F6R2_FB8_Msk
DECL|CAN_F6R2_FB8_Pos|macro|CAN_F6R2_FB8_Pos
DECL|CAN_F6R2_FB8|macro|CAN_F6R2_FB8
DECL|CAN_F6R2_FB9_Msk|macro|CAN_F6R2_FB9_Msk
DECL|CAN_F6R2_FB9_Pos|macro|CAN_F6R2_FB9_Pos
DECL|CAN_F6R2_FB9|macro|CAN_F6R2_FB9
DECL|CAN_F7R1_FB0_Msk|macro|CAN_F7R1_FB0_Msk
DECL|CAN_F7R1_FB0_Pos|macro|CAN_F7R1_FB0_Pos
DECL|CAN_F7R1_FB0|macro|CAN_F7R1_FB0
DECL|CAN_F7R1_FB10_Msk|macro|CAN_F7R1_FB10_Msk
DECL|CAN_F7R1_FB10_Pos|macro|CAN_F7R1_FB10_Pos
DECL|CAN_F7R1_FB10|macro|CAN_F7R1_FB10
DECL|CAN_F7R1_FB11_Msk|macro|CAN_F7R1_FB11_Msk
DECL|CAN_F7R1_FB11_Pos|macro|CAN_F7R1_FB11_Pos
DECL|CAN_F7R1_FB11|macro|CAN_F7R1_FB11
DECL|CAN_F7R1_FB12_Msk|macro|CAN_F7R1_FB12_Msk
DECL|CAN_F7R1_FB12_Pos|macro|CAN_F7R1_FB12_Pos
DECL|CAN_F7R1_FB12|macro|CAN_F7R1_FB12
DECL|CAN_F7R1_FB13_Msk|macro|CAN_F7R1_FB13_Msk
DECL|CAN_F7R1_FB13_Pos|macro|CAN_F7R1_FB13_Pos
DECL|CAN_F7R1_FB13|macro|CAN_F7R1_FB13
DECL|CAN_F7R1_FB14_Msk|macro|CAN_F7R1_FB14_Msk
DECL|CAN_F7R1_FB14_Pos|macro|CAN_F7R1_FB14_Pos
DECL|CAN_F7R1_FB14|macro|CAN_F7R1_FB14
DECL|CAN_F7R1_FB15_Msk|macro|CAN_F7R1_FB15_Msk
DECL|CAN_F7R1_FB15_Pos|macro|CAN_F7R1_FB15_Pos
DECL|CAN_F7R1_FB15|macro|CAN_F7R1_FB15
DECL|CAN_F7R1_FB16_Msk|macro|CAN_F7R1_FB16_Msk
DECL|CAN_F7R1_FB16_Pos|macro|CAN_F7R1_FB16_Pos
DECL|CAN_F7R1_FB16|macro|CAN_F7R1_FB16
DECL|CAN_F7R1_FB17_Msk|macro|CAN_F7R1_FB17_Msk
DECL|CAN_F7R1_FB17_Pos|macro|CAN_F7R1_FB17_Pos
DECL|CAN_F7R1_FB17|macro|CAN_F7R1_FB17
DECL|CAN_F7R1_FB18_Msk|macro|CAN_F7R1_FB18_Msk
DECL|CAN_F7R1_FB18_Pos|macro|CAN_F7R1_FB18_Pos
DECL|CAN_F7R1_FB18|macro|CAN_F7R1_FB18
DECL|CAN_F7R1_FB19_Msk|macro|CAN_F7R1_FB19_Msk
DECL|CAN_F7R1_FB19_Pos|macro|CAN_F7R1_FB19_Pos
DECL|CAN_F7R1_FB19|macro|CAN_F7R1_FB19
DECL|CAN_F7R1_FB1_Msk|macro|CAN_F7R1_FB1_Msk
DECL|CAN_F7R1_FB1_Pos|macro|CAN_F7R1_FB1_Pos
DECL|CAN_F7R1_FB1|macro|CAN_F7R1_FB1
DECL|CAN_F7R1_FB20_Msk|macro|CAN_F7R1_FB20_Msk
DECL|CAN_F7R1_FB20_Pos|macro|CAN_F7R1_FB20_Pos
DECL|CAN_F7R1_FB20|macro|CAN_F7R1_FB20
DECL|CAN_F7R1_FB21_Msk|macro|CAN_F7R1_FB21_Msk
DECL|CAN_F7R1_FB21_Pos|macro|CAN_F7R1_FB21_Pos
DECL|CAN_F7R1_FB21|macro|CAN_F7R1_FB21
DECL|CAN_F7R1_FB22_Msk|macro|CAN_F7R1_FB22_Msk
DECL|CAN_F7R1_FB22_Pos|macro|CAN_F7R1_FB22_Pos
DECL|CAN_F7R1_FB22|macro|CAN_F7R1_FB22
DECL|CAN_F7R1_FB23_Msk|macro|CAN_F7R1_FB23_Msk
DECL|CAN_F7R1_FB23_Pos|macro|CAN_F7R1_FB23_Pos
DECL|CAN_F7R1_FB23|macro|CAN_F7R1_FB23
DECL|CAN_F7R1_FB24_Msk|macro|CAN_F7R1_FB24_Msk
DECL|CAN_F7R1_FB24_Pos|macro|CAN_F7R1_FB24_Pos
DECL|CAN_F7R1_FB24|macro|CAN_F7R1_FB24
DECL|CAN_F7R1_FB25_Msk|macro|CAN_F7R1_FB25_Msk
DECL|CAN_F7R1_FB25_Pos|macro|CAN_F7R1_FB25_Pos
DECL|CAN_F7R1_FB25|macro|CAN_F7R1_FB25
DECL|CAN_F7R1_FB26_Msk|macro|CAN_F7R1_FB26_Msk
DECL|CAN_F7R1_FB26_Pos|macro|CAN_F7R1_FB26_Pos
DECL|CAN_F7R1_FB26|macro|CAN_F7R1_FB26
DECL|CAN_F7R1_FB27_Msk|macro|CAN_F7R1_FB27_Msk
DECL|CAN_F7R1_FB27_Pos|macro|CAN_F7R1_FB27_Pos
DECL|CAN_F7R1_FB27|macro|CAN_F7R1_FB27
DECL|CAN_F7R1_FB28_Msk|macro|CAN_F7R1_FB28_Msk
DECL|CAN_F7R1_FB28_Pos|macro|CAN_F7R1_FB28_Pos
DECL|CAN_F7R1_FB28|macro|CAN_F7R1_FB28
DECL|CAN_F7R1_FB29_Msk|macro|CAN_F7R1_FB29_Msk
DECL|CAN_F7R1_FB29_Pos|macro|CAN_F7R1_FB29_Pos
DECL|CAN_F7R1_FB29|macro|CAN_F7R1_FB29
DECL|CAN_F7R1_FB2_Msk|macro|CAN_F7R1_FB2_Msk
DECL|CAN_F7R1_FB2_Pos|macro|CAN_F7R1_FB2_Pos
DECL|CAN_F7R1_FB2|macro|CAN_F7R1_FB2
DECL|CAN_F7R1_FB30_Msk|macro|CAN_F7R1_FB30_Msk
DECL|CAN_F7R1_FB30_Pos|macro|CAN_F7R1_FB30_Pos
DECL|CAN_F7R1_FB30|macro|CAN_F7R1_FB30
DECL|CAN_F7R1_FB31_Msk|macro|CAN_F7R1_FB31_Msk
DECL|CAN_F7R1_FB31_Pos|macro|CAN_F7R1_FB31_Pos
DECL|CAN_F7R1_FB31|macro|CAN_F7R1_FB31
DECL|CAN_F7R1_FB3_Msk|macro|CAN_F7R1_FB3_Msk
DECL|CAN_F7R1_FB3_Pos|macro|CAN_F7R1_FB3_Pos
DECL|CAN_F7R1_FB3|macro|CAN_F7R1_FB3
DECL|CAN_F7R1_FB4_Msk|macro|CAN_F7R1_FB4_Msk
DECL|CAN_F7R1_FB4_Pos|macro|CAN_F7R1_FB4_Pos
DECL|CAN_F7R1_FB4|macro|CAN_F7R1_FB4
DECL|CAN_F7R1_FB5_Msk|macro|CAN_F7R1_FB5_Msk
DECL|CAN_F7R1_FB5_Pos|macro|CAN_F7R1_FB5_Pos
DECL|CAN_F7R1_FB5|macro|CAN_F7R1_FB5
DECL|CAN_F7R1_FB6_Msk|macro|CAN_F7R1_FB6_Msk
DECL|CAN_F7R1_FB6_Pos|macro|CAN_F7R1_FB6_Pos
DECL|CAN_F7R1_FB6|macro|CAN_F7R1_FB6
DECL|CAN_F7R1_FB7_Msk|macro|CAN_F7R1_FB7_Msk
DECL|CAN_F7R1_FB7_Pos|macro|CAN_F7R1_FB7_Pos
DECL|CAN_F7R1_FB7|macro|CAN_F7R1_FB7
DECL|CAN_F7R1_FB8_Msk|macro|CAN_F7R1_FB8_Msk
DECL|CAN_F7R1_FB8_Pos|macro|CAN_F7R1_FB8_Pos
DECL|CAN_F7R1_FB8|macro|CAN_F7R1_FB8
DECL|CAN_F7R1_FB9_Msk|macro|CAN_F7R1_FB9_Msk
DECL|CAN_F7R1_FB9_Pos|macro|CAN_F7R1_FB9_Pos
DECL|CAN_F7R1_FB9|macro|CAN_F7R1_FB9
DECL|CAN_F7R2_FB0_Msk|macro|CAN_F7R2_FB0_Msk
DECL|CAN_F7R2_FB0_Pos|macro|CAN_F7R2_FB0_Pos
DECL|CAN_F7R2_FB0|macro|CAN_F7R2_FB0
DECL|CAN_F7R2_FB10_Msk|macro|CAN_F7R2_FB10_Msk
DECL|CAN_F7R2_FB10_Pos|macro|CAN_F7R2_FB10_Pos
DECL|CAN_F7R2_FB10|macro|CAN_F7R2_FB10
DECL|CAN_F7R2_FB11_Msk|macro|CAN_F7R2_FB11_Msk
DECL|CAN_F7R2_FB11_Pos|macro|CAN_F7R2_FB11_Pos
DECL|CAN_F7R2_FB11|macro|CAN_F7R2_FB11
DECL|CAN_F7R2_FB12_Msk|macro|CAN_F7R2_FB12_Msk
DECL|CAN_F7R2_FB12_Pos|macro|CAN_F7R2_FB12_Pos
DECL|CAN_F7R2_FB12|macro|CAN_F7R2_FB12
DECL|CAN_F7R2_FB13_Msk|macro|CAN_F7R2_FB13_Msk
DECL|CAN_F7R2_FB13_Pos|macro|CAN_F7R2_FB13_Pos
DECL|CAN_F7R2_FB13|macro|CAN_F7R2_FB13
DECL|CAN_F7R2_FB14_Msk|macro|CAN_F7R2_FB14_Msk
DECL|CAN_F7R2_FB14_Pos|macro|CAN_F7R2_FB14_Pos
DECL|CAN_F7R2_FB14|macro|CAN_F7R2_FB14
DECL|CAN_F7R2_FB15_Msk|macro|CAN_F7R2_FB15_Msk
DECL|CAN_F7R2_FB15_Pos|macro|CAN_F7R2_FB15_Pos
DECL|CAN_F7R2_FB15|macro|CAN_F7R2_FB15
DECL|CAN_F7R2_FB16_Msk|macro|CAN_F7R2_FB16_Msk
DECL|CAN_F7R2_FB16_Pos|macro|CAN_F7R2_FB16_Pos
DECL|CAN_F7R2_FB16|macro|CAN_F7R2_FB16
DECL|CAN_F7R2_FB17_Msk|macro|CAN_F7R2_FB17_Msk
DECL|CAN_F7R2_FB17_Pos|macro|CAN_F7R2_FB17_Pos
DECL|CAN_F7R2_FB17|macro|CAN_F7R2_FB17
DECL|CAN_F7R2_FB18_Msk|macro|CAN_F7R2_FB18_Msk
DECL|CAN_F7R2_FB18_Pos|macro|CAN_F7R2_FB18_Pos
DECL|CAN_F7R2_FB18|macro|CAN_F7R2_FB18
DECL|CAN_F7R2_FB19_Msk|macro|CAN_F7R2_FB19_Msk
DECL|CAN_F7R2_FB19_Pos|macro|CAN_F7R2_FB19_Pos
DECL|CAN_F7R2_FB19|macro|CAN_F7R2_FB19
DECL|CAN_F7R2_FB1_Msk|macro|CAN_F7R2_FB1_Msk
DECL|CAN_F7R2_FB1_Pos|macro|CAN_F7R2_FB1_Pos
DECL|CAN_F7R2_FB1|macro|CAN_F7R2_FB1
DECL|CAN_F7R2_FB20_Msk|macro|CAN_F7R2_FB20_Msk
DECL|CAN_F7R2_FB20_Pos|macro|CAN_F7R2_FB20_Pos
DECL|CAN_F7R2_FB20|macro|CAN_F7R2_FB20
DECL|CAN_F7R2_FB21_Msk|macro|CAN_F7R2_FB21_Msk
DECL|CAN_F7R2_FB21_Pos|macro|CAN_F7R2_FB21_Pos
DECL|CAN_F7R2_FB21|macro|CAN_F7R2_FB21
DECL|CAN_F7R2_FB22_Msk|macro|CAN_F7R2_FB22_Msk
DECL|CAN_F7R2_FB22_Pos|macro|CAN_F7R2_FB22_Pos
DECL|CAN_F7R2_FB22|macro|CAN_F7R2_FB22
DECL|CAN_F7R2_FB23_Msk|macro|CAN_F7R2_FB23_Msk
DECL|CAN_F7R2_FB23_Pos|macro|CAN_F7R2_FB23_Pos
DECL|CAN_F7R2_FB23|macro|CAN_F7R2_FB23
DECL|CAN_F7R2_FB24_Msk|macro|CAN_F7R2_FB24_Msk
DECL|CAN_F7R2_FB24_Pos|macro|CAN_F7R2_FB24_Pos
DECL|CAN_F7R2_FB24|macro|CAN_F7R2_FB24
DECL|CAN_F7R2_FB25_Msk|macro|CAN_F7R2_FB25_Msk
DECL|CAN_F7R2_FB25_Pos|macro|CAN_F7R2_FB25_Pos
DECL|CAN_F7R2_FB25|macro|CAN_F7R2_FB25
DECL|CAN_F7R2_FB26_Msk|macro|CAN_F7R2_FB26_Msk
DECL|CAN_F7R2_FB26_Pos|macro|CAN_F7R2_FB26_Pos
DECL|CAN_F7R2_FB26|macro|CAN_F7R2_FB26
DECL|CAN_F7R2_FB27_Msk|macro|CAN_F7R2_FB27_Msk
DECL|CAN_F7R2_FB27_Pos|macro|CAN_F7R2_FB27_Pos
DECL|CAN_F7R2_FB27|macro|CAN_F7R2_FB27
DECL|CAN_F7R2_FB28_Msk|macro|CAN_F7R2_FB28_Msk
DECL|CAN_F7R2_FB28_Pos|macro|CAN_F7R2_FB28_Pos
DECL|CAN_F7R2_FB28|macro|CAN_F7R2_FB28
DECL|CAN_F7R2_FB29_Msk|macro|CAN_F7R2_FB29_Msk
DECL|CAN_F7R2_FB29_Pos|macro|CAN_F7R2_FB29_Pos
DECL|CAN_F7R2_FB29|macro|CAN_F7R2_FB29
DECL|CAN_F7R2_FB2_Msk|macro|CAN_F7R2_FB2_Msk
DECL|CAN_F7R2_FB2_Pos|macro|CAN_F7R2_FB2_Pos
DECL|CAN_F7R2_FB2|macro|CAN_F7R2_FB2
DECL|CAN_F7R2_FB30_Msk|macro|CAN_F7R2_FB30_Msk
DECL|CAN_F7R2_FB30_Pos|macro|CAN_F7R2_FB30_Pos
DECL|CAN_F7R2_FB30|macro|CAN_F7R2_FB30
DECL|CAN_F7R2_FB31_Msk|macro|CAN_F7R2_FB31_Msk
DECL|CAN_F7R2_FB31_Pos|macro|CAN_F7R2_FB31_Pos
DECL|CAN_F7R2_FB31|macro|CAN_F7R2_FB31
DECL|CAN_F7R2_FB3_Msk|macro|CAN_F7R2_FB3_Msk
DECL|CAN_F7R2_FB3_Pos|macro|CAN_F7R2_FB3_Pos
DECL|CAN_F7R2_FB3|macro|CAN_F7R2_FB3
DECL|CAN_F7R2_FB4_Msk|macro|CAN_F7R2_FB4_Msk
DECL|CAN_F7R2_FB4_Pos|macro|CAN_F7R2_FB4_Pos
DECL|CAN_F7R2_FB4|macro|CAN_F7R2_FB4
DECL|CAN_F7R2_FB5_Msk|macro|CAN_F7R2_FB5_Msk
DECL|CAN_F7R2_FB5_Pos|macro|CAN_F7R2_FB5_Pos
DECL|CAN_F7R2_FB5|macro|CAN_F7R2_FB5
DECL|CAN_F7R2_FB6_Msk|macro|CAN_F7R2_FB6_Msk
DECL|CAN_F7R2_FB6_Pos|macro|CAN_F7R2_FB6_Pos
DECL|CAN_F7R2_FB6|macro|CAN_F7R2_FB6
DECL|CAN_F7R2_FB7_Msk|macro|CAN_F7R2_FB7_Msk
DECL|CAN_F7R2_FB7_Pos|macro|CAN_F7R2_FB7_Pos
DECL|CAN_F7R2_FB7|macro|CAN_F7R2_FB7
DECL|CAN_F7R2_FB8_Msk|macro|CAN_F7R2_FB8_Msk
DECL|CAN_F7R2_FB8_Pos|macro|CAN_F7R2_FB8_Pos
DECL|CAN_F7R2_FB8|macro|CAN_F7R2_FB8
DECL|CAN_F7R2_FB9_Msk|macro|CAN_F7R2_FB9_Msk
DECL|CAN_F7R2_FB9_Pos|macro|CAN_F7R2_FB9_Pos
DECL|CAN_F7R2_FB9|macro|CAN_F7R2_FB9
DECL|CAN_F8R1_FB0_Msk|macro|CAN_F8R1_FB0_Msk
DECL|CAN_F8R1_FB0_Pos|macro|CAN_F8R1_FB0_Pos
DECL|CAN_F8R1_FB0|macro|CAN_F8R1_FB0
DECL|CAN_F8R1_FB10_Msk|macro|CAN_F8R1_FB10_Msk
DECL|CAN_F8R1_FB10_Pos|macro|CAN_F8R1_FB10_Pos
DECL|CAN_F8R1_FB10|macro|CAN_F8R1_FB10
DECL|CAN_F8R1_FB11_Msk|macro|CAN_F8R1_FB11_Msk
DECL|CAN_F8R1_FB11_Pos|macro|CAN_F8R1_FB11_Pos
DECL|CAN_F8R1_FB11|macro|CAN_F8R1_FB11
DECL|CAN_F8R1_FB12_Msk|macro|CAN_F8R1_FB12_Msk
DECL|CAN_F8R1_FB12_Pos|macro|CAN_F8R1_FB12_Pos
DECL|CAN_F8R1_FB12|macro|CAN_F8R1_FB12
DECL|CAN_F8R1_FB13_Msk|macro|CAN_F8R1_FB13_Msk
DECL|CAN_F8R1_FB13_Pos|macro|CAN_F8R1_FB13_Pos
DECL|CAN_F8R1_FB13|macro|CAN_F8R1_FB13
DECL|CAN_F8R1_FB14_Msk|macro|CAN_F8R1_FB14_Msk
DECL|CAN_F8R1_FB14_Pos|macro|CAN_F8R1_FB14_Pos
DECL|CAN_F8R1_FB14|macro|CAN_F8R1_FB14
DECL|CAN_F8R1_FB15_Msk|macro|CAN_F8R1_FB15_Msk
DECL|CAN_F8R1_FB15_Pos|macro|CAN_F8R1_FB15_Pos
DECL|CAN_F8R1_FB15|macro|CAN_F8R1_FB15
DECL|CAN_F8R1_FB16_Msk|macro|CAN_F8R1_FB16_Msk
DECL|CAN_F8R1_FB16_Pos|macro|CAN_F8R1_FB16_Pos
DECL|CAN_F8R1_FB16|macro|CAN_F8R1_FB16
DECL|CAN_F8R1_FB17_Msk|macro|CAN_F8R1_FB17_Msk
DECL|CAN_F8R1_FB17_Pos|macro|CAN_F8R1_FB17_Pos
DECL|CAN_F8R1_FB17|macro|CAN_F8R1_FB17
DECL|CAN_F8R1_FB18_Msk|macro|CAN_F8R1_FB18_Msk
DECL|CAN_F8R1_FB18_Pos|macro|CAN_F8R1_FB18_Pos
DECL|CAN_F8R1_FB18|macro|CAN_F8R1_FB18
DECL|CAN_F8R1_FB19_Msk|macro|CAN_F8R1_FB19_Msk
DECL|CAN_F8R1_FB19_Pos|macro|CAN_F8R1_FB19_Pos
DECL|CAN_F8R1_FB19|macro|CAN_F8R1_FB19
DECL|CAN_F8R1_FB1_Msk|macro|CAN_F8R1_FB1_Msk
DECL|CAN_F8R1_FB1_Pos|macro|CAN_F8R1_FB1_Pos
DECL|CAN_F8R1_FB1|macro|CAN_F8R1_FB1
DECL|CAN_F8R1_FB20_Msk|macro|CAN_F8R1_FB20_Msk
DECL|CAN_F8R1_FB20_Pos|macro|CAN_F8R1_FB20_Pos
DECL|CAN_F8R1_FB20|macro|CAN_F8R1_FB20
DECL|CAN_F8R1_FB21_Msk|macro|CAN_F8R1_FB21_Msk
DECL|CAN_F8R1_FB21_Pos|macro|CAN_F8R1_FB21_Pos
DECL|CAN_F8R1_FB21|macro|CAN_F8R1_FB21
DECL|CAN_F8R1_FB22_Msk|macro|CAN_F8R1_FB22_Msk
DECL|CAN_F8R1_FB22_Pos|macro|CAN_F8R1_FB22_Pos
DECL|CAN_F8R1_FB22|macro|CAN_F8R1_FB22
DECL|CAN_F8R1_FB23_Msk|macro|CAN_F8R1_FB23_Msk
DECL|CAN_F8R1_FB23_Pos|macro|CAN_F8R1_FB23_Pos
DECL|CAN_F8R1_FB23|macro|CAN_F8R1_FB23
DECL|CAN_F8R1_FB24_Msk|macro|CAN_F8R1_FB24_Msk
DECL|CAN_F8R1_FB24_Pos|macro|CAN_F8R1_FB24_Pos
DECL|CAN_F8R1_FB24|macro|CAN_F8R1_FB24
DECL|CAN_F8R1_FB25_Msk|macro|CAN_F8R1_FB25_Msk
DECL|CAN_F8R1_FB25_Pos|macro|CAN_F8R1_FB25_Pos
DECL|CAN_F8R1_FB25|macro|CAN_F8R1_FB25
DECL|CAN_F8R1_FB26_Msk|macro|CAN_F8R1_FB26_Msk
DECL|CAN_F8R1_FB26_Pos|macro|CAN_F8R1_FB26_Pos
DECL|CAN_F8R1_FB26|macro|CAN_F8R1_FB26
DECL|CAN_F8R1_FB27_Msk|macro|CAN_F8R1_FB27_Msk
DECL|CAN_F8R1_FB27_Pos|macro|CAN_F8R1_FB27_Pos
DECL|CAN_F8R1_FB27|macro|CAN_F8R1_FB27
DECL|CAN_F8R1_FB28_Msk|macro|CAN_F8R1_FB28_Msk
DECL|CAN_F8R1_FB28_Pos|macro|CAN_F8R1_FB28_Pos
DECL|CAN_F8R1_FB28|macro|CAN_F8R1_FB28
DECL|CAN_F8R1_FB29_Msk|macro|CAN_F8R1_FB29_Msk
DECL|CAN_F8R1_FB29_Pos|macro|CAN_F8R1_FB29_Pos
DECL|CAN_F8R1_FB29|macro|CAN_F8R1_FB29
DECL|CAN_F8R1_FB2_Msk|macro|CAN_F8R1_FB2_Msk
DECL|CAN_F8R1_FB2_Pos|macro|CAN_F8R1_FB2_Pos
DECL|CAN_F8R1_FB2|macro|CAN_F8R1_FB2
DECL|CAN_F8R1_FB30_Msk|macro|CAN_F8R1_FB30_Msk
DECL|CAN_F8R1_FB30_Pos|macro|CAN_F8R1_FB30_Pos
DECL|CAN_F8R1_FB30|macro|CAN_F8R1_FB30
DECL|CAN_F8R1_FB31_Msk|macro|CAN_F8R1_FB31_Msk
DECL|CAN_F8R1_FB31_Pos|macro|CAN_F8R1_FB31_Pos
DECL|CAN_F8R1_FB31|macro|CAN_F8R1_FB31
DECL|CAN_F8R1_FB3_Msk|macro|CAN_F8R1_FB3_Msk
DECL|CAN_F8R1_FB3_Pos|macro|CAN_F8R1_FB3_Pos
DECL|CAN_F8R1_FB3|macro|CAN_F8R1_FB3
DECL|CAN_F8R1_FB4_Msk|macro|CAN_F8R1_FB4_Msk
DECL|CAN_F8R1_FB4_Pos|macro|CAN_F8R1_FB4_Pos
DECL|CAN_F8R1_FB4|macro|CAN_F8R1_FB4
DECL|CAN_F8R1_FB5_Msk|macro|CAN_F8R1_FB5_Msk
DECL|CAN_F8R1_FB5_Pos|macro|CAN_F8R1_FB5_Pos
DECL|CAN_F8R1_FB5|macro|CAN_F8R1_FB5
DECL|CAN_F8R1_FB6_Msk|macro|CAN_F8R1_FB6_Msk
DECL|CAN_F8R1_FB6_Pos|macro|CAN_F8R1_FB6_Pos
DECL|CAN_F8R1_FB6|macro|CAN_F8R1_FB6
DECL|CAN_F8R1_FB7_Msk|macro|CAN_F8R1_FB7_Msk
DECL|CAN_F8R1_FB7_Pos|macro|CAN_F8R1_FB7_Pos
DECL|CAN_F8R1_FB7|macro|CAN_F8R1_FB7
DECL|CAN_F8R1_FB8_Msk|macro|CAN_F8R1_FB8_Msk
DECL|CAN_F8R1_FB8_Pos|macro|CAN_F8R1_FB8_Pos
DECL|CAN_F8R1_FB8|macro|CAN_F8R1_FB8
DECL|CAN_F8R1_FB9_Msk|macro|CAN_F8R1_FB9_Msk
DECL|CAN_F8R1_FB9_Pos|macro|CAN_F8R1_FB9_Pos
DECL|CAN_F8R1_FB9|macro|CAN_F8R1_FB9
DECL|CAN_F8R2_FB0_Msk|macro|CAN_F8R2_FB0_Msk
DECL|CAN_F8R2_FB0_Pos|macro|CAN_F8R2_FB0_Pos
DECL|CAN_F8R2_FB0|macro|CAN_F8R2_FB0
DECL|CAN_F8R2_FB10_Msk|macro|CAN_F8R2_FB10_Msk
DECL|CAN_F8R2_FB10_Pos|macro|CAN_F8R2_FB10_Pos
DECL|CAN_F8R2_FB10|macro|CAN_F8R2_FB10
DECL|CAN_F8R2_FB11_Msk|macro|CAN_F8R2_FB11_Msk
DECL|CAN_F8R2_FB11_Pos|macro|CAN_F8R2_FB11_Pos
DECL|CAN_F8R2_FB11|macro|CAN_F8R2_FB11
DECL|CAN_F8R2_FB12_Msk|macro|CAN_F8R2_FB12_Msk
DECL|CAN_F8R2_FB12_Pos|macro|CAN_F8R2_FB12_Pos
DECL|CAN_F8R2_FB12|macro|CAN_F8R2_FB12
DECL|CAN_F8R2_FB13_Msk|macro|CAN_F8R2_FB13_Msk
DECL|CAN_F8R2_FB13_Pos|macro|CAN_F8R2_FB13_Pos
DECL|CAN_F8R2_FB13|macro|CAN_F8R2_FB13
DECL|CAN_F8R2_FB14_Msk|macro|CAN_F8R2_FB14_Msk
DECL|CAN_F8R2_FB14_Pos|macro|CAN_F8R2_FB14_Pos
DECL|CAN_F8R2_FB14|macro|CAN_F8R2_FB14
DECL|CAN_F8R2_FB15_Msk|macro|CAN_F8R2_FB15_Msk
DECL|CAN_F8R2_FB15_Pos|macro|CAN_F8R2_FB15_Pos
DECL|CAN_F8R2_FB15|macro|CAN_F8R2_FB15
DECL|CAN_F8R2_FB16_Msk|macro|CAN_F8R2_FB16_Msk
DECL|CAN_F8R2_FB16_Pos|macro|CAN_F8R2_FB16_Pos
DECL|CAN_F8R2_FB16|macro|CAN_F8R2_FB16
DECL|CAN_F8R2_FB17_Msk|macro|CAN_F8R2_FB17_Msk
DECL|CAN_F8R2_FB17_Pos|macro|CAN_F8R2_FB17_Pos
DECL|CAN_F8R2_FB17|macro|CAN_F8R2_FB17
DECL|CAN_F8R2_FB18_Msk|macro|CAN_F8R2_FB18_Msk
DECL|CAN_F8R2_FB18_Pos|macro|CAN_F8R2_FB18_Pos
DECL|CAN_F8R2_FB18|macro|CAN_F8R2_FB18
DECL|CAN_F8R2_FB19_Msk|macro|CAN_F8R2_FB19_Msk
DECL|CAN_F8R2_FB19_Pos|macro|CAN_F8R2_FB19_Pos
DECL|CAN_F8R2_FB19|macro|CAN_F8R2_FB19
DECL|CAN_F8R2_FB1_Msk|macro|CAN_F8R2_FB1_Msk
DECL|CAN_F8R2_FB1_Pos|macro|CAN_F8R2_FB1_Pos
DECL|CAN_F8R2_FB1|macro|CAN_F8R2_FB1
DECL|CAN_F8R2_FB20_Msk|macro|CAN_F8R2_FB20_Msk
DECL|CAN_F8R2_FB20_Pos|macro|CAN_F8R2_FB20_Pos
DECL|CAN_F8R2_FB20|macro|CAN_F8R2_FB20
DECL|CAN_F8R2_FB21_Msk|macro|CAN_F8R2_FB21_Msk
DECL|CAN_F8R2_FB21_Pos|macro|CAN_F8R2_FB21_Pos
DECL|CAN_F8R2_FB21|macro|CAN_F8R2_FB21
DECL|CAN_F8R2_FB22_Msk|macro|CAN_F8R2_FB22_Msk
DECL|CAN_F8R2_FB22_Pos|macro|CAN_F8R2_FB22_Pos
DECL|CAN_F8R2_FB22|macro|CAN_F8R2_FB22
DECL|CAN_F8R2_FB23_Msk|macro|CAN_F8R2_FB23_Msk
DECL|CAN_F8R2_FB23_Pos|macro|CAN_F8R2_FB23_Pos
DECL|CAN_F8R2_FB23|macro|CAN_F8R2_FB23
DECL|CAN_F8R2_FB24_Msk|macro|CAN_F8R2_FB24_Msk
DECL|CAN_F8R2_FB24_Pos|macro|CAN_F8R2_FB24_Pos
DECL|CAN_F8R2_FB24|macro|CAN_F8R2_FB24
DECL|CAN_F8R2_FB25_Msk|macro|CAN_F8R2_FB25_Msk
DECL|CAN_F8R2_FB25_Pos|macro|CAN_F8R2_FB25_Pos
DECL|CAN_F8R2_FB25|macro|CAN_F8R2_FB25
DECL|CAN_F8R2_FB26_Msk|macro|CAN_F8R2_FB26_Msk
DECL|CAN_F8R2_FB26_Pos|macro|CAN_F8R2_FB26_Pos
DECL|CAN_F8R2_FB26|macro|CAN_F8R2_FB26
DECL|CAN_F8R2_FB27_Msk|macro|CAN_F8R2_FB27_Msk
DECL|CAN_F8R2_FB27_Pos|macro|CAN_F8R2_FB27_Pos
DECL|CAN_F8R2_FB27|macro|CAN_F8R2_FB27
DECL|CAN_F8R2_FB28_Msk|macro|CAN_F8R2_FB28_Msk
DECL|CAN_F8R2_FB28_Pos|macro|CAN_F8R2_FB28_Pos
DECL|CAN_F8R2_FB28|macro|CAN_F8R2_FB28
DECL|CAN_F8R2_FB29_Msk|macro|CAN_F8R2_FB29_Msk
DECL|CAN_F8R2_FB29_Pos|macro|CAN_F8R2_FB29_Pos
DECL|CAN_F8R2_FB29|macro|CAN_F8R2_FB29
DECL|CAN_F8R2_FB2_Msk|macro|CAN_F8R2_FB2_Msk
DECL|CAN_F8R2_FB2_Pos|macro|CAN_F8R2_FB2_Pos
DECL|CAN_F8R2_FB2|macro|CAN_F8R2_FB2
DECL|CAN_F8R2_FB30_Msk|macro|CAN_F8R2_FB30_Msk
DECL|CAN_F8R2_FB30_Pos|macro|CAN_F8R2_FB30_Pos
DECL|CAN_F8R2_FB30|macro|CAN_F8R2_FB30
DECL|CAN_F8R2_FB31_Msk|macro|CAN_F8R2_FB31_Msk
DECL|CAN_F8R2_FB31_Pos|macro|CAN_F8R2_FB31_Pos
DECL|CAN_F8R2_FB31|macro|CAN_F8R2_FB31
DECL|CAN_F8R2_FB3_Msk|macro|CAN_F8R2_FB3_Msk
DECL|CAN_F8R2_FB3_Pos|macro|CAN_F8R2_FB3_Pos
DECL|CAN_F8R2_FB3|macro|CAN_F8R2_FB3
DECL|CAN_F8R2_FB4_Msk|macro|CAN_F8R2_FB4_Msk
DECL|CAN_F8R2_FB4_Pos|macro|CAN_F8R2_FB4_Pos
DECL|CAN_F8R2_FB4|macro|CAN_F8R2_FB4
DECL|CAN_F8R2_FB5_Msk|macro|CAN_F8R2_FB5_Msk
DECL|CAN_F8R2_FB5_Pos|macro|CAN_F8R2_FB5_Pos
DECL|CAN_F8R2_FB5|macro|CAN_F8R2_FB5
DECL|CAN_F8R2_FB6_Msk|macro|CAN_F8R2_FB6_Msk
DECL|CAN_F8R2_FB6_Pos|macro|CAN_F8R2_FB6_Pos
DECL|CAN_F8R2_FB6|macro|CAN_F8R2_FB6
DECL|CAN_F8R2_FB7_Msk|macro|CAN_F8R2_FB7_Msk
DECL|CAN_F8R2_FB7_Pos|macro|CAN_F8R2_FB7_Pos
DECL|CAN_F8R2_FB7|macro|CAN_F8R2_FB7
DECL|CAN_F8R2_FB8_Msk|macro|CAN_F8R2_FB8_Msk
DECL|CAN_F8R2_FB8_Pos|macro|CAN_F8R2_FB8_Pos
DECL|CAN_F8R2_FB8|macro|CAN_F8R2_FB8
DECL|CAN_F8R2_FB9_Msk|macro|CAN_F8R2_FB9_Msk
DECL|CAN_F8R2_FB9_Pos|macro|CAN_F8R2_FB9_Pos
DECL|CAN_F8R2_FB9|macro|CAN_F8R2_FB9
DECL|CAN_F9R1_FB0_Msk|macro|CAN_F9R1_FB0_Msk
DECL|CAN_F9R1_FB0_Pos|macro|CAN_F9R1_FB0_Pos
DECL|CAN_F9R1_FB0|macro|CAN_F9R1_FB0
DECL|CAN_F9R1_FB10_Msk|macro|CAN_F9R1_FB10_Msk
DECL|CAN_F9R1_FB10_Pos|macro|CAN_F9R1_FB10_Pos
DECL|CAN_F9R1_FB10|macro|CAN_F9R1_FB10
DECL|CAN_F9R1_FB11_Msk|macro|CAN_F9R1_FB11_Msk
DECL|CAN_F9R1_FB11_Pos|macro|CAN_F9R1_FB11_Pos
DECL|CAN_F9R1_FB11|macro|CAN_F9R1_FB11
DECL|CAN_F9R1_FB12_Msk|macro|CAN_F9R1_FB12_Msk
DECL|CAN_F9R1_FB12_Pos|macro|CAN_F9R1_FB12_Pos
DECL|CAN_F9R1_FB12|macro|CAN_F9R1_FB12
DECL|CAN_F9R1_FB13_Msk|macro|CAN_F9R1_FB13_Msk
DECL|CAN_F9R1_FB13_Pos|macro|CAN_F9R1_FB13_Pos
DECL|CAN_F9R1_FB13|macro|CAN_F9R1_FB13
DECL|CAN_F9R1_FB14_Msk|macro|CAN_F9R1_FB14_Msk
DECL|CAN_F9R1_FB14_Pos|macro|CAN_F9R1_FB14_Pos
DECL|CAN_F9R1_FB14|macro|CAN_F9R1_FB14
DECL|CAN_F9R1_FB15_Msk|macro|CAN_F9R1_FB15_Msk
DECL|CAN_F9R1_FB15_Pos|macro|CAN_F9R1_FB15_Pos
DECL|CAN_F9R1_FB15|macro|CAN_F9R1_FB15
DECL|CAN_F9R1_FB16_Msk|macro|CAN_F9R1_FB16_Msk
DECL|CAN_F9R1_FB16_Pos|macro|CAN_F9R1_FB16_Pos
DECL|CAN_F9R1_FB16|macro|CAN_F9R1_FB16
DECL|CAN_F9R1_FB17_Msk|macro|CAN_F9R1_FB17_Msk
DECL|CAN_F9R1_FB17_Pos|macro|CAN_F9R1_FB17_Pos
DECL|CAN_F9R1_FB17|macro|CAN_F9R1_FB17
DECL|CAN_F9R1_FB18_Msk|macro|CAN_F9R1_FB18_Msk
DECL|CAN_F9R1_FB18_Pos|macro|CAN_F9R1_FB18_Pos
DECL|CAN_F9R1_FB18|macro|CAN_F9R1_FB18
DECL|CAN_F9R1_FB19_Msk|macro|CAN_F9R1_FB19_Msk
DECL|CAN_F9R1_FB19_Pos|macro|CAN_F9R1_FB19_Pos
DECL|CAN_F9R1_FB19|macro|CAN_F9R1_FB19
DECL|CAN_F9R1_FB1_Msk|macro|CAN_F9R1_FB1_Msk
DECL|CAN_F9R1_FB1_Pos|macro|CAN_F9R1_FB1_Pos
DECL|CAN_F9R1_FB1|macro|CAN_F9R1_FB1
DECL|CAN_F9R1_FB20_Msk|macro|CAN_F9R1_FB20_Msk
DECL|CAN_F9R1_FB20_Pos|macro|CAN_F9R1_FB20_Pos
DECL|CAN_F9R1_FB20|macro|CAN_F9R1_FB20
DECL|CAN_F9R1_FB21_Msk|macro|CAN_F9R1_FB21_Msk
DECL|CAN_F9R1_FB21_Pos|macro|CAN_F9R1_FB21_Pos
DECL|CAN_F9R1_FB21|macro|CAN_F9R1_FB21
DECL|CAN_F9R1_FB22_Msk|macro|CAN_F9R1_FB22_Msk
DECL|CAN_F9R1_FB22_Pos|macro|CAN_F9R1_FB22_Pos
DECL|CAN_F9R1_FB22|macro|CAN_F9R1_FB22
DECL|CAN_F9R1_FB23_Msk|macro|CAN_F9R1_FB23_Msk
DECL|CAN_F9R1_FB23_Pos|macro|CAN_F9R1_FB23_Pos
DECL|CAN_F9R1_FB23|macro|CAN_F9R1_FB23
DECL|CAN_F9R1_FB24_Msk|macro|CAN_F9R1_FB24_Msk
DECL|CAN_F9R1_FB24_Pos|macro|CAN_F9R1_FB24_Pos
DECL|CAN_F9R1_FB24|macro|CAN_F9R1_FB24
DECL|CAN_F9R1_FB25_Msk|macro|CAN_F9R1_FB25_Msk
DECL|CAN_F9R1_FB25_Pos|macro|CAN_F9R1_FB25_Pos
DECL|CAN_F9R1_FB25|macro|CAN_F9R1_FB25
DECL|CAN_F9R1_FB26_Msk|macro|CAN_F9R1_FB26_Msk
DECL|CAN_F9R1_FB26_Pos|macro|CAN_F9R1_FB26_Pos
DECL|CAN_F9R1_FB26|macro|CAN_F9R1_FB26
DECL|CAN_F9R1_FB27_Msk|macro|CAN_F9R1_FB27_Msk
DECL|CAN_F9R1_FB27_Pos|macro|CAN_F9R1_FB27_Pos
DECL|CAN_F9R1_FB27|macro|CAN_F9R1_FB27
DECL|CAN_F9R1_FB28_Msk|macro|CAN_F9R1_FB28_Msk
DECL|CAN_F9R1_FB28_Pos|macro|CAN_F9R1_FB28_Pos
DECL|CAN_F9R1_FB28|macro|CAN_F9R1_FB28
DECL|CAN_F9R1_FB29_Msk|macro|CAN_F9R1_FB29_Msk
DECL|CAN_F9R1_FB29_Pos|macro|CAN_F9R1_FB29_Pos
DECL|CAN_F9R1_FB29|macro|CAN_F9R1_FB29
DECL|CAN_F9R1_FB2_Msk|macro|CAN_F9R1_FB2_Msk
DECL|CAN_F9R1_FB2_Pos|macro|CAN_F9R1_FB2_Pos
DECL|CAN_F9R1_FB2|macro|CAN_F9R1_FB2
DECL|CAN_F9R1_FB30_Msk|macro|CAN_F9R1_FB30_Msk
DECL|CAN_F9R1_FB30_Pos|macro|CAN_F9R1_FB30_Pos
DECL|CAN_F9R1_FB30|macro|CAN_F9R1_FB30
DECL|CAN_F9R1_FB31_Msk|macro|CAN_F9R1_FB31_Msk
DECL|CAN_F9R1_FB31_Pos|macro|CAN_F9R1_FB31_Pos
DECL|CAN_F9R1_FB31|macro|CAN_F9R1_FB31
DECL|CAN_F9R1_FB3_Msk|macro|CAN_F9R1_FB3_Msk
DECL|CAN_F9R1_FB3_Pos|macro|CAN_F9R1_FB3_Pos
DECL|CAN_F9R1_FB3|macro|CAN_F9R1_FB3
DECL|CAN_F9R1_FB4_Msk|macro|CAN_F9R1_FB4_Msk
DECL|CAN_F9R1_FB4_Pos|macro|CAN_F9R1_FB4_Pos
DECL|CAN_F9R1_FB4|macro|CAN_F9R1_FB4
DECL|CAN_F9R1_FB5_Msk|macro|CAN_F9R1_FB5_Msk
DECL|CAN_F9R1_FB5_Pos|macro|CAN_F9R1_FB5_Pos
DECL|CAN_F9R1_FB5|macro|CAN_F9R1_FB5
DECL|CAN_F9R1_FB6_Msk|macro|CAN_F9R1_FB6_Msk
DECL|CAN_F9R1_FB6_Pos|macro|CAN_F9R1_FB6_Pos
DECL|CAN_F9R1_FB6|macro|CAN_F9R1_FB6
DECL|CAN_F9R1_FB7_Msk|macro|CAN_F9R1_FB7_Msk
DECL|CAN_F9R1_FB7_Pos|macro|CAN_F9R1_FB7_Pos
DECL|CAN_F9R1_FB7|macro|CAN_F9R1_FB7
DECL|CAN_F9R1_FB8_Msk|macro|CAN_F9R1_FB8_Msk
DECL|CAN_F9R1_FB8_Pos|macro|CAN_F9R1_FB8_Pos
DECL|CAN_F9R1_FB8|macro|CAN_F9R1_FB8
DECL|CAN_F9R1_FB9_Msk|macro|CAN_F9R1_FB9_Msk
DECL|CAN_F9R1_FB9_Pos|macro|CAN_F9R1_FB9_Pos
DECL|CAN_F9R1_FB9|macro|CAN_F9R1_FB9
DECL|CAN_F9R2_FB0_Msk|macro|CAN_F9R2_FB0_Msk
DECL|CAN_F9R2_FB0_Pos|macro|CAN_F9R2_FB0_Pos
DECL|CAN_F9R2_FB0|macro|CAN_F9R2_FB0
DECL|CAN_F9R2_FB10_Msk|macro|CAN_F9R2_FB10_Msk
DECL|CAN_F9R2_FB10_Pos|macro|CAN_F9R2_FB10_Pos
DECL|CAN_F9R2_FB10|macro|CAN_F9R2_FB10
DECL|CAN_F9R2_FB11_Msk|macro|CAN_F9R2_FB11_Msk
DECL|CAN_F9R2_FB11_Pos|macro|CAN_F9R2_FB11_Pos
DECL|CAN_F9R2_FB11|macro|CAN_F9R2_FB11
DECL|CAN_F9R2_FB12_Msk|macro|CAN_F9R2_FB12_Msk
DECL|CAN_F9R2_FB12_Pos|macro|CAN_F9R2_FB12_Pos
DECL|CAN_F9R2_FB12|macro|CAN_F9R2_FB12
DECL|CAN_F9R2_FB13_Msk|macro|CAN_F9R2_FB13_Msk
DECL|CAN_F9R2_FB13_Pos|macro|CAN_F9R2_FB13_Pos
DECL|CAN_F9R2_FB13|macro|CAN_F9R2_FB13
DECL|CAN_F9R2_FB14_Msk|macro|CAN_F9R2_FB14_Msk
DECL|CAN_F9R2_FB14_Pos|macro|CAN_F9R2_FB14_Pos
DECL|CAN_F9R2_FB14|macro|CAN_F9R2_FB14
DECL|CAN_F9R2_FB15_Msk|macro|CAN_F9R2_FB15_Msk
DECL|CAN_F9R2_FB15_Pos|macro|CAN_F9R2_FB15_Pos
DECL|CAN_F9R2_FB15|macro|CAN_F9R2_FB15
DECL|CAN_F9R2_FB16_Msk|macro|CAN_F9R2_FB16_Msk
DECL|CAN_F9R2_FB16_Pos|macro|CAN_F9R2_FB16_Pos
DECL|CAN_F9R2_FB16|macro|CAN_F9R2_FB16
DECL|CAN_F9R2_FB17_Msk|macro|CAN_F9R2_FB17_Msk
DECL|CAN_F9R2_FB17_Pos|macro|CAN_F9R2_FB17_Pos
DECL|CAN_F9R2_FB17|macro|CAN_F9R2_FB17
DECL|CAN_F9R2_FB18_Msk|macro|CAN_F9R2_FB18_Msk
DECL|CAN_F9R2_FB18_Pos|macro|CAN_F9R2_FB18_Pos
DECL|CAN_F9R2_FB18|macro|CAN_F9R2_FB18
DECL|CAN_F9R2_FB19_Msk|macro|CAN_F9R2_FB19_Msk
DECL|CAN_F9R2_FB19_Pos|macro|CAN_F9R2_FB19_Pos
DECL|CAN_F9R2_FB19|macro|CAN_F9R2_FB19
DECL|CAN_F9R2_FB1_Msk|macro|CAN_F9R2_FB1_Msk
DECL|CAN_F9R2_FB1_Pos|macro|CAN_F9R2_FB1_Pos
DECL|CAN_F9R2_FB1|macro|CAN_F9R2_FB1
DECL|CAN_F9R2_FB20_Msk|macro|CAN_F9R2_FB20_Msk
DECL|CAN_F9R2_FB20_Pos|macro|CAN_F9R2_FB20_Pos
DECL|CAN_F9R2_FB20|macro|CAN_F9R2_FB20
DECL|CAN_F9R2_FB21_Msk|macro|CAN_F9R2_FB21_Msk
DECL|CAN_F9R2_FB21_Pos|macro|CAN_F9R2_FB21_Pos
DECL|CAN_F9R2_FB21|macro|CAN_F9R2_FB21
DECL|CAN_F9R2_FB22_Msk|macro|CAN_F9R2_FB22_Msk
DECL|CAN_F9R2_FB22_Pos|macro|CAN_F9R2_FB22_Pos
DECL|CAN_F9R2_FB22|macro|CAN_F9R2_FB22
DECL|CAN_F9R2_FB23_Msk|macro|CAN_F9R2_FB23_Msk
DECL|CAN_F9R2_FB23_Pos|macro|CAN_F9R2_FB23_Pos
DECL|CAN_F9R2_FB23|macro|CAN_F9R2_FB23
DECL|CAN_F9R2_FB24_Msk|macro|CAN_F9R2_FB24_Msk
DECL|CAN_F9R2_FB24_Pos|macro|CAN_F9R2_FB24_Pos
DECL|CAN_F9R2_FB24|macro|CAN_F9R2_FB24
DECL|CAN_F9R2_FB25_Msk|macro|CAN_F9R2_FB25_Msk
DECL|CAN_F9R2_FB25_Pos|macro|CAN_F9R2_FB25_Pos
DECL|CAN_F9R2_FB25|macro|CAN_F9R2_FB25
DECL|CAN_F9R2_FB26_Msk|macro|CAN_F9R2_FB26_Msk
DECL|CAN_F9R2_FB26_Pos|macro|CAN_F9R2_FB26_Pos
DECL|CAN_F9R2_FB26|macro|CAN_F9R2_FB26
DECL|CAN_F9R2_FB27_Msk|macro|CAN_F9R2_FB27_Msk
DECL|CAN_F9R2_FB27_Pos|macro|CAN_F9R2_FB27_Pos
DECL|CAN_F9R2_FB27|macro|CAN_F9R2_FB27
DECL|CAN_F9R2_FB28_Msk|macro|CAN_F9R2_FB28_Msk
DECL|CAN_F9R2_FB28_Pos|macro|CAN_F9R2_FB28_Pos
DECL|CAN_F9R2_FB28|macro|CAN_F9R2_FB28
DECL|CAN_F9R2_FB29_Msk|macro|CAN_F9R2_FB29_Msk
DECL|CAN_F9R2_FB29_Pos|macro|CAN_F9R2_FB29_Pos
DECL|CAN_F9R2_FB29|macro|CAN_F9R2_FB29
DECL|CAN_F9R2_FB2_Msk|macro|CAN_F9R2_FB2_Msk
DECL|CAN_F9R2_FB2_Pos|macro|CAN_F9R2_FB2_Pos
DECL|CAN_F9R2_FB2|macro|CAN_F9R2_FB2
DECL|CAN_F9R2_FB30_Msk|macro|CAN_F9R2_FB30_Msk
DECL|CAN_F9R2_FB30_Pos|macro|CAN_F9R2_FB30_Pos
DECL|CAN_F9R2_FB30|macro|CAN_F9R2_FB30
DECL|CAN_F9R2_FB31_Msk|macro|CAN_F9R2_FB31_Msk
DECL|CAN_F9R2_FB31_Pos|macro|CAN_F9R2_FB31_Pos
DECL|CAN_F9R2_FB31|macro|CAN_F9R2_FB31
DECL|CAN_F9R2_FB3_Msk|macro|CAN_F9R2_FB3_Msk
DECL|CAN_F9R2_FB3_Pos|macro|CAN_F9R2_FB3_Pos
DECL|CAN_F9R2_FB3|macro|CAN_F9R2_FB3
DECL|CAN_F9R2_FB4_Msk|macro|CAN_F9R2_FB4_Msk
DECL|CAN_F9R2_FB4_Pos|macro|CAN_F9R2_FB4_Pos
DECL|CAN_F9R2_FB4|macro|CAN_F9R2_FB4
DECL|CAN_F9R2_FB5_Msk|macro|CAN_F9R2_FB5_Msk
DECL|CAN_F9R2_FB5_Pos|macro|CAN_F9R2_FB5_Pos
DECL|CAN_F9R2_FB5|macro|CAN_F9R2_FB5
DECL|CAN_F9R2_FB6_Msk|macro|CAN_F9R2_FB6_Msk
DECL|CAN_F9R2_FB6_Pos|macro|CAN_F9R2_FB6_Pos
DECL|CAN_F9R2_FB6|macro|CAN_F9R2_FB6
DECL|CAN_F9R2_FB7_Msk|macro|CAN_F9R2_FB7_Msk
DECL|CAN_F9R2_FB7_Pos|macro|CAN_F9R2_FB7_Pos
DECL|CAN_F9R2_FB7|macro|CAN_F9R2_FB7
DECL|CAN_F9R2_FB8_Msk|macro|CAN_F9R2_FB8_Msk
DECL|CAN_F9R2_FB8_Pos|macro|CAN_F9R2_FB8_Pos
DECL|CAN_F9R2_FB8|macro|CAN_F9R2_FB8
DECL|CAN_F9R2_FB9_Msk|macro|CAN_F9R2_FB9_Msk
DECL|CAN_F9R2_FB9_Pos|macro|CAN_F9R2_FB9_Pos
DECL|CAN_F9R2_FB9|macro|CAN_F9R2_FB9
DECL|CAN_FA1R_FACT0_Msk|macro|CAN_FA1R_FACT0_Msk
DECL|CAN_FA1R_FACT0_Pos|macro|CAN_FA1R_FACT0_Pos
DECL|CAN_FA1R_FACT0|macro|CAN_FA1R_FACT0
DECL|CAN_FA1R_FACT10_Msk|macro|CAN_FA1R_FACT10_Msk
DECL|CAN_FA1R_FACT10_Pos|macro|CAN_FA1R_FACT10_Pos
DECL|CAN_FA1R_FACT10|macro|CAN_FA1R_FACT10
DECL|CAN_FA1R_FACT11_Msk|macro|CAN_FA1R_FACT11_Msk
DECL|CAN_FA1R_FACT11_Pos|macro|CAN_FA1R_FACT11_Pos
DECL|CAN_FA1R_FACT11|macro|CAN_FA1R_FACT11
DECL|CAN_FA1R_FACT12_Msk|macro|CAN_FA1R_FACT12_Msk
DECL|CAN_FA1R_FACT12_Pos|macro|CAN_FA1R_FACT12_Pos
DECL|CAN_FA1R_FACT12|macro|CAN_FA1R_FACT12
DECL|CAN_FA1R_FACT13_Msk|macro|CAN_FA1R_FACT13_Msk
DECL|CAN_FA1R_FACT13_Pos|macro|CAN_FA1R_FACT13_Pos
DECL|CAN_FA1R_FACT13|macro|CAN_FA1R_FACT13
DECL|CAN_FA1R_FACT1_Msk|macro|CAN_FA1R_FACT1_Msk
DECL|CAN_FA1R_FACT1_Pos|macro|CAN_FA1R_FACT1_Pos
DECL|CAN_FA1R_FACT1|macro|CAN_FA1R_FACT1
DECL|CAN_FA1R_FACT2_Msk|macro|CAN_FA1R_FACT2_Msk
DECL|CAN_FA1R_FACT2_Pos|macro|CAN_FA1R_FACT2_Pos
DECL|CAN_FA1R_FACT2|macro|CAN_FA1R_FACT2
DECL|CAN_FA1R_FACT3_Msk|macro|CAN_FA1R_FACT3_Msk
DECL|CAN_FA1R_FACT3_Pos|macro|CAN_FA1R_FACT3_Pos
DECL|CAN_FA1R_FACT3|macro|CAN_FA1R_FACT3
DECL|CAN_FA1R_FACT4_Msk|macro|CAN_FA1R_FACT4_Msk
DECL|CAN_FA1R_FACT4_Pos|macro|CAN_FA1R_FACT4_Pos
DECL|CAN_FA1R_FACT4|macro|CAN_FA1R_FACT4
DECL|CAN_FA1R_FACT5_Msk|macro|CAN_FA1R_FACT5_Msk
DECL|CAN_FA1R_FACT5_Pos|macro|CAN_FA1R_FACT5_Pos
DECL|CAN_FA1R_FACT5|macro|CAN_FA1R_FACT5
DECL|CAN_FA1R_FACT6_Msk|macro|CAN_FA1R_FACT6_Msk
DECL|CAN_FA1R_FACT6_Pos|macro|CAN_FA1R_FACT6_Pos
DECL|CAN_FA1R_FACT6|macro|CAN_FA1R_FACT6
DECL|CAN_FA1R_FACT7_Msk|macro|CAN_FA1R_FACT7_Msk
DECL|CAN_FA1R_FACT7_Pos|macro|CAN_FA1R_FACT7_Pos
DECL|CAN_FA1R_FACT7|macro|CAN_FA1R_FACT7
DECL|CAN_FA1R_FACT8_Msk|macro|CAN_FA1R_FACT8_Msk
DECL|CAN_FA1R_FACT8_Pos|macro|CAN_FA1R_FACT8_Pos
DECL|CAN_FA1R_FACT8|macro|CAN_FA1R_FACT8
DECL|CAN_FA1R_FACT9_Msk|macro|CAN_FA1R_FACT9_Msk
DECL|CAN_FA1R_FACT9_Pos|macro|CAN_FA1R_FACT9_Pos
DECL|CAN_FA1R_FACT9|macro|CAN_FA1R_FACT9
DECL|CAN_FA1R_FACT_Msk|macro|CAN_FA1R_FACT_Msk
DECL|CAN_FA1R_FACT_Pos|macro|CAN_FA1R_FACT_Pos
DECL|CAN_FA1R_FACT|macro|CAN_FA1R_FACT
DECL|CAN_FFA1R_FFA0_Msk|macro|CAN_FFA1R_FFA0_Msk
DECL|CAN_FFA1R_FFA0_Pos|macro|CAN_FFA1R_FFA0_Pos
DECL|CAN_FFA1R_FFA0|macro|CAN_FFA1R_FFA0
DECL|CAN_FFA1R_FFA10_Msk|macro|CAN_FFA1R_FFA10_Msk
DECL|CAN_FFA1R_FFA10_Pos|macro|CAN_FFA1R_FFA10_Pos
DECL|CAN_FFA1R_FFA10|macro|CAN_FFA1R_FFA10
DECL|CAN_FFA1R_FFA11_Msk|macro|CAN_FFA1R_FFA11_Msk
DECL|CAN_FFA1R_FFA11_Pos|macro|CAN_FFA1R_FFA11_Pos
DECL|CAN_FFA1R_FFA11|macro|CAN_FFA1R_FFA11
DECL|CAN_FFA1R_FFA12_Msk|macro|CAN_FFA1R_FFA12_Msk
DECL|CAN_FFA1R_FFA12_Pos|macro|CAN_FFA1R_FFA12_Pos
DECL|CAN_FFA1R_FFA12|macro|CAN_FFA1R_FFA12
DECL|CAN_FFA1R_FFA13_Msk|macro|CAN_FFA1R_FFA13_Msk
DECL|CAN_FFA1R_FFA13_Pos|macro|CAN_FFA1R_FFA13_Pos
DECL|CAN_FFA1R_FFA13|macro|CAN_FFA1R_FFA13
DECL|CAN_FFA1R_FFA1_Msk|macro|CAN_FFA1R_FFA1_Msk
DECL|CAN_FFA1R_FFA1_Pos|macro|CAN_FFA1R_FFA1_Pos
DECL|CAN_FFA1R_FFA1|macro|CAN_FFA1R_FFA1
DECL|CAN_FFA1R_FFA2_Msk|macro|CAN_FFA1R_FFA2_Msk
DECL|CAN_FFA1R_FFA2_Pos|macro|CAN_FFA1R_FFA2_Pos
DECL|CAN_FFA1R_FFA2|macro|CAN_FFA1R_FFA2
DECL|CAN_FFA1R_FFA3_Msk|macro|CAN_FFA1R_FFA3_Msk
DECL|CAN_FFA1R_FFA3_Pos|macro|CAN_FFA1R_FFA3_Pos
DECL|CAN_FFA1R_FFA3|macro|CAN_FFA1R_FFA3
DECL|CAN_FFA1R_FFA4_Msk|macro|CAN_FFA1R_FFA4_Msk
DECL|CAN_FFA1R_FFA4_Pos|macro|CAN_FFA1R_FFA4_Pos
DECL|CAN_FFA1R_FFA4|macro|CAN_FFA1R_FFA4
DECL|CAN_FFA1R_FFA5_Msk|macro|CAN_FFA1R_FFA5_Msk
DECL|CAN_FFA1R_FFA5_Pos|macro|CAN_FFA1R_FFA5_Pos
DECL|CAN_FFA1R_FFA5|macro|CAN_FFA1R_FFA5
DECL|CAN_FFA1R_FFA6_Msk|macro|CAN_FFA1R_FFA6_Msk
DECL|CAN_FFA1R_FFA6_Pos|macro|CAN_FFA1R_FFA6_Pos
DECL|CAN_FFA1R_FFA6|macro|CAN_FFA1R_FFA6
DECL|CAN_FFA1R_FFA7_Msk|macro|CAN_FFA1R_FFA7_Msk
DECL|CAN_FFA1R_FFA7_Pos|macro|CAN_FFA1R_FFA7_Pos
DECL|CAN_FFA1R_FFA7|macro|CAN_FFA1R_FFA7
DECL|CAN_FFA1R_FFA8_Msk|macro|CAN_FFA1R_FFA8_Msk
DECL|CAN_FFA1R_FFA8_Pos|macro|CAN_FFA1R_FFA8_Pos
DECL|CAN_FFA1R_FFA8|macro|CAN_FFA1R_FFA8
DECL|CAN_FFA1R_FFA9_Msk|macro|CAN_FFA1R_FFA9_Msk
DECL|CAN_FFA1R_FFA9_Pos|macro|CAN_FFA1R_FFA9_Pos
DECL|CAN_FFA1R_FFA9|macro|CAN_FFA1R_FFA9
DECL|CAN_FFA1R_FFA_Msk|macro|CAN_FFA1R_FFA_Msk
DECL|CAN_FFA1R_FFA_Pos|macro|CAN_FFA1R_FFA_Pos
DECL|CAN_FFA1R_FFA|macro|CAN_FFA1R_FFA
DECL|CAN_FIFOMailBox_TypeDef|typedef|} CAN_FIFOMailBox_TypeDef;
DECL|CAN_FM1R_FBM0_Msk|macro|CAN_FM1R_FBM0_Msk
DECL|CAN_FM1R_FBM0_Pos|macro|CAN_FM1R_FBM0_Pos
DECL|CAN_FM1R_FBM0|macro|CAN_FM1R_FBM0
DECL|CAN_FM1R_FBM10_Msk|macro|CAN_FM1R_FBM10_Msk
DECL|CAN_FM1R_FBM10_Pos|macro|CAN_FM1R_FBM10_Pos
DECL|CAN_FM1R_FBM10|macro|CAN_FM1R_FBM10
DECL|CAN_FM1R_FBM11_Msk|macro|CAN_FM1R_FBM11_Msk
DECL|CAN_FM1R_FBM11_Pos|macro|CAN_FM1R_FBM11_Pos
DECL|CAN_FM1R_FBM11|macro|CAN_FM1R_FBM11
DECL|CAN_FM1R_FBM12_Msk|macro|CAN_FM1R_FBM12_Msk
DECL|CAN_FM1R_FBM12_Pos|macro|CAN_FM1R_FBM12_Pos
DECL|CAN_FM1R_FBM12|macro|CAN_FM1R_FBM12
DECL|CAN_FM1R_FBM13_Msk|macro|CAN_FM1R_FBM13_Msk
DECL|CAN_FM1R_FBM13_Pos|macro|CAN_FM1R_FBM13_Pos
DECL|CAN_FM1R_FBM13|macro|CAN_FM1R_FBM13
DECL|CAN_FM1R_FBM1_Msk|macro|CAN_FM1R_FBM1_Msk
DECL|CAN_FM1R_FBM1_Pos|macro|CAN_FM1R_FBM1_Pos
DECL|CAN_FM1R_FBM1|macro|CAN_FM1R_FBM1
DECL|CAN_FM1R_FBM2_Msk|macro|CAN_FM1R_FBM2_Msk
DECL|CAN_FM1R_FBM2_Pos|macro|CAN_FM1R_FBM2_Pos
DECL|CAN_FM1R_FBM2|macro|CAN_FM1R_FBM2
DECL|CAN_FM1R_FBM3_Msk|macro|CAN_FM1R_FBM3_Msk
DECL|CAN_FM1R_FBM3_Pos|macro|CAN_FM1R_FBM3_Pos
DECL|CAN_FM1R_FBM3|macro|CAN_FM1R_FBM3
DECL|CAN_FM1R_FBM4_Msk|macro|CAN_FM1R_FBM4_Msk
DECL|CAN_FM1R_FBM4_Pos|macro|CAN_FM1R_FBM4_Pos
DECL|CAN_FM1R_FBM4|macro|CAN_FM1R_FBM4
DECL|CAN_FM1R_FBM5_Msk|macro|CAN_FM1R_FBM5_Msk
DECL|CAN_FM1R_FBM5_Pos|macro|CAN_FM1R_FBM5_Pos
DECL|CAN_FM1R_FBM5|macro|CAN_FM1R_FBM5
DECL|CAN_FM1R_FBM6_Msk|macro|CAN_FM1R_FBM6_Msk
DECL|CAN_FM1R_FBM6_Pos|macro|CAN_FM1R_FBM6_Pos
DECL|CAN_FM1R_FBM6|macro|CAN_FM1R_FBM6
DECL|CAN_FM1R_FBM7_Msk|macro|CAN_FM1R_FBM7_Msk
DECL|CAN_FM1R_FBM7_Pos|macro|CAN_FM1R_FBM7_Pos
DECL|CAN_FM1R_FBM7|macro|CAN_FM1R_FBM7
DECL|CAN_FM1R_FBM8_Msk|macro|CAN_FM1R_FBM8_Msk
DECL|CAN_FM1R_FBM8_Pos|macro|CAN_FM1R_FBM8_Pos
DECL|CAN_FM1R_FBM8|macro|CAN_FM1R_FBM8
DECL|CAN_FM1R_FBM9_Msk|macro|CAN_FM1R_FBM9_Msk
DECL|CAN_FM1R_FBM9_Pos|macro|CAN_FM1R_FBM9_Pos
DECL|CAN_FM1R_FBM9|macro|CAN_FM1R_FBM9
DECL|CAN_FM1R_FBM_Msk|macro|CAN_FM1R_FBM_Msk
DECL|CAN_FM1R_FBM_Pos|macro|CAN_FM1R_FBM_Pos
DECL|CAN_FM1R_FBM|macro|CAN_FM1R_FBM
DECL|CAN_FMR_FINIT|macro|CAN_FMR_FINIT
DECL|CAN_FS1R_FSC0_Msk|macro|CAN_FS1R_FSC0_Msk
DECL|CAN_FS1R_FSC0_Pos|macro|CAN_FS1R_FSC0_Pos
DECL|CAN_FS1R_FSC0|macro|CAN_FS1R_FSC0
DECL|CAN_FS1R_FSC10_Msk|macro|CAN_FS1R_FSC10_Msk
DECL|CAN_FS1R_FSC10_Pos|macro|CAN_FS1R_FSC10_Pos
DECL|CAN_FS1R_FSC10|macro|CAN_FS1R_FSC10
DECL|CAN_FS1R_FSC11_Msk|macro|CAN_FS1R_FSC11_Msk
DECL|CAN_FS1R_FSC11_Pos|macro|CAN_FS1R_FSC11_Pos
DECL|CAN_FS1R_FSC11|macro|CAN_FS1R_FSC11
DECL|CAN_FS1R_FSC12_Msk|macro|CAN_FS1R_FSC12_Msk
DECL|CAN_FS1R_FSC12_Pos|macro|CAN_FS1R_FSC12_Pos
DECL|CAN_FS1R_FSC12|macro|CAN_FS1R_FSC12
DECL|CAN_FS1R_FSC13_Msk|macro|CAN_FS1R_FSC13_Msk
DECL|CAN_FS1R_FSC13_Pos|macro|CAN_FS1R_FSC13_Pos
DECL|CAN_FS1R_FSC13|macro|CAN_FS1R_FSC13
DECL|CAN_FS1R_FSC1_Msk|macro|CAN_FS1R_FSC1_Msk
DECL|CAN_FS1R_FSC1_Pos|macro|CAN_FS1R_FSC1_Pos
DECL|CAN_FS1R_FSC1|macro|CAN_FS1R_FSC1
DECL|CAN_FS1R_FSC2_Msk|macro|CAN_FS1R_FSC2_Msk
DECL|CAN_FS1R_FSC2_Pos|macro|CAN_FS1R_FSC2_Pos
DECL|CAN_FS1R_FSC2|macro|CAN_FS1R_FSC2
DECL|CAN_FS1R_FSC3_Msk|macro|CAN_FS1R_FSC3_Msk
DECL|CAN_FS1R_FSC3_Pos|macro|CAN_FS1R_FSC3_Pos
DECL|CAN_FS1R_FSC3|macro|CAN_FS1R_FSC3
DECL|CAN_FS1R_FSC4_Msk|macro|CAN_FS1R_FSC4_Msk
DECL|CAN_FS1R_FSC4_Pos|macro|CAN_FS1R_FSC4_Pos
DECL|CAN_FS1R_FSC4|macro|CAN_FS1R_FSC4
DECL|CAN_FS1R_FSC5_Msk|macro|CAN_FS1R_FSC5_Msk
DECL|CAN_FS1R_FSC5_Pos|macro|CAN_FS1R_FSC5_Pos
DECL|CAN_FS1R_FSC5|macro|CAN_FS1R_FSC5
DECL|CAN_FS1R_FSC6_Msk|macro|CAN_FS1R_FSC6_Msk
DECL|CAN_FS1R_FSC6_Pos|macro|CAN_FS1R_FSC6_Pos
DECL|CAN_FS1R_FSC6|macro|CAN_FS1R_FSC6
DECL|CAN_FS1R_FSC7_Msk|macro|CAN_FS1R_FSC7_Msk
DECL|CAN_FS1R_FSC7_Pos|macro|CAN_FS1R_FSC7_Pos
DECL|CAN_FS1R_FSC7|macro|CAN_FS1R_FSC7
DECL|CAN_FS1R_FSC8_Msk|macro|CAN_FS1R_FSC8_Msk
DECL|CAN_FS1R_FSC8_Pos|macro|CAN_FS1R_FSC8_Pos
DECL|CAN_FS1R_FSC8|macro|CAN_FS1R_FSC8
DECL|CAN_FS1R_FSC9_Msk|macro|CAN_FS1R_FSC9_Msk
DECL|CAN_FS1R_FSC9_Pos|macro|CAN_FS1R_FSC9_Pos
DECL|CAN_FS1R_FSC9|macro|CAN_FS1R_FSC9
DECL|CAN_FS1R_FSC_Msk|macro|CAN_FS1R_FSC_Msk
DECL|CAN_FS1R_FSC_Pos|macro|CAN_FS1R_FSC_Pos
DECL|CAN_FS1R_FSC|macro|CAN_FS1R_FSC
DECL|CAN_FilterRegister_TypeDef|typedef|} CAN_FilterRegister_TypeDef;
DECL|CAN_IER_BOFIE_Msk|macro|CAN_IER_BOFIE_Msk
DECL|CAN_IER_BOFIE_Pos|macro|CAN_IER_BOFIE_Pos
DECL|CAN_IER_BOFIE|macro|CAN_IER_BOFIE
DECL|CAN_IER_EPVIE_Msk|macro|CAN_IER_EPVIE_Msk
DECL|CAN_IER_EPVIE_Pos|macro|CAN_IER_EPVIE_Pos
DECL|CAN_IER_EPVIE|macro|CAN_IER_EPVIE
DECL|CAN_IER_ERRIE_Msk|macro|CAN_IER_ERRIE_Msk
DECL|CAN_IER_ERRIE_Pos|macro|CAN_IER_ERRIE_Pos
DECL|CAN_IER_ERRIE|macro|CAN_IER_ERRIE
DECL|CAN_IER_EWGIE_Msk|macro|CAN_IER_EWGIE_Msk
DECL|CAN_IER_EWGIE_Pos|macro|CAN_IER_EWGIE_Pos
DECL|CAN_IER_EWGIE|macro|CAN_IER_EWGIE
DECL|CAN_IER_FFIE0_Msk|macro|CAN_IER_FFIE0_Msk
DECL|CAN_IER_FFIE0_Pos|macro|CAN_IER_FFIE0_Pos
DECL|CAN_IER_FFIE0|macro|CAN_IER_FFIE0
DECL|CAN_IER_FFIE1_Msk|macro|CAN_IER_FFIE1_Msk
DECL|CAN_IER_FFIE1_Pos|macro|CAN_IER_FFIE1_Pos
DECL|CAN_IER_FFIE1|macro|CAN_IER_FFIE1
DECL|CAN_IER_FMPIE0_Msk|macro|CAN_IER_FMPIE0_Msk
DECL|CAN_IER_FMPIE0_Pos|macro|CAN_IER_FMPIE0_Pos
DECL|CAN_IER_FMPIE0|macro|CAN_IER_FMPIE0
DECL|CAN_IER_FMPIE1_Msk|macro|CAN_IER_FMPIE1_Msk
DECL|CAN_IER_FMPIE1_Pos|macro|CAN_IER_FMPIE1_Pos
DECL|CAN_IER_FMPIE1|macro|CAN_IER_FMPIE1
DECL|CAN_IER_FOVIE0_Msk|macro|CAN_IER_FOVIE0_Msk
DECL|CAN_IER_FOVIE0_Pos|macro|CAN_IER_FOVIE0_Pos
DECL|CAN_IER_FOVIE0|macro|CAN_IER_FOVIE0
DECL|CAN_IER_FOVIE1_Msk|macro|CAN_IER_FOVIE1_Msk
DECL|CAN_IER_FOVIE1_Pos|macro|CAN_IER_FOVIE1_Pos
DECL|CAN_IER_FOVIE1|macro|CAN_IER_FOVIE1
DECL|CAN_IER_LECIE_Msk|macro|CAN_IER_LECIE_Msk
DECL|CAN_IER_LECIE_Pos|macro|CAN_IER_LECIE_Pos
DECL|CAN_IER_LECIE|macro|CAN_IER_LECIE
DECL|CAN_IER_SLKIE_Msk|macro|CAN_IER_SLKIE_Msk
DECL|CAN_IER_SLKIE_Pos|macro|CAN_IER_SLKIE_Pos
DECL|CAN_IER_SLKIE|macro|CAN_IER_SLKIE
DECL|CAN_IER_TMEIE_Msk|macro|CAN_IER_TMEIE_Msk
DECL|CAN_IER_TMEIE_Pos|macro|CAN_IER_TMEIE_Pos
DECL|CAN_IER_TMEIE|macro|CAN_IER_TMEIE
DECL|CAN_IER_WKUIE_Msk|macro|CAN_IER_WKUIE_Msk
DECL|CAN_IER_WKUIE_Pos|macro|CAN_IER_WKUIE_Pos
DECL|CAN_IER_WKUIE|macro|CAN_IER_WKUIE
DECL|CAN_MCR_ABOM_Msk|macro|CAN_MCR_ABOM_Msk
DECL|CAN_MCR_ABOM_Pos|macro|CAN_MCR_ABOM_Pos
DECL|CAN_MCR_ABOM|macro|CAN_MCR_ABOM
DECL|CAN_MCR_AWUM_Msk|macro|CAN_MCR_AWUM_Msk
DECL|CAN_MCR_AWUM_Pos|macro|CAN_MCR_AWUM_Pos
DECL|CAN_MCR_AWUM|macro|CAN_MCR_AWUM
DECL|CAN_MCR_INRQ_Msk|macro|CAN_MCR_INRQ_Msk
DECL|CAN_MCR_INRQ_Pos|macro|CAN_MCR_INRQ_Pos
DECL|CAN_MCR_INRQ|macro|CAN_MCR_INRQ
DECL|CAN_MCR_NART_Msk|macro|CAN_MCR_NART_Msk
DECL|CAN_MCR_NART_Pos|macro|CAN_MCR_NART_Pos
DECL|CAN_MCR_NART|macro|CAN_MCR_NART
DECL|CAN_MCR_RESET_Msk|macro|CAN_MCR_RESET_Msk
DECL|CAN_MCR_RESET_Pos|macro|CAN_MCR_RESET_Pos
DECL|CAN_MCR_RESET|macro|CAN_MCR_RESET
DECL|CAN_MCR_RFLM_Msk|macro|CAN_MCR_RFLM_Msk
DECL|CAN_MCR_RFLM_Pos|macro|CAN_MCR_RFLM_Pos
DECL|CAN_MCR_RFLM|macro|CAN_MCR_RFLM
DECL|CAN_MCR_SLEEP_Msk|macro|CAN_MCR_SLEEP_Msk
DECL|CAN_MCR_SLEEP_Pos|macro|CAN_MCR_SLEEP_Pos
DECL|CAN_MCR_SLEEP|macro|CAN_MCR_SLEEP
DECL|CAN_MCR_TTCM_Msk|macro|CAN_MCR_TTCM_Msk
DECL|CAN_MCR_TTCM_Pos|macro|CAN_MCR_TTCM_Pos
DECL|CAN_MCR_TTCM|macro|CAN_MCR_TTCM
DECL|CAN_MCR_TXFP_Msk|macro|CAN_MCR_TXFP_Msk
DECL|CAN_MCR_TXFP_Pos|macro|CAN_MCR_TXFP_Pos
DECL|CAN_MCR_TXFP|macro|CAN_MCR_TXFP
DECL|CAN_MSR_ERRI_Msk|macro|CAN_MSR_ERRI_Msk
DECL|CAN_MSR_ERRI_Pos|macro|CAN_MSR_ERRI_Pos
DECL|CAN_MSR_ERRI|macro|CAN_MSR_ERRI
DECL|CAN_MSR_INAK_Msk|macro|CAN_MSR_INAK_Msk
DECL|CAN_MSR_INAK_Pos|macro|CAN_MSR_INAK_Pos
DECL|CAN_MSR_INAK|macro|CAN_MSR_INAK
DECL|CAN_MSR_RXM_Msk|macro|CAN_MSR_RXM_Msk
DECL|CAN_MSR_RXM_Pos|macro|CAN_MSR_RXM_Pos
DECL|CAN_MSR_RXM|macro|CAN_MSR_RXM
DECL|CAN_MSR_RX_Msk|macro|CAN_MSR_RX_Msk
DECL|CAN_MSR_RX_Pos|macro|CAN_MSR_RX_Pos
DECL|CAN_MSR_RX|macro|CAN_MSR_RX
DECL|CAN_MSR_SAMP_Msk|macro|CAN_MSR_SAMP_Msk
DECL|CAN_MSR_SAMP_Pos|macro|CAN_MSR_SAMP_Pos
DECL|CAN_MSR_SAMP|macro|CAN_MSR_SAMP
DECL|CAN_MSR_SLAKI_Msk|macro|CAN_MSR_SLAKI_Msk
DECL|CAN_MSR_SLAKI_Pos|macro|CAN_MSR_SLAKI_Pos
DECL|CAN_MSR_SLAKI|macro|CAN_MSR_SLAKI
DECL|CAN_MSR_SLAK_Msk|macro|CAN_MSR_SLAK_Msk
DECL|CAN_MSR_SLAK_Pos|macro|CAN_MSR_SLAK_Pos
DECL|CAN_MSR_SLAK|macro|CAN_MSR_SLAK
DECL|CAN_MSR_TXM_Msk|macro|CAN_MSR_TXM_Msk
DECL|CAN_MSR_TXM_Pos|macro|CAN_MSR_TXM_Pos
DECL|CAN_MSR_TXM|macro|CAN_MSR_TXM
DECL|CAN_MSR_WKUI_Msk|macro|CAN_MSR_WKUI_Msk
DECL|CAN_MSR_WKUI_Pos|macro|CAN_MSR_WKUI_Pos
DECL|CAN_MSR_WKUI|macro|CAN_MSR_WKUI
DECL|CAN_RDH0R_DATA4_Msk|macro|CAN_RDH0R_DATA4_Msk
DECL|CAN_RDH0R_DATA4_Pos|macro|CAN_RDH0R_DATA4_Pos
DECL|CAN_RDH0R_DATA4|macro|CAN_RDH0R_DATA4
DECL|CAN_RDH0R_DATA5_Msk|macro|CAN_RDH0R_DATA5_Msk
DECL|CAN_RDH0R_DATA5_Pos|macro|CAN_RDH0R_DATA5_Pos
DECL|CAN_RDH0R_DATA5|macro|CAN_RDH0R_DATA5
DECL|CAN_RDH0R_DATA6_Msk|macro|CAN_RDH0R_DATA6_Msk
DECL|CAN_RDH0R_DATA6_Pos|macro|CAN_RDH0R_DATA6_Pos
DECL|CAN_RDH0R_DATA6|macro|CAN_RDH0R_DATA6
DECL|CAN_RDH0R_DATA7_Msk|macro|CAN_RDH0R_DATA7_Msk
DECL|CAN_RDH0R_DATA7_Pos|macro|CAN_RDH0R_DATA7_Pos
DECL|CAN_RDH0R_DATA7|macro|CAN_RDH0R_DATA7
DECL|CAN_RDH1R_DATA4_Msk|macro|CAN_RDH1R_DATA4_Msk
DECL|CAN_RDH1R_DATA4_Pos|macro|CAN_RDH1R_DATA4_Pos
DECL|CAN_RDH1R_DATA4|macro|CAN_RDH1R_DATA4
DECL|CAN_RDH1R_DATA5_Msk|macro|CAN_RDH1R_DATA5_Msk
DECL|CAN_RDH1R_DATA5_Pos|macro|CAN_RDH1R_DATA5_Pos
DECL|CAN_RDH1R_DATA5|macro|CAN_RDH1R_DATA5
DECL|CAN_RDH1R_DATA6_Msk|macro|CAN_RDH1R_DATA6_Msk
DECL|CAN_RDH1R_DATA6_Pos|macro|CAN_RDH1R_DATA6_Pos
DECL|CAN_RDH1R_DATA6|macro|CAN_RDH1R_DATA6
DECL|CAN_RDH1R_DATA7_Msk|macro|CAN_RDH1R_DATA7_Msk
DECL|CAN_RDH1R_DATA7_Pos|macro|CAN_RDH1R_DATA7_Pos
DECL|CAN_RDH1R_DATA7|macro|CAN_RDH1R_DATA7
DECL|CAN_RDL0R_DATA0_Msk|macro|CAN_RDL0R_DATA0_Msk
DECL|CAN_RDL0R_DATA0_Pos|macro|CAN_RDL0R_DATA0_Pos
DECL|CAN_RDL0R_DATA0|macro|CAN_RDL0R_DATA0
DECL|CAN_RDL0R_DATA1_Msk|macro|CAN_RDL0R_DATA1_Msk
DECL|CAN_RDL0R_DATA1_Pos|macro|CAN_RDL0R_DATA1_Pos
DECL|CAN_RDL0R_DATA1|macro|CAN_RDL0R_DATA1
DECL|CAN_RDL0R_DATA2_Msk|macro|CAN_RDL0R_DATA2_Msk
DECL|CAN_RDL0R_DATA2_Pos|macro|CAN_RDL0R_DATA2_Pos
DECL|CAN_RDL0R_DATA2|macro|CAN_RDL0R_DATA2
DECL|CAN_RDL0R_DATA3_Msk|macro|CAN_RDL0R_DATA3_Msk
DECL|CAN_RDL0R_DATA3_Pos|macro|CAN_RDL0R_DATA3_Pos
DECL|CAN_RDL0R_DATA3|macro|CAN_RDL0R_DATA3
DECL|CAN_RDL1R_DATA0_Msk|macro|CAN_RDL1R_DATA0_Msk
DECL|CAN_RDL1R_DATA0_Pos|macro|CAN_RDL1R_DATA0_Pos
DECL|CAN_RDL1R_DATA0|macro|CAN_RDL1R_DATA0
DECL|CAN_RDL1R_DATA1_Msk|macro|CAN_RDL1R_DATA1_Msk
DECL|CAN_RDL1R_DATA1_Pos|macro|CAN_RDL1R_DATA1_Pos
DECL|CAN_RDL1R_DATA1|macro|CAN_RDL1R_DATA1
DECL|CAN_RDL1R_DATA2_Msk|macro|CAN_RDL1R_DATA2_Msk
DECL|CAN_RDL1R_DATA2_Pos|macro|CAN_RDL1R_DATA2_Pos
DECL|CAN_RDL1R_DATA2|macro|CAN_RDL1R_DATA2
DECL|CAN_RDL1R_DATA3_Msk|macro|CAN_RDL1R_DATA3_Msk
DECL|CAN_RDL1R_DATA3_Pos|macro|CAN_RDL1R_DATA3_Pos
DECL|CAN_RDL1R_DATA3|macro|CAN_RDL1R_DATA3
DECL|CAN_RDT0R_DLC_Msk|macro|CAN_RDT0R_DLC_Msk
DECL|CAN_RDT0R_DLC_Pos|macro|CAN_RDT0R_DLC_Pos
DECL|CAN_RDT0R_DLC|macro|CAN_RDT0R_DLC
DECL|CAN_RDT0R_FMI_Msk|macro|CAN_RDT0R_FMI_Msk
DECL|CAN_RDT0R_FMI_Pos|macro|CAN_RDT0R_FMI_Pos
DECL|CAN_RDT0R_FMI|macro|CAN_RDT0R_FMI
DECL|CAN_RDT0R_TIME_Msk|macro|CAN_RDT0R_TIME_Msk
DECL|CAN_RDT0R_TIME_Pos|macro|CAN_RDT0R_TIME_Pos
DECL|CAN_RDT0R_TIME|macro|CAN_RDT0R_TIME
DECL|CAN_RDT1R_DLC_Msk|macro|CAN_RDT1R_DLC_Msk
DECL|CAN_RDT1R_DLC_Pos|macro|CAN_RDT1R_DLC_Pos
DECL|CAN_RDT1R_DLC|macro|CAN_RDT1R_DLC
DECL|CAN_RDT1R_FMI_Msk|macro|CAN_RDT1R_FMI_Msk
DECL|CAN_RDT1R_FMI_Pos|macro|CAN_RDT1R_FMI_Pos
DECL|CAN_RDT1R_FMI|macro|CAN_RDT1R_FMI
DECL|CAN_RDT1R_TIME_Msk|macro|CAN_RDT1R_TIME_Msk
DECL|CAN_RDT1R_TIME_Pos|macro|CAN_RDT1R_TIME_Pos
DECL|CAN_RDT1R_TIME|macro|CAN_RDT1R_TIME
DECL|CAN_RF0R_FMP0_Msk|macro|CAN_RF0R_FMP0_Msk
DECL|CAN_RF0R_FMP0_Pos|macro|CAN_RF0R_FMP0_Pos
DECL|CAN_RF0R_FMP0|macro|CAN_RF0R_FMP0
DECL|CAN_RF0R_FOVR0_Msk|macro|CAN_RF0R_FOVR0_Msk
DECL|CAN_RF0R_FOVR0_Pos|macro|CAN_RF0R_FOVR0_Pos
DECL|CAN_RF0R_FOVR0|macro|CAN_RF0R_FOVR0
DECL|CAN_RF0R_FULL0_Msk|macro|CAN_RF0R_FULL0_Msk
DECL|CAN_RF0R_FULL0_Pos|macro|CAN_RF0R_FULL0_Pos
DECL|CAN_RF0R_FULL0|macro|CAN_RF0R_FULL0
DECL|CAN_RF0R_RFOM0_Msk|macro|CAN_RF0R_RFOM0_Msk
DECL|CAN_RF0R_RFOM0_Pos|macro|CAN_RF0R_RFOM0_Pos
DECL|CAN_RF0R_RFOM0|macro|CAN_RF0R_RFOM0
DECL|CAN_RF1R_FMP1_Msk|macro|CAN_RF1R_FMP1_Msk
DECL|CAN_RF1R_FMP1_Pos|macro|CAN_RF1R_FMP1_Pos
DECL|CAN_RF1R_FMP1|macro|CAN_RF1R_FMP1
DECL|CAN_RF1R_FOVR1_Msk|macro|CAN_RF1R_FOVR1_Msk
DECL|CAN_RF1R_FOVR1_Pos|macro|CAN_RF1R_FOVR1_Pos
DECL|CAN_RF1R_FOVR1|macro|CAN_RF1R_FOVR1
DECL|CAN_RF1R_FULL1_Msk|macro|CAN_RF1R_FULL1_Msk
DECL|CAN_RF1R_FULL1_Pos|macro|CAN_RF1R_FULL1_Pos
DECL|CAN_RF1R_FULL1|macro|CAN_RF1R_FULL1
DECL|CAN_RF1R_RFOM1_Msk|macro|CAN_RF1R_RFOM1_Msk
DECL|CAN_RF1R_RFOM1_Pos|macro|CAN_RF1R_RFOM1_Pos
DECL|CAN_RF1R_RFOM1|macro|CAN_RF1R_RFOM1
DECL|CAN_RI0R_EXID_Msk|macro|CAN_RI0R_EXID_Msk
DECL|CAN_RI0R_EXID_Pos|macro|CAN_RI0R_EXID_Pos
DECL|CAN_RI0R_EXID|macro|CAN_RI0R_EXID
DECL|CAN_RI0R_IDE_Msk|macro|CAN_RI0R_IDE_Msk
DECL|CAN_RI0R_IDE_Pos|macro|CAN_RI0R_IDE_Pos
DECL|CAN_RI0R_IDE|macro|CAN_RI0R_IDE
DECL|CAN_RI0R_RTR_Msk|macro|CAN_RI0R_RTR_Msk
DECL|CAN_RI0R_RTR_Pos|macro|CAN_RI0R_RTR_Pos
DECL|CAN_RI0R_RTR|macro|CAN_RI0R_RTR
DECL|CAN_RI0R_STID_Msk|macro|CAN_RI0R_STID_Msk
DECL|CAN_RI0R_STID_Pos|macro|CAN_RI0R_STID_Pos
DECL|CAN_RI0R_STID|macro|CAN_RI0R_STID
DECL|CAN_RI1R_EXID_Msk|macro|CAN_RI1R_EXID_Msk
DECL|CAN_RI1R_EXID_Pos|macro|CAN_RI1R_EXID_Pos
DECL|CAN_RI1R_EXID|macro|CAN_RI1R_EXID
DECL|CAN_RI1R_IDE_Msk|macro|CAN_RI1R_IDE_Msk
DECL|CAN_RI1R_IDE_Pos|macro|CAN_RI1R_IDE_Pos
DECL|CAN_RI1R_IDE|macro|CAN_RI1R_IDE
DECL|CAN_RI1R_RTR_Msk|macro|CAN_RI1R_RTR_Msk
DECL|CAN_RI1R_RTR_Pos|macro|CAN_RI1R_RTR_Pos
DECL|CAN_RI1R_RTR|macro|CAN_RI1R_RTR
DECL|CAN_RI1R_STID_Msk|macro|CAN_RI1R_STID_Msk
DECL|CAN_RI1R_STID_Pos|macro|CAN_RI1R_STID_Pos
DECL|CAN_RI1R_STID|macro|CAN_RI1R_STID
DECL|CAN_TDH0R_DATA4_Msk|macro|CAN_TDH0R_DATA4_Msk
DECL|CAN_TDH0R_DATA4_Pos|macro|CAN_TDH0R_DATA4_Pos
DECL|CAN_TDH0R_DATA4|macro|CAN_TDH0R_DATA4
DECL|CAN_TDH0R_DATA5_Msk|macro|CAN_TDH0R_DATA5_Msk
DECL|CAN_TDH0R_DATA5_Pos|macro|CAN_TDH0R_DATA5_Pos
DECL|CAN_TDH0R_DATA5|macro|CAN_TDH0R_DATA5
DECL|CAN_TDH0R_DATA6_Msk|macro|CAN_TDH0R_DATA6_Msk
DECL|CAN_TDH0R_DATA6_Pos|macro|CAN_TDH0R_DATA6_Pos
DECL|CAN_TDH0R_DATA6|macro|CAN_TDH0R_DATA6
DECL|CAN_TDH0R_DATA7_Msk|macro|CAN_TDH0R_DATA7_Msk
DECL|CAN_TDH0R_DATA7_Pos|macro|CAN_TDH0R_DATA7_Pos
DECL|CAN_TDH0R_DATA7|macro|CAN_TDH0R_DATA7
DECL|CAN_TDH1R_DATA4_Msk|macro|CAN_TDH1R_DATA4_Msk
DECL|CAN_TDH1R_DATA4_Pos|macro|CAN_TDH1R_DATA4_Pos
DECL|CAN_TDH1R_DATA4|macro|CAN_TDH1R_DATA4
DECL|CAN_TDH1R_DATA5_Msk|macro|CAN_TDH1R_DATA5_Msk
DECL|CAN_TDH1R_DATA5_Pos|macro|CAN_TDH1R_DATA5_Pos
DECL|CAN_TDH1R_DATA5|macro|CAN_TDH1R_DATA5
DECL|CAN_TDH1R_DATA6_Msk|macro|CAN_TDH1R_DATA6_Msk
DECL|CAN_TDH1R_DATA6_Pos|macro|CAN_TDH1R_DATA6_Pos
DECL|CAN_TDH1R_DATA6|macro|CAN_TDH1R_DATA6
DECL|CAN_TDH1R_DATA7_Msk|macro|CAN_TDH1R_DATA7_Msk
DECL|CAN_TDH1R_DATA7_Pos|macro|CAN_TDH1R_DATA7_Pos
DECL|CAN_TDH1R_DATA7|macro|CAN_TDH1R_DATA7
DECL|CAN_TDH2R_DATA4_Msk|macro|CAN_TDH2R_DATA4_Msk
DECL|CAN_TDH2R_DATA4_Pos|macro|CAN_TDH2R_DATA4_Pos
DECL|CAN_TDH2R_DATA4|macro|CAN_TDH2R_DATA4
DECL|CAN_TDH2R_DATA5_Msk|macro|CAN_TDH2R_DATA5_Msk
DECL|CAN_TDH2R_DATA5_Pos|macro|CAN_TDH2R_DATA5_Pos
DECL|CAN_TDH2R_DATA5|macro|CAN_TDH2R_DATA5
DECL|CAN_TDH2R_DATA6_Msk|macro|CAN_TDH2R_DATA6_Msk
DECL|CAN_TDH2R_DATA6_Pos|macro|CAN_TDH2R_DATA6_Pos
DECL|CAN_TDH2R_DATA6|macro|CAN_TDH2R_DATA6
DECL|CAN_TDH2R_DATA7_Msk|macro|CAN_TDH2R_DATA7_Msk
DECL|CAN_TDH2R_DATA7_Pos|macro|CAN_TDH2R_DATA7_Pos
DECL|CAN_TDH2R_DATA7|macro|CAN_TDH2R_DATA7
DECL|CAN_TDL0R_DATA0_Msk|macro|CAN_TDL0R_DATA0_Msk
DECL|CAN_TDL0R_DATA0_Pos|macro|CAN_TDL0R_DATA0_Pos
DECL|CAN_TDL0R_DATA0|macro|CAN_TDL0R_DATA0
DECL|CAN_TDL0R_DATA1_Msk|macro|CAN_TDL0R_DATA1_Msk
DECL|CAN_TDL0R_DATA1_Pos|macro|CAN_TDL0R_DATA1_Pos
DECL|CAN_TDL0R_DATA1|macro|CAN_TDL0R_DATA1
DECL|CAN_TDL0R_DATA2_Msk|macro|CAN_TDL0R_DATA2_Msk
DECL|CAN_TDL0R_DATA2_Pos|macro|CAN_TDL0R_DATA2_Pos
DECL|CAN_TDL0R_DATA2|macro|CAN_TDL0R_DATA2
DECL|CAN_TDL0R_DATA3_Msk|macro|CAN_TDL0R_DATA3_Msk
DECL|CAN_TDL0R_DATA3_Pos|macro|CAN_TDL0R_DATA3_Pos
DECL|CAN_TDL0R_DATA3|macro|CAN_TDL0R_DATA3
DECL|CAN_TDL1R_DATA0_Msk|macro|CAN_TDL1R_DATA0_Msk
DECL|CAN_TDL1R_DATA0_Pos|macro|CAN_TDL1R_DATA0_Pos
DECL|CAN_TDL1R_DATA0|macro|CAN_TDL1R_DATA0
DECL|CAN_TDL1R_DATA1_Msk|macro|CAN_TDL1R_DATA1_Msk
DECL|CAN_TDL1R_DATA1_Pos|macro|CAN_TDL1R_DATA1_Pos
DECL|CAN_TDL1R_DATA1|macro|CAN_TDL1R_DATA1
DECL|CAN_TDL1R_DATA2_Msk|macro|CAN_TDL1R_DATA2_Msk
DECL|CAN_TDL1R_DATA2_Pos|macro|CAN_TDL1R_DATA2_Pos
DECL|CAN_TDL1R_DATA2|macro|CAN_TDL1R_DATA2
DECL|CAN_TDL1R_DATA3_Msk|macro|CAN_TDL1R_DATA3_Msk
DECL|CAN_TDL1R_DATA3_Pos|macro|CAN_TDL1R_DATA3_Pos
DECL|CAN_TDL1R_DATA3|macro|CAN_TDL1R_DATA3
DECL|CAN_TDL2R_DATA0_Msk|macro|CAN_TDL2R_DATA0_Msk
DECL|CAN_TDL2R_DATA0_Pos|macro|CAN_TDL2R_DATA0_Pos
DECL|CAN_TDL2R_DATA0|macro|CAN_TDL2R_DATA0
DECL|CAN_TDL2R_DATA1_Msk|macro|CAN_TDL2R_DATA1_Msk
DECL|CAN_TDL2R_DATA1_Pos|macro|CAN_TDL2R_DATA1_Pos
DECL|CAN_TDL2R_DATA1|macro|CAN_TDL2R_DATA1
DECL|CAN_TDL2R_DATA2_Msk|macro|CAN_TDL2R_DATA2_Msk
DECL|CAN_TDL2R_DATA2_Pos|macro|CAN_TDL2R_DATA2_Pos
DECL|CAN_TDL2R_DATA2|macro|CAN_TDL2R_DATA2
DECL|CAN_TDL2R_DATA3_Msk|macro|CAN_TDL2R_DATA3_Msk
DECL|CAN_TDL2R_DATA3_Pos|macro|CAN_TDL2R_DATA3_Pos
DECL|CAN_TDL2R_DATA3|macro|CAN_TDL2R_DATA3
DECL|CAN_TDT0R_DLC_Msk|macro|CAN_TDT0R_DLC_Msk
DECL|CAN_TDT0R_DLC_Pos|macro|CAN_TDT0R_DLC_Pos
DECL|CAN_TDT0R_DLC|macro|CAN_TDT0R_DLC
DECL|CAN_TDT0R_TGT_Msk|macro|CAN_TDT0R_TGT_Msk
DECL|CAN_TDT0R_TGT_Pos|macro|CAN_TDT0R_TGT_Pos
DECL|CAN_TDT0R_TGT|macro|CAN_TDT0R_TGT
DECL|CAN_TDT0R_TIME_Msk|macro|CAN_TDT0R_TIME_Msk
DECL|CAN_TDT0R_TIME_Pos|macro|CAN_TDT0R_TIME_Pos
DECL|CAN_TDT0R_TIME|macro|CAN_TDT0R_TIME
DECL|CAN_TDT1R_DLC_Msk|macro|CAN_TDT1R_DLC_Msk
DECL|CAN_TDT1R_DLC_Pos|macro|CAN_TDT1R_DLC_Pos
DECL|CAN_TDT1R_DLC|macro|CAN_TDT1R_DLC
DECL|CAN_TDT1R_TGT_Msk|macro|CAN_TDT1R_TGT_Msk
DECL|CAN_TDT1R_TGT_Pos|macro|CAN_TDT1R_TGT_Pos
DECL|CAN_TDT1R_TGT|macro|CAN_TDT1R_TGT
DECL|CAN_TDT1R_TIME_Msk|macro|CAN_TDT1R_TIME_Msk
DECL|CAN_TDT1R_TIME_Pos|macro|CAN_TDT1R_TIME_Pos
DECL|CAN_TDT1R_TIME|macro|CAN_TDT1R_TIME
DECL|CAN_TDT2R_DLC_Msk|macro|CAN_TDT2R_DLC_Msk
DECL|CAN_TDT2R_DLC_Pos|macro|CAN_TDT2R_DLC_Pos
DECL|CAN_TDT2R_DLC|macro|CAN_TDT2R_DLC
DECL|CAN_TDT2R_TGT_Msk|macro|CAN_TDT2R_TGT_Msk
DECL|CAN_TDT2R_TGT_Pos|macro|CAN_TDT2R_TGT_Pos
DECL|CAN_TDT2R_TGT|macro|CAN_TDT2R_TGT
DECL|CAN_TDT2R_TIME_Msk|macro|CAN_TDT2R_TIME_Msk
DECL|CAN_TDT2R_TIME_Pos|macro|CAN_TDT2R_TIME_Pos
DECL|CAN_TDT2R_TIME|macro|CAN_TDT2R_TIME
DECL|CAN_TI0R_EXID_Msk|macro|CAN_TI0R_EXID_Msk
DECL|CAN_TI0R_EXID_Pos|macro|CAN_TI0R_EXID_Pos
DECL|CAN_TI0R_EXID|macro|CAN_TI0R_EXID
DECL|CAN_TI0R_IDE_Msk|macro|CAN_TI0R_IDE_Msk
DECL|CAN_TI0R_IDE_Pos|macro|CAN_TI0R_IDE_Pos
DECL|CAN_TI0R_IDE|macro|CAN_TI0R_IDE
DECL|CAN_TI0R_RTR_Msk|macro|CAN_TI0R_RTR_Msk
DECL|CAN_TI0R_RTR_Pos|macro|CAN_TI0R_RTR_Pos
DECL|CAN_TI0R_RTR|macro|CAN_TI0R_RTR
DECL|CAN_TI0R_STID_Msk|macro|CAN_TI0R_STID_Msk
DECL|CAN_TI0R_STID_Pos|macro|CAN_TI0R_STID_Pos
DECL|CAN_TI0R_STID|macro|CAN_TI0R_STID
DECL|CAN_TI0R_TXRQ_Msk|macro|CAN_TI0R_TXRQ_Msk
DECL|CAN_TI0R_TXRQ_Pos|macro|CAN_TI0R_TXRQ_Pos
DECL|CAN_TI0R_TXRQ|macro|CAN_TI0R_TXRQ
DECL|CAN_TI1R_EXID_Msk|macro|CAN_TI1R_EXID_Msk
DECL|CAN_TI1R_EXID_Pos|macro|CAN_TI1R_EXID_Pos
DECL|CAN_TI1R_EXID|macro|CAN_TI1R_EXID
DECL|CAN_TI1R_IDE_Msk|macro|CAN_TI1R_IDE_Msk
DECL|CAN_TI1R_IDE_Pos|macro|CAN_TI1R_IDE_Pos
DECL|CAN_TI1R_IDE|macro|CAN_TI1R_IDE
DECL|CAN_TI1R_RTR_Msk|macro|CAN_TI1R_RTR_Msk
DECL|CAN_TI1R_RTR_Pos|macro|CAN_TI1R_RTR_Pos
DECL|CAN_TI1R_RTR|macro|CAN_TI1R_RTR
DECL|CAN_TI1R_STID_Msk|macro|CAN_TI1R_STID_Msk
DECL|CAN_TI1R_STID_Pos|macro|CAN_TI1R_STID_Pos
DECL|CAN_TI1R_STID|macro|CAN_TI1R_STID
DECL|CAN_TI1R_TXRQ_Msk|macro|CAN_TI1R_TXRQ_Msk
DECL|CAN_TI1R_TXRQ_Pos|macro|CAN_TI1R_TXRQ_Pos
DECL|CAN_TI1R_TXRQ|macro|CAN_TI1R_TXRQ
DECL|CAN_TI2R_EXID_Msk|macro|CAN_TI2R_EXID_Msk
DECL|CAN_TI2R_EXID_Pos|macro|CAN_TI2R_EXID_Pos
DECL|CAN_TI2R_EXID|macro|CAN_TI2R_EXID
DECL|CAN_TI2R_IDE_Msk|macro|CAN_TI2R_IDE_Msk
DECL|CAN_TI2R_IDE_Pos|macro|CAN_TI2R_IDE_Pos
DECL|CAN_TI2R_IDE|macro|CAN_TI2R_IDE
DECL|CAN_TI2R_RTR_Msk|macro|CAN_TI2R_RTR_Msk
DECL|CAN_TI2R_RTR_Pos|macro|CAN_TI2R_RTR_Pos
DECL|CAN_TI2R_RTR|macro|CAN_TI2R_RTR
DECL|CAN_TI2R_STID_Msk|macro|CAN_TI2R_STID_Msk
DECL|CAN_TI2R_STID_Pos|macro|CAN_TI2R_STID_Pos
DECL|CAN_TI2R_STID|macro|CAN_TI2R_STID
DECL|CAN_TI2R_TXRQ_Msk|macro|CAN_TI2R_TXRQ_Msk
DECL|CAN_TI2R_TXRQ_Pos|macro|CAN_TI2R_TXRQ_Pos
DECL|CAN_TI2R_TXRQ|macro|CAN_TI2R_TXRQ
DECL|CAN_TSR_ABRQ0_Msk|macro|CAN_TSR_ABRQ0_Msk
DECL|CAN_TSR_ABRQ0_Pos|macro|CAN_TSR_ABRQ0_Pos
DECL|CAN_TSR_ABRQ0|macro|CAN_TSR_ABRQ0
DECL|CAN_TSR_ABRQ1_Msk|macro|CAN_TSR_ABRQ1_Msk
DECL|CAN_TSR_ABRQ1_Pos|macro|CAN_TSR_ABRQ1_Pos
DECL|CAN_TSR_ABRQ1|macro|CAN_TSR_ABRQ1
DECL|CAN_TSR_ABRQ2_Msk|macro|CAN_TSR_ABRQ2_Msk
DECL|CAN_TSR_ABRQ2_Pos|macro|CAN_TSR_ABRQ2_Pos
DECL|CAN_TSR_ABRQ2|macro|CAN_TSR_ABRQ2
DECL|CAN_TSR_ALST0_Msk|macro|CAN_TSR_ALST0_Msk
DECL|CAN_TSR_ALST0_Pos|macro|CAN_TSR_ALST0_Pos
DECL|CAN_TSR_ALST0|macro|CAN_TSR_ALST0
DECL|CAN_TSR_ALST1_Msk|macro|CAN_TSR_ALST1_Msk
DECL|CAN_TSR_ALST1_Pos|macro|CAN_TSR_ALST1_Pos
DECL|CAN_TSR_ALST1|macro|CAN_TSR_ALST1
DECL|CAN_TSR_ALST2_Msk|macro|CAN_TSR_ALST2_Msk
DECL|CAN_TSR_ALST2_Pos|macro|CAN_TSR_ALST2_Pos
DECL|CAN_TSR_ALST2|macro|CAN_TSR_ALST2
DECL|CAN_TSR_CODE_Msk|macro|CAN_TSR_CODE_Msk
DECL|CAN_TSR_CODE_Pos|macro|CAN_TSR_CODE_Pos
DECL|CAN_TSR_CODE|macro|CAN_TSR_CODE
DECL|CAN_TSR_LOW0_Msk|macro|CAN_TSR_LOW0_Msk
DECL|CAN_TSR_LOW0_Pos|macro|CAN_TSR_LOW0_Pos
DECL|CAN_TSR_LOW0|macro|CAN_TSR_LOW0
DECL|CAN_TSR_LOW1_Msk|macro|CAN_TSR_LOW1_Msk
DECL|CAN_TSR_LOW1_Pos|macro|CAN_TSR_LOW1_Pos
DECL|CAN_TSR_LOW1|macro|CAN_TSR_LOW1
DECL|CAN_TSR_LOW2_Msk|macro|CAN_TSR_LOW2_Msk
DECL|CAN_TSR_LOW2_Pos|macro|CAN_TSR_LOW2_Pos
DECL|CAN_TSR_LOW2|macro|CAN_TSR_LOW2
DECL|CAN_TSR_LOW_Msk|macro|CAN_TSR_LOW_Msk
DECL|CAN_TSR_LOW_Pos|macro|CAN_TSR_LOW_Pos
DECL|CAN_TSR_LOW|macro|CAN_TSR_LOW
DECL|CAN_TSR_RQCP0_Msk|macro|CAN_TSR_RQCP0_Msk
DECL|CAN_TSR_RQCP0_Pos|macro|CAN_TSR_RQCP0_Pos
DECL|CAN_TSR_RQCP0|macro|CAN_TSR_RQCP0
DECL|CAN_TSR_RQCP1_Msk|macro|CAN_TSR_RQCP1_Msk
DECL|CAN_TSR_RQCP1_Pos|macro|CAN_TSR_RQCP1_Pos
DECL|CAN_TSR_RQCP1|macro|CAN_TSR_RQCP1
DECL|CAN_TSR_RQCP2_Msk|macro|CAN_TSR_RQCP2_Msk
DECL|CAN_TSR_RQCP2_Pos|macro|CAN_TSR_RQCP2_Pos
DECL|CAN_TSR_RQCP2|macro|CAN_TSR_RQCP2
DECL|CAN_TSR_TERR0_Msk|macro|CAN_TSR_TERR0_Msk
DECL|CAN_TSR_TERR0_Pos|macro|CAN_TSR_TERR0_Pos
DECL|CAN_TSR_TERR0|macro|CAN_TSR_TERR0
DECL|CAN_TSR_TERR1_Msk|macro|CAN_TSR_TERR1_Msk
DECL|CAN_TSR_TERR1_Pos|macro|CAN_TSR_TERR1_Pos
DECL|CAN_TSR_TERR1|macro|CAN_TSR_TERR1
DECL|CAN_TSR_TERR2_Msk|macro|CAN_TSR_TERR2_Msk
DECL|CAN_TSR_TERR2_Pos|macro|CAN_TSR_TERR2_Pos
DECL|CAN_TSR_TERR2|macro|CAN_TSR_TERR2
DECL|CAN_TSR_TME0_Msk|macro|CAN_TSR_TME0_Msk
DECL|CAN_TSR_TME0_Pos|macro|CAN_TSR_TME0_Pos
DECL|CAN_TSR_TME0|macro|CAN_TSR_TME0
DECL|CAN_TSR_TME1_Msk|macro|CAN_TSR_TME1_Msk
DECL|CAN_TSR_TME1_Pos|macro|CAN_TSR_TME1_Pos
DECL|CAN_TSR_TME1|macro|CAN_TSR_TME1
DECL|CAN_TSR_TME2_Msk|macro|CAN_TSR_TME2_Msk
DECL|CAN_TSR_TME2_Pos|macro|CAN_TSR_TME2_Pos
DECL|CAN_TSR_TME2|macro|CAN_TSR_TME2
DECL|CAN_TSR_TME_Msk|macro|CAN_TSR_TME_Msk
DECL|CAN_TSR_TME_Pos|macro|CAN_TSR_TME_Pos
DECL|CAN_TSR_TME|macro|CAN_TSR_TME
DECL|CAN_TSR_TXOK0_Msk|macro|CAN_TSR_TXOK0_Msk
DECL|CAN_TSR_TXOK0_Pos|macro|CAN_TSR_TXOK0_Pos
DECL|CAN_TSR_TXOK0|macro|CAN_TSR_TXOK0
DECL|CAN_TSR_TXOK1_Msk|macro|CAN_TSR_TXOK1_Msk
DECL|CAN_TSR_TXOK1_Pos|macro|CAN_TSR_TXOK1_Pos
DECL|CAN_TSR_TXOK1|macro|CAN_TSR_TXOK1
DECL|CAN_TSR_TXOK2_Msk|macro|CAN_TSR_TXOK2_Msk
DECL|CAN_TSR_TXOK2_Pos|macro|CAN_TSR_TXOK2_Pos
DECL|CAN_TSR_TXOK2|macro|CAN_TSR_TXOK2
DECL|CAN_TxMailBox_TypeDef|typedef|} CAN_TxMailBox_TypeDef;
DECL|CAN_TypeDef|typedef|} CAN_TypeDef;
DECL|CCER|member|__IO uint32_t CCER; /*!< TIM capture/compare enable register, Address offset: 0x20 */
DECL|CCMR1|member|__IO uint32_t CCMR1; /*!< TIM capture/compare mode register 1, Address offset: 0x18 */
DECL|CCMR2|member|__IO uint32_t CCMR2; /*!< TIM capture/compare mode register 2, Address offset: 0x1C */
DECL|CCMR3|member|__IO uint32_t CCMR3; /*!< TIM capture/compare mode register 3, Address offset: 0x54 */
DECL|CCR1|member|__IO uint32_t CCR1; /*!< TIM capture/compare register 1, Address offset: 0x34 */
DECL|CCR2|member|__IO uint32_t CCR2; /*!< TIM capture/compare register 2, Address offset: 0x38 */
DECL|CCR3|member|__IO uint32_t CCR3; /*!< TIM capture/compare register 3, Address offset: 0x3C */
DECL|CCR4|member|__IO uint32_t CCR4; /*!< TIM capture/compare register 4, Address offset: 0x40 */
DECL|CCR5|member|__IO uint32_t CCR5; /*!< TIM capture/compare mode register5, Address offset: 0x58 */
DECL|CCR6|member|__IO uint32_t CCR6; /*!< TIM capture/compare mode register6, Address offset: 0x5C */
DECL|CCR|member|__IO uint32_t CCR; /*!< ADC common control register, Address offset: ADC1 base address + 0x304 */
DECL|CCR|member|__IO uint32_t CCR; /*!< QUADSPI Communication Configuration register, Address offset: 0x14 */
DECL|CDR|member|__IO uint32_t CDR; /*!< ADC common regular data register for dual
DECL|CFGR|member|__IO uint32_t CFGR; /*!< LPTIM Configuration register, Address offset: 0x0C */
DECL|CFGR|member|__IO uint32_t CFGR; /*!< RCC clock configuration register, Address offset: 0x08 */
DECL|CFR|member|__IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */
DECL|CID|member|__IO uint32_t CID; /*!< User ID Register 03Ch */
DECL|CIR|member|__IO uint32_t CIR; /*!< RCC clock interrupt register, Address offset: 0x0C */
DECL|CLKCR|member|__IO uint32_t CLKCR; /*!< SDMMClock control register, Address offset: 0x04 */
DECL|CLRFR|member|__IO uint32_t CLRFR; /*!< SAI block x clear flag register, Address offset: 0x1C */
DECL|CMD|member|__IO uint32_t CMD; /*!< SDMMC command register, Address offset: 0x0C */
DECL|CMPCR|member|__IO uint32_t CMPCR; /*!< SYSCFG Compensation cell control register, Address offset: 0x20 */
DECL|CMP|member|__IO uint32_t CMP; /*!< LPTIM Compare register, Address offset: 0x14 */
DECL|CNT|member|__IO uint32_t CNT; /*!< LPTIM Counter register, Address offset: 0x1C */
DECL|CNT|member|__IO uint32_t CNT; /*!< TIM counter register, Address offset: 0x24 */
DECL|CR1|member|__IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04 */
DECL|CR1|member|__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */
DECL|CR1|member|__IO uint32_t CR1; /*!< PWR power control register 1, Address offset: 0x00 */
DECL|CR1|member|__IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */
DECL|CR1|member|__IO uint32_t CR1; /*!< SPI control register 1 (not used in I2S mode), Address offset: 0x00 */
DECL|CR1|member|__IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */
DECL|CR1|member|__IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */
DECL|CR2|member|__IO uint32_t CR2; /*!< ADC control register 2, Address offset: 0x08 */
DECL|CR2|member|__IO uint32_t CR2; /*!< I2C Control register 2, Address offset: 0x04 */
DECL|CR2|member|__IO uint32_t CR2; /*!< PWR power control register 2, Address offset: 0x08 */
DECL|CR2|member|__IO uint32_t CR2; /*!< SAI block x configuration register 2, Address offset: 0x08 */
DECL|CR2|member|__IO uint32_t CR2; /*!< SPI control register 2, Address offset: 0x04 */
DECL|CR2|member|__IO uint32_t CR2; /*!< TIM control register 2, Address offset: 0x04 */
DECL|CR2|member|__IO uint32_t CR2; /*!< USART Control register 2, Address offset: 0x04 */
DECL|CR3|member|__IO uint32_t CR3; /*!< USART Control register 3, Address offset: 0x08 */
DECL|CRCPR|member|__IO uint32_t CRCPR; /*!< SPI CRC polynomial register (not used in I2S mode), Address offset: 0x10 */
DECL|CRC_BASE|macro|CRC_BASE
DECL|CRC_CR_POLYSIZE_0|macro|CRC_CR_POLYSIZE_0
DECL|CRC_CR_POLYSIZE_1|macro|CRC_CR_POLYSIZE_1
DECL|CRC_CR_POLYSIZE_Msk|macro|CRC_CR_POLYSIZE_Msk
DECL|CRC_CR_POLYSIZE_Pos|macro|CRC_CR_POLYSIZE_Pos
DECL|CRC_CR_POLYSIZE|macro|CRC_CR_POLYSIZE
DECL|CRC_CR_RESET_Msk|macro|CRC_CR_RESET_Msk
DECL|CRC_CR_RESET_Pos|macro|CRC_CR_RESET_Pos
DECL|CRC_CR_RESET|macro|CRC_CR_RESET
DECL|CRC_CR_REV_IN_0|macro|CRC_CR_REV_IN_0
DECL|CRC_CR_REV_IN_1|macro|CRC_CR_REV_IN_1
DECL|CRC_CR_REV_IN_Msk|macro|CRC_CR_REV_IN_Msk
DECL|CRC_CR_REV_IN_Pos|macro|CRC_CR_REV_IN_Pos
DECL|CRC_CR_REV_IN|macro|CRC_CR_REV_IN
DECL|CRC_CR_REV_OUT_Msk|macro|CRC_CR_REV_OUT_Msk
DECL|CRC_CR_REV_OUT_Pos|macro|CRC_CR_REV_OUT_Pos
DECL|CRC_CR_REV_OUT|macro|CRC_CR_REV_OUT
DECL|CRC_DR_DR_Msk|macro|CRC_DR_DR_Msk
DECL|CRC_DR_DR_Pos|macro|CRC_DR_DR_Pos
DECL|CRC_DR_DR|macro|CRC_DR_DR
DECL|CRC_IDR_IDR_Msk|macro|CRC_IDR_IDR_Msk
DECL|CRC_IDR_IDR_Pos|macro|CRC_IDR_IDR_Pos
DECL|CRC_IDR_IDR|macro|CRC_IDR_IDR
DECL|CRC_INIT_INIT_Msk|macro|CRC_INIT_INIT_Msk
DECL|CRC_INIT_INIT_Pos|macro|CRC_INIT_INIT_Pos
DECL|CRC_INIT_INIT|macro|CRC_INIT_INIT
DECL|CRC_POL_POL_Msk|macro|CRC_POL_POL_Msk
DECL|CRC_POL_POL_Pos|macro|CRC_POL_POL_Pos
DECL|CRC_POL_POL|macro|CRC_POL_POL
DECL|CRC_TypeDef|typedef|} CRC_TypeDef;
DECL|CRC|macro|CRC
DECL|CR|member|__IO uint32_t CR; /*!< AES control register, Address offset: 0x00 */
DECL|CR|member|__IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */
DECL|CR|member|__IO uint32_t CR; /*!< DAC control register, Address offset: 0x00 */
DECL|CR|member|__IO uint32_t CR; /*!< DMA stream x configuration register */
DECL|CR|member|__IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */
DECL|CR|member|__IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */
DECL|CR|member|__IO uint32_t CR; /*!< LPTIM Control register, Address offset: 0x10 */
DECL|CR|member|__IO uint32_t CR; /*!< QUADSPI Control register, Address offset: 0x00 */
DECL|CR|member|__IO uint32_t CR; /*!< RCC clock control register, Address offset: 0x00 */
DECL|CR|member|__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
DECL|CR|member|__IO uint32_t CR; /*!< RTC control register, Address offset: 0x08 */
DECL|CR|member|__IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */
DECL|CSR1|member|__IO uint32_t CSR1; /*!< PWR power control/status register 2, Address offset: 0x04 */
DECL|CSR2|member|__IO uint32_t CSR2; /*!< PWR power control/status register 2, Address offset: 0x0C */
DECL|CSR|member|__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base address + 0x300 */
DECL|CSR|member|__IO uint32_t CSR; /*!< RCC clock control & status register, Address offset: 0x74 */
DECL|DAC1|macro|DAC1
DECL|DAC_BASE|macro|DAC_BASE
DECL|DAC_CR_BOFF1_Msk|macro|DAC_CR_BOFF1_Msk
DECL|DAC_CR_BOFF1_Pos|macro|DAC_CR_BOFF1_Pos
DECL|DAC_CR_BOFF1|macro|DAC_CR_BOFF1
DECL|DAC_CR_BOFF2_Msk|macro|DAC_CR_BOFF2_Msk
DECL|DAC_CR_BOFF2_Pos|macro|DAC_CR_BOFF2_Pos
DECL|DAC_CR_BOFF2|macro|DAC_CR_BOFF2
DECL|DAC_CR_DMAEN1_Msk|macro|DAC_CR_DMAEN1_Msk
DECL|DAC_CR_DMAEN1_Pos|macro|DAC_CR_DMAEN1_Pos
DECL|DAC_CR_DMAEN1|macro|DAC_CR_DMAEN1
DECL|DAC_CR_DMAEN2_Msk|macro|DAC_CR_DMAEN2_Msk
DECL|DAC_CR_DMAEN2_Pos|macro|DAC_CR_DMAEN2_Pos
DECL|DAC_CR_DMAEN2|macro|DAC_CR_DMAEN2
DECL|DAC_CR_DMAUDRIE1_Msk|macro|DAC_CR_DMAUDRIE1_Msk
DECL|DAC_CR_DMAUDRIE1_Pos|macro|DAC_CR_DMAUDRIE1_Pos
DECL|DAC_CR_DMAUDRIE1|macro|DAC_CR_DMAUDRIE1
DECL|DAC_CR_DMAUDRIE2_Msk|macro|DAC_CR_DMAUDRIE2_Msk
DECL|DAC_CR_DMAUDRIE2_Pos|macro|DAC_CR_DMAUDRIE2_Pos
DECL|DAC_CR_DMAUDRIE2|macro|DAC_CR_DMAUDRIE2
DECL|DAC_CR_EN1_Msk|macro|DAC_CR_EN1_Msk
DECL|DAC_CR_EN1_Pos|macro|DAC_CR_EN1_Pos
DECL|DAC_CR_EN1|macro|DAC_CR_EN1
DECL|DAC_CR_EN2_Msk|macro|DAC_CR_EN2_Msk
DECL|DAC_CR_EN2_Pos|macro|DAC_CR_EN2_Pos
DECL|DAC_CR_EN2|macro|DAC_CR_EN2
DECL|DAC_CR_MAMP1_0|macro|DAC_CR_MAMP1_0
DECL|DAC_CR_MAMP1_1|macro|DAC_CR_MAMP1_1
DECL|DAC_CR_MAMP1_2|macro|DAC_CR_MAMP1_2
DECL|DAC_CR_MAMP1_3|macro|DAC_CR_MAMP1_3
DECL|DAC_CR_MAMP1_Msk|macro|DAC_CR_MAMP1_Msk
DECL|DAC_CR_MAMP1_Pos|macro|DAC_CR_MAMP1_Pos
DECL|DAC_CR_MAMP1|macro|DAC_CR_MAMP1
DECL|DAC_CR_MAMP2_0|macro|DAC_CR_MAMP2_0
DECL|DAC_CR_MAMP2_1|macro|DAC_CR_MAMP2_1
DECL|DAC_CR_MAMP2_2|macro|DAC_CR_MAMP2_2
DECL|DAC_CR_MAMP2_3|macro|DAC_CR_MAMP2_3
DECL|DAC_CR_MAMP2_Msk|macro|DAC_CR_MAMP2_Msk
DECL|DAC_CR_MAMP2_Pos|macro|DAC_CR_MAMP2_Pos
DECL|DAC_CR_MAMP2|macro|DAC_CR_MAMP2
DECL|DAC_CR_TEN1_Msk|macro|DAC_CR_TEN1_Msk
DECL|DAC_CR_TEN1_Pos|macro|DAC_CR_TEN1_Pos
DECL|DAC_CR_TEN1|macro|DAC_CR_TEN1
DECL|DAC_CR_TEN2_Msk|macro|DAC_CR_TEN2_Msk
DECL|DAC_CR_TEN2_Pos|macro|DAC_CR_TEN2_Pos
DECL|DAC_CR_TEN2|macro|DAC_CR_TEN2
DECL|DAC_CR_TSEL1_0|macro|DAC_CR_TSEL1_0
DECL|DAC_CR_TSEL1_1|macro|DAC_CR_TSEL1_1
DECL|DAC_CR_TSEL1_2|macro|DAC_CR_TSEL1_2
DECL|DAC_CR_TSEL1_Msk|macro|DAC_CR_TSEL1_Msk
DECL|DAC_CR_TSEL1_Pos|macro|DAC_CR_TSEL1_Pos
DECL|DAC_CR_TSEL1|macro|DAC_CR_TSEL1
DECL|DAC_CR_TSEL2_0|macro|DAC_CR_TSEL2_0
DECL|DAC_CR_TSEL2_1|macro|DAC_CR_TSEL2_1
DECL|DAC_CR_TSEL2_2|macro|DAC_CR_TSEL2_2
DECL|DAC_CR_TSEL2_Msk|macro|DAC_CR_TSEL2_Msk
DECL|DAC_CR_TSEL2_Pos|macro|DAC_CR_TSEL2_Pos
DECL|DAC_CR_TSEL2|macro|DAC_CR_TSEL2
DECL|DAC_CR_WAVE1_0|macro|DAC_CR_WAVE1_0
DECL|DAC_CR_WAVE1_1|macro|DAC_CR_WAVE1_1
DECL|DAC_CR_WAVE1_Msk|macro|DAC_CR_WAVE1_Msk
DECL|DAC_CR_WAVE1_Pos|macro|DAC_CR_WAVE1_Pos
DECL|DAC_CR_WAVE1|macro|DAC_CR_WAVE1
DECL|DAC_CR_WAVE2_0|macro|DAC_CR_WAVE2_0
DECL|DAC_CR_WAVE2_1|macro|DAC_CR_WAVE2_1
DECL|DAC_CR_WAVE2_Msk|macro|DAC_CR_WAVE2_Msk
DECL|DAC_CR_WAVE2_Pos|macro|DAC_CR_WAVE2_Pos
DECL|DAC_CR_WAVE2|macro|DAC_CR_WAVE2
DECL|DAC_DHR12L1_DACC1DHR_Msk|macro|DAC_DHR12L1_DACC1DHR_Msk
DECL|DAC_DHR12L1_DACC1DHR_Pos|macro|DAC_DHR12L1_DACC1DHR_Pos
DECL|DAC_DHR12L1_DACC1DHR|macro|DAC_DHR12L1_DACC1DHR
DECL|DAC_DHR12L2_DACC2DHR_Msk|macro|DAC_DHR12L2_DACC2DHR_Msk
DECL|DAC_DHR12L2_DACC2DHR_Pos|macro|DAC_DHR12L2_DACC2DHR_Pos
DECL|DAC_DHR12L2_DACC2DHR|macro|DAC_DHR12L2_DACC2DHR
DECL|DAC_DHR12LD_DACC1DHR_Msk|macro|DAC_DHR12LD_DACC1DHR_Msk
DECL|DAC_DHR12LD_DACC1DHR_Pos|macro|DAC_DHR12LD_DACC1DHR_Pos
DECL|DAC_DHR12LD_DACC1DHR|macro|DAC_DHR12LD_DACC1DHR
DECL|DAC_DHR12LD_DACC2DHR_Msk|macro|DAC_DHR12LD_DACC2DHR_Msk
DECL|DAC_DHR12LD_DACC2DHR_Pos|macro|DAC_DHR12LD_DACC2DHR_Pos
DECL|DAC_DHR12LD_DACC2DHR|macro|DAC_DHR12LD_DACC2DHR
DECL|DAC_DHR12R1_DACC1DHR_Msk|macro|DAC_DHR12R1_DACC1DHR_Msk
DECL|DAC_DHR12R1_DACC1DHR_Pos|macro|DAC_DHR12R1_DACC1DHR_Pos
DECL|DAC_DHR12R1_DACC1DHR|macro|DAC_DHR12R1_DACC1DHR
DECL|DAC_DHR12R2_DACC2DHR_Msk|macro|DAC_DHR12R2_DACC2DHR_Msk
DECL|DAC_DHR12R2_DACC2DHR_Pos|macro|DAC_DHR12R2_DACC2DHR_Pos
DECL|DAC_DHR12R2_DACC2DHR|macro|DAC_DHR12R2_DACC2DHR
DECL|DAC_DHR12RD_DACC1DHR_Msk|macro|DAC_DHR12RD_DACC1DHR_Msk
DECL|DAC_DHR12RD_DACC1DHR_Pos|macro|DAC_DHR12RD_DACC1DHR_Pos
DECL|DAC_DHR12RD_DACC1DHR|macro|DAC_DHR12RD_DACC1DHR
DECL|DAC_DHR12RD_DACC2DHR_Msk|macro|DAC_DHR12RD_DACC2DHR_Msk
DECL|DAC_DHR12RD_DACC2DHR_Pos|macro|DAC_DHR12RD_DACC2DHR_Pos
DECL|DAC_DHR12RD_DACC2DHR|macro|DAC_DHR12RD_DACC2DHR
DECL|DAC_DHR8R1_DACC1DHR_Msk|macro|DAC_DHR8R1_DACC1DHR_Msk
DECL|DAC_DHR8R1_DACC1DHR_Pos|macro|DAC_DHR8R1_DACC1DHR_Pos
DECL|DAC_DHR8R1_DACC1DHR|macro|DAC_DHR8R1_DACC1DHR
DECL|DAC_DHR8R2_DACC2DHR_Msk|macro|DAC_DHR8R2_DACC2DHR_Msk
DECL|DAC_DHR8R2_DACC2DHR_Pos|macro|DAC_DHR8R2_DACC2DHR_Pos
DECL|DAC_DHR8R2_DACC2DHR|macro|DAC_DHR8R2_DACC2DHR
DECL|DAC_DHR8RD_DACC1DHR_Msk|macro|DAC_DHR8RD_DACC1DHR_Msk
DECL|DAC_DHR8RD_DACC1DHR_Pos|macro|DAC_DHR8RD_DACC1DHR_Pos
DECL|DAC_DHR8RD_DACC1DHR|macro|DAC_DHR8RD_DACC1DHR
DECL|DAC_DHR8RD_DACC2DHR_Msk|macro|DAC_DHR8RD_DACC2DHR_Msk
DECL|DAC_DHR8RD_DACC2DHR_Pos|macro|DAC_DHR8RD_DACC2DHR_Pos
DECL|DAC_DHR8RD_DACC2DHR|macro|DAC_DHR8RD_DACC2DHR
DECL|DAC_DOR1_DACC1DOR_Msk|macro|DAC_DOR1_DACC1DOR_Msk
DECL|DAC_DOR1_DACC1DOR_Pos|macro|DAC_DOR1_DACC1DOR_Pos
DECL|DAC_DOR1_DACC1DOR|macro|DAC_DOR1_DACC1DOR
DECL|DAC_DOR2_DACC2DOR_Msk|macro|DAC_DOR2_DACC2DOR_Msk
DECL|DAC_DOR2_DACC2DOR_Pos|macro|DAC_DOR2_DACC2DOR_Pos
DECL|DAC_DOR2_DACC2DOR|macro|DAC_DOR2_DACC2DOR
DECL|DAC_SR_DMAUDR1_Msk|macro|DAC_SR_DMAUDR1_Msk
DECL|DAC_SR_DMAUDR1_Pos|macro|DAC_SR_DMAUDR1_Pos
DECL|DAC_SR_DMAUDR1|macro|DAC_SR_DMAUDR1
DECL|DAC_SR_DMAUDR2_Msk|macro|DAC_SR_DMAUDR2_Msk
DECL|DAC_SR_DMAUDR2_Pos|macro|DAC_SR_DMAUDR2_Pos
DECL|DAC_SR_DMAUDR2|macro|DAC_SR_DMAUDR2
DECL|DAC_SWTRIGR_SWTRIG1_Msk|macro|DAC_SWTRIGR_SWTRIG1_Msk
DECL|DAC_SWTRIGR_SWTRIG1_Pos|macro|DAC_SWTRIGR_SWTRIG1_Pos
DECL|DAC_SWTRIGR_SWTRIG1|macro|DAC_SWTRIGR_SWTRIG1
DECL|DAC_SWTRIGR_SWTRIG2_Msk|macro|DAC_SWTRIGR_SWTRIG2_Msk
DECL|DAC_SWTRIGR_SWTRIG2_Pos|macro|DAC_SWTRIGR_SWTRIG2_Pos
DECL|DAC_SWTRIGR_SWTRIG2|macro|DAC_SWTRIGR_SWTRIG2
DECL|DAC_TypeDef|typedef|} DAC_TypeDef;
DECL|DAC|macro|DAC
DECL|DAINTMSK|member|__IO uint32_t DAINTMSK; /*!< dev All Endpoints Itr Mask 81Ch */
DECL|DAINT|member|__IO uint32_t DAINT; /*!< dev All Endpoints Itr Reg 818h */
DECL|DBGMCU_APB1_FZ_DBG_CAN1_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_CAN1_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_CAN1_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_CAN1_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_CAN1_STOP|macro|DBGMCU_APB1_FZ_DBG_CAN1_STOP
DECL|DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT_Msk|macro|DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT_Msk
DECL|DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT_Pos|macro|DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT_Pos
DECL|DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT|macro|DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT
DECL|DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT_Msk|macro|DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT_Msk
DECL|DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT_Pos|macro|DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT_Pos
DECL|DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT|macro|DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT
DECL|DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT_Msk|macro|DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT_Msk
DECL|DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT_Pos|macro|DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT_Pos
DECL|DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT|macro|DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT
DECL|DBGMCU_APB1_FZ_DBG_IWDG_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_IWDG_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_IWDG_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_IWDG_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_IWDG_STOP|macro|DBGMCU_APB1_FZ_DBG_IWDG_STOP
DECL|DBGMCU_APB1_FZ_DBG_LPTIM1_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_LPTIM1_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_LPTIM1_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_LPTIM1_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_LPTIM1_STOP|macro|DBGMCU_APB1_FZ_DBG_LPTIM1_STOP
DECL|DBGMCU_APB1_FZ_DBG_RTC_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_RTC_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_RTC_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_RTC_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_RTC_STOP|macro|DBGMCU_APB1_FZ_DBG_RTC_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM12_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM12_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM12_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM12_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM12_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM12_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM13_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM13_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM13_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM13_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM13_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM13_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM14_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM14_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM14_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM14_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM14_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM14_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM2_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM2_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM2_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM2_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM2_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM2_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM3_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM3_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM3_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM3_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM3_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM3_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM4_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM4_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM4_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM4_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM4_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM4_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM5_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM5_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM5_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM5_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM5_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM5_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM6_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM6_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM6_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM6_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM6_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM6_STOP
DECL|DBGMCU_APB1_FZ_DBG_TIM7_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_TIM7_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_TIM7_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_TIM7_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_TIM7_STOP|macro|DBGMCU_APB1_FZ_DBG_TIM7_STOP
DECL|DBGMCU_APB1_FZ_DBG_WWDG_STOP_Msk|macro|DBGMCU_APB1_FZ_DBG_WWDG_STOP_Msk
DECL|DBGMCU_APB1_FZ_DBG_WWDG_STOP_Pos|macro|DBGMCU_APB1_FZ_DBG_WWDG_STOP_Pos
DECL|DBGMCU_APB1_FZ_DBG_WWDG_STOP|macro|DBGMCU_APB1_FZ_DBG_WWDG_STOP
DECL|DBGMCU_APB2_FZ_DBG_TIM10_STOP_Msk|macro|DBGMCU_APB2_FZ_DBG_TIM10_STOP_Msk
DECL|DBGMCU_APB2_FZ_DBG_TIM10_STOP_Pos|macro|DBGMCU_APB2_FZ_DBG_TIM10_STOP_Pos
DECL|DBGMCU_APB2_FZ_DBG_TIM10_STOP|macro|DBGMCU_APB2_FZ_DBG_TIM10_STOP
DECL|DBGMCU_APB2_FZ_DBG_TIM11_STOP_Msk|macro|DBGMCU_APB2_FZ_DBG_TIM11_STOP_Msk
DECL|DBGMCU_APB2_FZ_DBG_TIM11_STOP_Pos|macro|DBGMCU_APB2_FZ_DBG_TIM11_STOP_Pos
DECL|DBGMCU_APB2_FZ_DBG_TIM11_STOP|macro|DBGMCU_APB2_FZ_DBG_TIM11_STOP
DECL|DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk|macro|DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk
DECL|DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos|macro|DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos
DECL|DBGMCU_APB2_FZ_DBG_TIM1_STOP|macro|DBGMCU_APB2_FZ_DBG_TIM1_STOP
DECL|DBGMCU_APB2_FZ_DBG_TIM8_STOP_Msk|macro|DBGMCU_APB2_FZ_DBG_TIM8_STOP_Msk
DECL|DBGMCU_APB2_FZ_DBG_TIM8_STOP_Pos|macro|DBGMCU_APB2_FZ_DBG_TIM8_STOP_Pos
DECL|DBGMCU_APB2_FZ_DBG_TIM8_STOP|macro|DBGMCU_APB2_FZ_DBG_TIM8_STOP
DECL|DBGMCU_APB2_FZ_DBG_TIM9_STOP_Msk|macro|DBGMCU_APB2_FZ_DBG_TIM9_STOP_Msk
DECL|DBGMCU_APB2_FZ_DBG_TIM9_STOP_Pos|macro|DBGMCU_APB2_FZ_DBG_TIM9_STOP_Pos
DECL|DBGMCU_APB2_FZ_DBG_TIM9_STOP|macro|DBGMCU_APB2_FZ_DBG_TIM9_STOP
DECL|DBGMCU_BASE|macro|DBGMCU_BASE
DECL|DBGMCU_CR_DBG_SLEEP_Msk|macro|DBGMCU_CR_DBG_SLEEP_Msk
DECL|DBGMCU_CR_DBG_SLEEP_Pos|macro|DBGMCU_CR_DBG_SLEEP_Pos
DECL|DBGMCU_CR_DBG_SLEEP|macro|DBGMCU_CR_DBG_SLEEP
DECL|DBGMCU_CR_DBG_STANDBY_Msk|macro|DBGMCU_CR_DBG_STANDBY_Msk
DECL|DBGMCU_CR_DBG_STANDBY_Pos|macro|DBGMCU_CR_DBG_STANDBY_Pos
DECL|DBGMCU_CR_DBG_STANDBY|macro|DBGMCU_CR_DBG_STANDBY
DECL|DBGMCU_CR_DBG_STOP_Msk|macro|DBGMCU_CR_DBG_STOP_Msk
DECL|DBGMCU_CR_DBG_STOP_Pos|macro|DBGMCU_CR_DBG_STOP_Pos
DECL|DBGMCU_CR_DBG_STOP|macro|DBGMCU_CR_DBG_STOP
DECL|DBGMCU_CR_TRACE_IOEN_Msk|macro|DBGMCU_CR_TRACE_IOEN_Msk
DECL|DBGMCU_CR_TRACE_IOEN_Pos|macro|DBGMCU_CR_TRACE_IOEN_Pos
DECL|DBGMCU_CR_TRACE_IOEN|macro|DBGMCU_CR_TRACE_IOEN
DECL|DBGMCU_CR_TRACE_MODE_0|macro|DBGMCU_CR_TRACE_MODE_0
DECL|DBGMCU_CR_TRACE_MODE_1|macro|DBGMCU_CR_TRACE_MODE_1
DECL|DBGMCU_CR_TRACE_MODE_Msk|macro|DBGMCU_CR_TRACE_MODE_Msk
DECL|DBGMCU_CR_TRACE_MODE_Pos|macro|DBGMCU_CR_TRACE_MODE_Pos
DECL|DBGMCU_CR_TRACE_MODE|macro|DBGMCU_CR_TRACE_MODE
DECL|DBGMCU_IDCODE_DEV_ID_Msk|macro|DBGMCU_IDCODE_DEV_ID_Msk
DECL|DBGMCU_IDCODE_DEV_ID_Pos|macro|DBGMCU_IDCODE_DEV_ID_Pos
DECL|DBGMCU_IDCODE_DEV_ID|macro|DBGMCU_IDCODE_DEV_ID
DECL|DBGMCU_IDCODE_REV_ID_Msk|macro|DBGMCU_IDCODE_REV_ID_Msk
DECL|DBGMCU_IDCODE_REV_ID_Pos|macro|DBGMCU_IDCODE_REV_ID_Pos
DECL|DBGMCU_IDCODE_REV_ID|macro|DBGMCU_IDCODE_REV_ID
DECL|DBGMCU_TypeDef|typedef|}DBGMCU_TypeDef;
DECL|DBGMCU|macro|DBGMCU
DECL|DCFG|member|__IO uint32_t DCFG; /*!< dev Configuration Register 800h */
DECL|DCKCFGR1|member|__IO uint32_t DCKCFGR1; /*!< RCC Dedicated Clocks configuration register1, Address offset: 0x8C */
DECL|DCKCFGR2|member|__IO uint32_t DCKCFGR2; /*!< RCC Dedicated Clocks configuration register 2, Address offset: 0x90 */
DECL|DCOUNT|member|__I uint32_t DCOUNT; /*!< SDMMC data counter register, Address offset: 0x30 */
DECL|DCR|member|__IO uint32_t DCR; /*!< QUADSPI Device Configuration register, Address offset: 0x04 */
DECL|DCR|member|__IO uint32_t DCR; /*!< TIM DMA control register, Address offset: 0x48 */
DECL|DCTL|member|__IO uint32_t DCTL; /*!< dev Control Register 804h */
DECL|DCTRL|member|__IO uint32_t DCTRL; /*!< SDMMC data control register, Address offset: 0x2C */
DECL|DEACHINT|member|__IO uint32_t DEACHINT; /*!< dedicated EP interrupt 838h */
DECL|DEACHMSK|member|__IO uint32_t DEACHMSK; /*!< dedicated EP msk 83Ch */
DECL|DHR12L1|member|__IO uint32_t DHR12L1; /*!< DAC channel1 12-bit left aligned data holding register, Address offset: 0x0C */
DECL|DHR12L2|member|__IO uint32_t DHR12L2; /*!< DAC channel2 12-bit left aligned data holding register, Address offset: 0x18 */
DECL|DHR12LD|member|__IO uint32_t DHR12LD; /*!< DUAL DAC 12-bit left aligned data holding register, Address offset: 0x24 */
DECL|DHR12R1|member|__IO uint32_t DHR12R1; /*!< DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08 */
DECL|DHR12R2|member|__IO uint32_t DHR12R2; /*!< DAC channel2 12-bit right aligned data holding register, Address offset: 0x14 */
DECL|DHR12RD|member|__IO uint32_t DHR12RD; /*!< Dual DAC 12-bit right-aligned data holding register, Address offset: 0x20 */
DECL|DHR8R1|member|__IO uint32_t DHR8R1; /*!< DAC channel1 8-bit right aligned data holding register, Address offset: 0x10 */
DECL|DHR8R2|member|__IO uint32_t DHR8R2; /*!< DAC channel2 8-bit right-aligned data holding register, Address offset: 0x1C */
DECL|DHR8RD|member|__IO uint32_t DHR8RD; /*!< DUAL DAC 8-bit right aligned data holding register, Address offset: 0x28 */
DECL|DIEPCTL|member|__IO uint32_t DIEPCTL; /*!< dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h */
DECL|DIEPDMA|member|__IO uint32_t DIEPDMA; /*!< IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h */
DECL|DIEPEMPMSK|member|__IO uint32_t DIEPEMPMSK; /*!< dev empty msk 834h */
DECL|DIEPINT|member|__IO uint32_t DIEPINT; /*!< dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h */
DECL|DIEPMSK|member|__IO uint32_t DIEPMSK; /*!< dev IN Endpoint Mask 810h */
DECL|DIEPTSIZ|member|__IO uint32_t DIEPTSIZ; /*!< IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h */
DECL|DIEPTXF0_HNPTXFSIZ|member|__IO uint32_t DIEPTXF0_HNPTXFSIZ; /*!< EP0 / Non Periodic Tx FIFO Size Register 028h */
DECL|DIEPTXF|member|__IO uint32_t DIEPTXF[0x0F]; /*!< dev Periodic Transmit FIFO */
DECL|DIER|member|__IO uint32_t DIER; /*!< TIM DMA/interrupt enable register, Address offset: 0x0C */
DECL|DINEP1MSK|member|__IO uint32_t DINEP1MSK; /*!< dedicated EP mask 844h */
DECL|DINR|member|__IO uint32_t DINR; /*!< AES data input register, Address offset: 0x08 */
DECL|DLEN|member|__IO uint32_t DLEN; /*!< SDMMC data length register, Address offset: 0x28 */
DECL|DLR|member|__IO uint32_t DLR; /*!< QUADSPI Data Length register, Address offset: 0x10 */
DECL|DMA1_BASE|macro|DMA1_BASE
DECL|DMA1_Stream0_BASE|macro|DMA1_Stream0_BASE
DECL|DMA1_Stream0_IRQn|enumerator|DMA1_Stream0_IRQn = 11, /*!< DMA1 Stream 0 global Interrupt */
DECL|DMA1_Stream0|macro|DMA1_Stream0
DECL|DMA1_Stream1_BASE|macro|DMA1_Stream1_BASE
DECL|DMA1_Stream1_IRQn|enumerator|DMA1_Stream1_IRQn = 12, /*!< DMA1 Stream 1 global Interrupt */
DECL|DMA1_Stream1|macro|DMA1_Stream1
DECL|DMA1_Stream2_BASE|macro|DMA1_Stream2_BASE
DECL|DMA1_Stream2_IRQn|enumerator|DMA1_Stream2_IRQn = 13, /*!< DMA1 Stream 2 global Interrupt */
DECL|DMA1_Stream2|macro|DMA1_Stream2
DECL|DMA1_Stream3_BASE|macro|DMA1_Stream3_BASE
DECL|DMA1_Stream3_IRQn|enumerator|DMA1_Stream3_IRQn = 14, /*!< DMA1 Stream 3 global Interrupt */
DECL|DMA1_Stream3|macro|DMA1_Stream3
DECL|DMA1_Stream4_BASE|macro|DMA1_Stream4_BASE
DECL|DMA1_Stream4_IRQn|enumerator|DMA1_Stream4_IRQn = 15, /*!< DMA1 Stream 4 global Interrupt */
DECL|DMA1_Stream4|macro|DMA1_Stream4
DECL|DMA1_Stream5_BASE|macro|DMA1_Stream5_BASE
DECL|DMA1_Stream5_IRQn|enumerator|DMA1_Stream5_IRQn = 16, /*!< DMA1 Stream 5 global Interrupt */
DECL|DMA1_Stream5|macro|DMA1_Stream5
DECL|DMA1_Stream6_BASE|macro|DMA1_Stream6_BASE
DECL|DMA1_Stream6_IRQn|enumerator|DMA1_Stream6_IRQn = 17, /*!< DMA1 Stream 6 global Interrupt */
DECL|DMA1_Stream6|macro|DMA1_Stream6
DECL|DMA1_Stream7_BASE|macro|DMA1_Stream7_BASE
DECL|DMA1_Stream7_IRQn|enumerator|DMA1_Stream7_IRQn = 47, /*!< DMA1 Stream7 Interrupt */
DECL|DMA1_Stream7|macro|DMA1_Stream7
DECL|DMA1|macro|DMA1
DECL|DMA2_BASE|macro|DMA2_BASE
DECL|DMA2_Stream0_BASE|macro|DMA2_Stream0_BASE
DECL|DMA2_Stream0_IRQn|enumerator|DMA2_Stream0_IRQn = 56, /*!< DMA2 Stream 0 global Interrupt */
DECL|DMA2_Stream0|macro|DMA2_Stream0
DECL|DMA2_Stream1_BASE|macro|DMA2_Stream1_BASE
DECL|DMA2_Stream1_IRQn|enumerator|DMA2_Stream1_IRQn = 57, /*!< DMA2 Stream 1 global Interrupt */
DECL|DMA2_Stream1|macro|DMA2_Stream1
DECL|DMA2_Stream2_BASE|macro|DMA2_Stream2_BASE
DECL|DMA2_Stream2_IRQn|enumerator|DMA2_Stream2_IRQn = 58, /*!< DMA2 Stream 2 global Interrupt */
DECL|DMA2_Stream2|macro|DMA2_Stream2
DECL|DMA2_Stream3_BASE|macro|DMA2_Stream3_BASE
DECL|DMA2_Stream3_IRQn|enumerator|DMA2_Stream3_IRQn = 59, /*!< DMA2 Stream 3 global Interrupt */
DECL|DMA2_Stream3|macro|DMA2_Stream3
DECL|DMA2_Stream4_BASE|macro|DMA2_Stream4_BASE
DECL|DMA2_Stream4_IRQn|enumerator|DMA2_Stream4_IRQn = 60, /*!< DMA2 Stream 4 global Interrupt */
DECL|DMA2_Stream4|macro|DMA2_Stream4
DECL|DMA2_Stream5_BASE|macro|DMA2_Stream5_BASE
DECL|DMA2_Stream5_IRQn|enumerator|DMA2_Stream5_IRQn = 68, /*!< DMA2 Stream 5 global interrupt */
DECL|DMA2_Stream5|macro|DMA2_Stream5
DECL|DMA2_Stream6_BASE|macro|DMA2_Stream6_BASE
DECL|DMA2_Stream6_IRQn|enumerator|DMA2_Stream6_IRQn = 69, /*!< DMA2 Stream 6 global interrupt */
DECL|DMA2_Stream6|macro|DMA2_Stream6
DECL|DMA2_Stream7_BASE|macro|DMA2_Stream7_BASE
DECL|DMA2_Stream7_IRQn|enumerator|DMA2_Stream7_IRQn = 70, /*!< DMA2 Stream 7 global interrupt */
DECL|DMA2_Stream7|macro|DMA2_Stream7
DECL|DMA2|macro|DMA2
DECL|DMAR|member|__IO uint32_t DMAR; /*!< TIM DMA address for full transfer, Address offset: 0x4C */
DECL|DMA_HIFCR_CDMEIF4_Msk|macro|DMA_HIFCR_CDMEIF4_Msk
DECL|DMA_HIFCR_CDMEIF4_Pos|macro|DMA_HIFCR_CDMEIF4_Pos
DECL|DMA_HIFCR_CDMEIF4|macro|DMA_HIFCR_CDMEIF4
DECL|DMA_HIFCR_CDMEIF5_Msk|macro|DMA_HIFCR_CDMEIF5_Msk
DECL|DMA_HIFCR_CDMEIF5_Pos|macro|DMA_HIFCR_CDMEIF5_Pos
DECL|DMA_HIFCR_CDMEIF5|macro|DMA_HIFCR_CDMEIF5
DECL|DMA_HIFCR_CDMEIF6_Msk|macro|DMA_HIFCR_CDMEIF6_Msk
DECL|DMA_HIFCR_CDMEIF6_Pos|macro|DMA_HIFCR_CDMEIF6_Pos
DECL|DMA_HIFCR_CDMEIF6|macro|DMA_HIFCR_CDMEIF6
DECL|DMA_HIFCR_CDMEIF7_Msk|macro|DMA_HIFCR_CDMEIF7_Msk
DECL|DMA_HIFCR_CDMEIF7_Pos|macro|DMA_HIFCR_CDMEIF7_Pos
DECL|DMA_HIFCR_CDMEIF7|macro|DMA_HIFCR_CDMEIF7
DECL|DMA_HIFCR_CFEIF4_Msk|macro|DMA_HIFCR_CFEIF4_Msk
DECL|DMA_HIFCR_CFEIF4_Pos|macro|DMA_HIFCR_CFEIF4_Pos
DECL|DMA_HIFCR_CFEIF4|macro|DMA_HIFCR_CFEIF4
DECL|DMA_HIFCR_CFEIF5_Msk|macro|DMA_HIFCR_CFEIF5_Msk
DECL|DMA_HIFCR_CFEIF5_Pos|macro|DMA_HIFCR_CFEIF5_Pos
DECL|DMA_HIFCR_CFEIF5|macro|DMA_HIFCR_CFEIF5
DECL|DMA_HIFCR_CFEIF6_Msk|macro|DMA_HIFCR_CFEIF6_Msk
DECL|DMA_HIFCR_CFEIF6_Pos|macro|DMA_HIFCR_CFEIF6_Pos
DECL|DMA_HIFCR_CFEIF6|macro|DMA_HIFCR_CFEIF6
DECL|DMA_HIFCR_CFEIF7_Msk|macro|DMA_HIFCR_CFEIF7_Msk
DECL|DMA_HIFCR_CFEIF7_Pos|macro|DMA_HIFCR_CFEIF7_Pos
DECL|DMA_HIFCR_CFEIF7|macro|DMA_HIFCR_CFEIF7
DECL|DMA_HIFCR_CHTIF4_Msk|macro|DMA_HIFCR_CHTIF4_Msk
DECL|DMA_HIFCR_CHTIF4_Pos|macro|DMA_HIFCR_CHTIF4_Pos
DECL|DMA_HIFCR_CHTIF4|macro|DMA_HIFCR_CHTIF4
DECL|DMA_HIFCR_CHTIF5_Msk|macro|DMA_HIFCR_CHTIF5_Msk
DECL|DMA_HIFCR_CHTIF5_Pos|macro|DMA_HIFCR_CHTIF5_Pos
DECL|DMA_HIFCR_CHTIF5|macro|DMA_HIFCR_CHTIF5
DECL|DMA_HIFCR_CHTIF6_Msk|macro|DMA_HIFCR_CHTIF6_Msk
DECL|DMA_HIFCR_CHTIF6_Pos|macro|DMA_HIFCR_CHTIF6_Pos
DECL|DMA_HIFCR_CHTIF6|macro|DMA_HIFCR_CHTIF6
DECL|DMA_HIFCR_CHTIF7_Msk|macro|DMA_HIFCR_CHTIF7_Msk
DECL|DMA_HIFCR_CHTIF7_Pos|macro|DMA_HIFCR_CHTIF7_Pos
DECL|DMA_HIFCR_CHTIF7|macro|DMA_HIFCR_CHTIF7
DECL|DMA_HIFCR_CTCIF4_Msk|macro|DMA_HIFCR_CTCIF4_Msk
DECL|DMA_HIFCR_CTCIF4_Pos|macro|DMA_HIFCR_CTCIF4_Pos
DECL|DMA_HIFCR_CTCIF4|macro|DMA_HIFCR_CTCIF4
DECL|DMA_HIFCR_CTCIF5_Msk|macro|DMA_HIFCR_CTCIF5_Msk
DECL|DMA_HIFCR_CTCIF5_Pos|macro|DMA_HIFCR_CTCIF5_Pos
DECL|DMA_HIFCR_CTCIF5|macro|DMA_HIFCR_CTCIF5
DECL|DMA_HIFCR_CTCIF6_Msk|macro|DMA_HIFCR_CTCIF6_Msk
DECL|DMA_HIFCR_CTCIF6_Pos|macro|DMA_HIFCR_CTCIF6_Pos
DECL|DMA_HIFCR_CTCIF6|macro|DMA_HIFCR_CTCIF6
DECL|DMA_HIFCR_CTCIF7_Msk|macro|DMA_HIFCR_CTCIF7_Msk
DECL|DMA_HIFCR_CTCIF7_Pos|macro|DMA_HIFCR_CTCIF7_Pos
DECL|DMA_HIFCR_CTCIF7|macro|DMA_HIFCR_CTCIF7
DECL|DMA_HIFCR_CTEIF4_Msk|macro|DMA_HIFCR_CTEIF4_Msk
DECL|DMA_HIFCR_CTEIF4_Pos|macro|DMA_HIFCR_CTEIF4_Pos
DECL|DMA_HIFCR_CTEIF4|macro|DMA_HIFCR_CTEIF4
DECL|DMA_HIFCR_CTEIF5_Msk|macro|DMA_HIFCR_CTEIF5_Msk
DECL|DMA_HIFCR_CTEIF5_Pos|macro|DMA_HIFCR_CTEIF5_Pos
DECL|DMA_HIFCR_CTEIF5|macro|DMA_HIFCR_CTEIF5
DECL|DMA_HIFCR_CTEIF6_Msk|macro|DMA_HIFCR_CTEIF6_Msk
DECL|DMA_HIFCR_CTEIF6_Pos|macro|DMA_HIFCR_CTEIF6_Pos
DECL|DMA_HIFCR_CTEIF6|macro|DMA_HIFCR_CTEIF6
DECL|DMA_HIFCR_CTEIF7_Msk|macro|DMA_HIFCR_CTEIF7_Msk
DECL|DMA_HIFCR_CTEIF7_Pos|macro|DMA_HIFCR_CTEIF7_Pos
DECL|DMA_HIFCR_CTEIF7|macro|DMA_HIFCR_CTEIF7
DECL|DMA_HISR_DMEIF4_Msk|macro|DMA_HISR_DMEIF4_Msk
DECL|DMA_HISR_DMEIF4_Pos|macro|DMA_HISR_DMEIF4_Pos
DECL|DMA_HISR_DMEIF4|macro|DMA_HISR_DMEIF4
DECL|DMA_HISR_DMEIF5_Msk|macro|DMA_HISR_DMEIF5_Msk
DECL|DMA_HISR_DMEIF5_Pos|macro|DMA_HISR_DMEIF5_Pos
DECL|DMA_HISR_DMEIF5|macro|DMA_HISR_DMEIF5
DECL|DMA_HISR_DMEIF6_Msk|macro|DMA_HISR_DMEIF6_Msk
DECL|DMA_HISR_DMEIF6_Pos|macro|DMA_HISR_DMEIF6_Pos
DECL|DMA_HISR_DMEIF6|macro|DMA_HISR_DMEIF6
DECL|DMA_HISR_DMEIF7_Msk|macro|DMA_HISR_DMEIF7_Msk
DECL|DMA_HISR_DMEIF7_Pos|macro|DMA_HISR_DMEIF7_Pos
DECL|DMA_HISR_DMEIF7|macro|DMA_HISR_DMEIF7
DECL|DMA_HISR_FEIF4_Msk|macro|DMA_HISR_FEIF4_Msk
DECL|DMA_HISR_FEIF4_Pos|macro|DMA_HISR_FEIF4_Pos
DECL|DMA_HISR_FEIF4|macro|DMA_HISR_FEIF4
DECL|DMA_HISR_FEIF5_Msk|macro|DMA_HISR_FEIF5_Msk
DECL|DMA_HISR_FEIF5_Pos|macro|DMA_HISR_FEIF5_Pos
DECL|DMA_HISR_FEIF5|macro|DMA_HISR_FEIF5
DECL|DMA_HISR_FEIF6_Msk|macro|DMA_HISR_FEIF6_Msk
DECL|DMA_HISR_FEIF6_Pos|macro|DMA_HISR_FEIF6_Pos
DECL|DMA_HISR_FEIF6|macro|DMA_HISR_FEIF6
DECL|DMA_HISR_FEIF7_Msk|macro|DMA_HISR_FEIF7_Msk
DECL|DMA_HISR_FEIF7_Pos|macro|DMA_HISR_FEIF7_Pos
DECL|DMA_HISR_FEIF7|macro|DMA_HISR_FEIF7
DECL|DMA_HISR_HTIF4_Msk|macro|DMA_HISR_HTIF4_Msk
DECL|DMA_HISR_HTIF4_Pos|macro|DMA_HISR_HTIF4_Pos
DECL|DMA_HISR_HTIF4|macro|DMA_HISR_HTIF4
DECL|DMA_HISR_HTIF5_Msk|macro|DMA_HISR_HTIF5_Msk
DECL|DMA_HISR_HTIF5_Pos|macro|DMA_HISR_HTIF5_Pos
DECL|DMA_HISR_HTIF5|macro|DMA_HISR_HTIF5
DECL|DMA_HISR_HTIF6_Msk|macro|DMA_HISR_HTIF6_Msk
DECL|DMA_HISR_HTIF6_Pos|macro|DMA_HISR_HTIF6_Pos
DECL|DMA_HISR_HTIF6|macro|DMA_HISR_HTIF6
DECL|DMA_HISR_HTIF7_Msk|macro|DMA_HISR_HTIF7_Msk
DECL|DMA_HISR_HTIF7_Pos|macro|DMA_HISR_HTIF7_Pos
DECL|DMA_HISR_HTIF7|macro|DMA_HISR_HTIF7
DECL|DMA_HISR_TCIF4_Msk|macro|DMA_HISR_TCIF4_Msk
DECL|DMA_HISR_TCIF4_Pos|macro|DMA_HISR_TCIF4_Pos
DECL|DMA_HISR_TCIF4|macro|DMA_HISR_TCIF4
DECL|DMA_HISR_TCIF5_Msk|macro|DMA_HISR_TCIF5_Msk
DECL|DMA_HISR_TCIF5_Pos|macro|DMA_HISR_TCIF5_Pos
DECL|DMA_HISR_TCIF5|macro|DMA_HISR_TCIF5
DECL|DMA_HISR_TCIF6_Msk|macro|DMA_HISR_TCIF6_Msk
DECL|DMA_HISR_TCIF6_Pos|macro|DMA_HISR_TCIF6_Pos
DECL|DMA_HISR_TCIF6|macro|DMA_HISR_TCIF6
DECL|DMA_HISR_TCIF7_Msk|macro|DMA_HISR_TCIF7_Msk
DECL|DMA_HISR_TCIF7_Pos|macro|DMA_HISR_TCIF7_Pos
DECL|DMA_HISR_TCIF7|macro|DMA_HISR_TCIF7
DECL|DMA_HISR_TEIF4_Msk|macro|DMA_HISR_TEIF4_Msk
DECL|DMA_HISR_TEIF4_Pos|macro|DMA_HISR_TEIF4_Pos
DECL|DMA_HISR_TEIF4|macro|DMA_HISR_TEIF4
DECL|DMA_HISR_TEIF5_Msk|macro|DMA_HISR_TEIF5_Msk
DECL|DMA_HISR_TEIF5_Pos|macro|DMA_HISR_TEIF5_Pos
DECL|DMA_HISR_TEIF5|macro|DMA_HISR_TEIF5
DECL|DMA_HISR_TEIF6_Msk|macro|DMA_HISR_TEIF6_Msk
DECL|DMA_HISR_TEIF6_Pos|macro|DMA_HISR_TEIF6_Pos
DECL|DMA_HISR_TEIF6|macro|DMA_HISR_TEIF6
DECL|DMA_HISR_TEIF7_Msk|macro|DMA_HISR_TEIF7_Msk
DECL|DMA_HISR_TEIF7_Pos|macro|DMA_HISR_TEIF7_Pos
DECL|DMA_HISR_TEIF7|macro|DMA_HISR_TEIF7
DECL|DMA_LIFCR_CDMEIF0_Msk|macro|DMA_LIFCR_CDMEIF0_Msk
DECL|DMA_LIFCR_CDMEIF0_Pos|macro|DMA_LIFCR_CDMEIF0_Pos
DECL|DMA_LIFCR_CDMEIF0|macro|DMA_LIFCR_CDMEIF0
DECL|DMA_LIFCR_CDMEIF1_Msk|macro|DMA_LIFCR_CDMEIF1_Msk
DECL|DMA_LIFCR_CDMEIF1_Pos|macro|DMA_LIFCR_CDMEIF1_Pos
DECL|DMA_LIFCR_CDMEIF1|macro|DMA_LIFCR_CDMEIF1
DECL|DMA_LIFCR_CDMEIF2_Msk|macro|DMA_LIFCR_CDMEIF2_Msk
DECL|DMA_LIFCR_CDMEIF2_Pos|macro|DMA_LIFCR_CDMEIF2_Pos
DECL|DMA_LIFCR_CDMEIF2|macro|DMA_LIFCR_CDMEIF2
DECL|DMA_LIFCR_CDMEIF3_Msk|macro|DMA_LIFCR_CDMEIF3_Msk
DECL|DMA_LIFCR_CDMEIF3_Pos|macro|DMA_LIFCR_CDMEIF3_Pos
DECL|DMA_LIFCR_CDMEIF3|macro|DMA_LIFCR_CDMEIF3
DECL|DMA_LIFCR_CFEIF0_Msk|macro|DMA_LIFCR_CFEIF0_Msk
DECL|DMA_LIFCR_CFEIF0_Pos|macro|DMA_LIFCR_CFEIF0_Pos
DECL|DMA_LIFCR_CFEIF0|macro|DMA_LIFCR_CFEIF0
DECL|DMA_LIFCR_CFEIF1_Msk|macro|DMA_LIFCR_CFEIF1_Msk
DECL|DMA_LIFCR_CFEIF1_Pos|macro|DMA_LIFCR_CFEIF1_Pos
DECL|DMA_LIFCR_CFEIF1|macro|DMA_LIFCR_CFEIF1
DECL|DMA_LIFCR_CFEIF2_Msk|macro|DMA_LIFCR_CFEIF2_Msk
DECL|DMA_LIFCR_CFEIF2_Pos|macro|DMA_LIFCR_CFEIF2_Pos
DECL|DMA_LIFCR_CFEIF2|macro|DMA_LIFCR_CFEIF2
DECL|DMA_LIFCR_CFEIF3_Msk|macro|DMA_LIFCR_CFEIF3_Msk
DECL|DMA_LIFCR_CFEIF3_Pos|macro|DMA_LIFCR_CFEIF3_Pos
DECL|DMA_LIFCR_CFEIF3|macro|DMA_LIFCR_CFEIF3
DECL|DMA_LIFCR_CHTIF0_Msk|macro|DMA_LIFCR_CHTIF0_Msk
DECL|DMA_LIFCR_CHTIF0_Pos|macro|DMA_LIFCR_CHTIF0_Pos
DECL|DMA_LIFCR_CHTIF0|macro|DMA_LIFCR_CHTIF0
DECL|DMA_LIFCR_CHTIF1_Msk|macro|DMA_LIFCR_CHTIF1_Msk
DECL|DMA_LIFCR_CHTIF1_Pos|macro|DMA_LIFCR_CHTIF1_Pos
DECL|DMA_LIFCR_CHTIF1|macro|DMA_LIFCR_CHTIF1
DECL|DMA_LIFCR_CHTIF2_Msk|macro|DMA_LIFCR_CHTIF2_Msk
DECL|DMA_LIFCR_CHTIF2_Pos|macro|DMA_LIFCR_CHTIF2_Pos
DECL|DMA_LIFCR_CHTIF2|macro|DMA_LIFCR_CHTIF2
DECL|DMA_LIFCR_CHTIF3_Msk|macro|DMA_LIFCR_CHTIF3_Msk
DECL|DMA_LIFCR_CHTIF3_Pos|macro|DMA_LIFCR_CHTIF3_Pos
DECL|DMA_LIFCR_CHTIF3|macro|DMA_LIFCR_CHTIF3
DECL|DMA_LIFCR_CTCIF0_Msk|macro|DMA_LIFCR_CTCIF0_Msk
DECL|DMA_LIFCR_CTCIF0_Pos|macro|DMA_LIFCR_CTCIF0_Pos
DECL|DMA_LIFCR_CTCIF0|macro|DMA_LIFCR_CTCIF0
DECL|DMA_LIFCR_CTCIF1_Msk|macro|DMA_LIFCR_CTCIF1_Msk
DECL|DMA_LIFCR_CTCIF1_Pos|macro|DMA_LIFCR_CTCIF1_Pos
DECL|DMA_LIFCR_CTCIF1|macro|DMA_LIFCR_CTCIF1
DECL|DMA_LIFCR_CTCIF2_Msk|macro|DMA_LIFCR_CTCIF2_Msk
DECL|DMA_LIFCR_CTCIF2_Pos|macro|DMA_LIFCR_CTCIF2_Pos
DECL|DMA_LIFCR_CTCIF2|macro|DMA_LIFCR_CTCIF2
DECL|DMA_LIFCR_CTCIF3_Msk|macro|DMA_LIFCR_CTCIF3_Msk
DECL|DMA_LIFCR_CTCIF3_Pos|macro|DMA_LIFCR_CTCIF3_Pos
DECL|DMA_LIFCR_CTCIF3|macro|DMA_LIFCR_CTCIF3
DECL|DMA_LIFCR_CTEIF0_Msk|macro|DMA_LIFCR_CTEIF0_Msk
DECL|DMA_LIFCR_CTEIF0_Pos|macro|DMA_LIFCR_CTEIF0_Pos
DECL|DMA_LIFCR_CTEIF0|macro|DMA_LIFCR_CTEIF0
DECL|DMA_LIFCR_CTEIF1_Msk|macro|DMA_LIFCR_CTEIF1_Msk
DECL|DMA_LIFCR_CTEIF1_Pos|macro|DMA_LIFCR_CTEIF1_Pos
DECL|DMA_LIFCR_CTEIF1|macro|DMA_LIFCR_CTEIF1
DECL|DMA_LIFCR_CTEIF2_Msk|macro|DMA_LIFCR_CTEIF2_Msk
DECL|DMA_LIFCR_CTEIF2_Pos|macro|DMA_LIFCR_CTEIF2_Pos
DECL|DMA_LIFCR_CTEIF2|macro|DMA_LIFCR_CTEIF2
DECL|DMA_LIFCR_CTEIF3_Msk|macro|DMA_LIFCR_CTEIF3_Msk
DECL|DMA_LIFCR_CTEIF3_Pos|macro|DMA_LIFCR_CTEIF3_Pos
DECL|DMA_LIFCR_CTEIF3|macro|DMA_LIFCR_CTEIF3
DECL|DMA_LISR_DMEIF0_Msk|macro|DMA_LISR_DMEIF0_Msk
DECL|DMA_LISR_DMEIF0_Pos|macro|DMA_LISR_DMEIF0_Pos
DECL|DMA_LISR_DMEIF0|macro|DMA_LISR_DMEIF0
DECL|DMA_LISR_DMEIF1_Msk|macro|DMA_LISR_DMEIF1_Msk
DECL|DMA_LISR_DMEIF1_Pos|macro|DMA_LISR_DMEIF1_Pos
DECL|DMA_LISR_DMEIF1|macro|DMA_LISR_DMEIF1
DECL|DMA_LISR_DMEIF2_Msk|macro|DMA_LISR_DMEIF2_Msk
DECL|DMA_LISR_DMEIF2_Pos|macro|DMA_LISR_DMEIF2_Pos
DECL|DMA_LISR_DMEIF2|macro|DMA_LISR_DMEIF2
DECL|DMA_LISR_DMEIF3_Msk|macro|DMA_LISR_DMEIF3_Msk
DECL|DMA_LISR_DMEIF3_Pos|macro|DMA_LISR_DMEIF3_Pos
DECL|DMA_LISR_DMEIF3|macro|DMA_LISR_DMEIF3
DECL|DMA_LISR_FEIF0_Msk|macro|DMA_LISR_FEIF0_Msk
DECL|DMA_LISR_FEIF0_Pos|macro|DMA_LISR_FEIF0_Pos
DECL|DMA_LISR_FEIF0|macro|DMA_LISR_FEIF0
DECL|DMA_LISR_FEIF1_Msk|macro|DMA_LISR_FEIF1_Msk
DECL|DMA_LISR_FEIF1_Pos|macro|DMA_LISR_FEIF1_Pos
DECL|DMA_LISR_FEIF1|macro|DMA_LISR_FEIF1
DECL|DMA_LISR_FEIF2_Msk|macro|DMA_LISR_FEIF2_Msk
DECL|DMA_LISR_FEIF2_Pos|macro|DMA_LISR_FEIF2_Pos
DECL|DMA_LISR_FEIF2|macro|DMA_LISR_FEIF2
DECL|DMA_LISR_FEIF3_Msk|macro|DMA_LISR_FEIF3_Msk
DECL|DMA_LISR_FEIF3_Pos|macro|DMA_LISR_FEIF3_Pos
DECL|DMA_LISR_FEIF3|macro|DMA_LISR_FEIF3
DECL|DMA_LISR_HTIF0_Msk|macro|DMA_LISR_HTIF0_Msk
DECL|DMA_LISR_HTIF0_Pos|macro|DMA_LISR_HTIF0_Pos
DECL|DMA_LISR_HTIF0|macro|DMA_LISR_HTIF0
DECL|DMA_LISR_HTIF1_Msk|macro|DMA_LISR_HTIF1_Msk
DECL|DMA_LISR_HTIF1_Pos|macro|DMA_LISR_HTIF1_Pos
DECL|DMA_LISR_HTIF1|macro|DMA_LISR_HTIF1
DECL|DMA_LISR_HTIF2_Msk|macro|DMA_LISR_HTIF2_Msk
DECL|DMA_LISR_HTIF2_Pos|macro|DMA_LISR_HTIF2_Pos
DECL|DMA_LISR_HTIF2|macro|DMA_LISR_HTIF2
DECL|DMA_LISR_HTIF3_Msk|macro|DMA_LISR_HTIF3_Msk
DECL|DMA_LISR_HTIF3_Pos|macro|DMA_LISR_HTIF3_Pos
DECL|DMA_LISR_HTIF3|macro|DMA_LISR_HTIF3
DECL|DMA_LISR_TCIF0_Msk|macro|DMA_LISR_TCIF0_Msk
DECL|DMA_LISR_TCIF0_Pos|macro|DMA_LISR_TCIF0_Pos
DECL|DMA_LISR_TCIF0|macro|DMA_LISR_TCIF0
DECL|DMA_LISR_TCIF1_Msk|macro|DMA_LISR_TCIF1_Msk
DECL|DMA_LISR_TCIF1_Pos|macro|DMA_LISR_TCIF1_Pos
DECL|DMA_LISR_TCIF1|macro|DMA_LISR_TCIF1
DECL|DMA_LISR_TCIF2_Msk|macro|DMA_LISR_TCIF2_Msk
DECL|DMA_LISR_TCIF2_Pos|macro|DMA_LISR_TCIF2_Pos
DECL|DMA_LISR_TCIF2|macro|DMA_LISR_TCIF2
DECL|DMA_LISR_TCIF3_Msk|macro|DMA_LISR_TCIF3_Msk
DECL|DMA_LISR_TCIF3_Pos|macro|DMA_LISR_TCIF3_Pos
DECL|DMA_LISR_TCIF3|macro|DMA_LISR_TCIF3
DECL|DMA_LISR_TEIF0_Msk|macro|DMA_LISR_TEIF0_Msk
DECL|DMA_LISR_TEIF0_Pos|macro|DMA_LISR_TEIF0_Pos
DECL|DMA_LISR_TEIF0|macro|DMA_LISR_TEIF0
DECL|DMA_LISR_TEIF1_Msk|macro|DMA_LISR_TEIF1_Msk
DECL|DMA_LISR_TEIF1_Pos|macro|DMA_LISR_TEIF1_Pos
DECL|DMA_LISR_TEIF1|macro|DMA_LISR_TEIF1
DECL|DMA_LISR_TEIF2_Msk|macro|DMA_LISR_TEIF2_Msk
DECL|DMA_LISR_TEIF2_Pos|macro|DMA_LISR_TEIF2_Pos
DECL|DMA_LISR_TEIF2|macro|DMA_LISR_TEIF2
DECL|DMA_LISR_TEIF3_Msk|macro|DMA_LISR_TEIF3_Msk
DECL|DMA_LISR_TEIF3_Pos|macro|DMA_LISR_TEIF3_Pos
DECL|DMA_LISR_TEIF3|macro|DMA_LISR_TEIF3
DECL|DMA_Stream_TypeDef|typedef|} DMA_Stream_TypeDef;
DECL|DMA_SxCR_CHSEL_0|macro|DMA_SxCR_CHSEL_0
DECL|DMA_SxCR_CHSEL_1|macro|DMA_SxCR_CHSEL_1
DECL|DMA_SxCR_CHSEL_2|macro|DMA_SxCR_CHSEL_2
DECL|DMA_SxCR_CHSEL_3|macro|DMA_SxCR_CHSEL_3
DECL|DMA_SxCR_CHSEL_Msk|macro|DMA_SxCR_CHSEL_Msk
DECL|DMA_SxCR_CHSEL_Pos|macro|DMA_SxCR_CHSEL_Pos
DECL|DMA_SxCR_CHSEL|macro|DMA_SxCR_CHSEL
DECL|DMA_SxCR_CIRC_Msk|macro|DMA_SxCR_CIRC_Msk
DECL|DMA_SxCR_CIRC_Pos|macro|DMA_SxCR_CIRC_Pos
DECL|DMA_SxCR_CIRC|macro|DMA_SxCR_CIRC
DECL|DMA_SxCR_CT_Msk|macro|DMA_SxCR_CT_Msk
DECL|DMA_SxCR_CT_Pos|macro|DMA_SxCR_CT_Pos
DECL|DMA_SxCR_CT|macro|DMA_SxCR_CT
DECL|DMA_SxCR_DBM_Msk|macro|DMA_SxCR_DBM_Msk
DECL|DMA_SxCR_DBM_Pos|macro|DMA_SxCR_DBM_Pos
DECL|DMA_SxCR_DBM|macro|DMA_SxCR_DBM
DECL|DMA_SxCR_DIR_0|macro|DMA_SxCR_DIR_0
DECL|DMA_SxCR_DIR_1|macro|DMA_SxCR_DIR_1
DECL|DMA_SxCR_DIR_Msk|macro|DMA_SxCR_DIR_Msk
DECL|DMA_SxCR_DIR_Pos|macro|DMA_SxCR_DIR_Pos
DECL|DMA_SxCR_DIR|macro|DMA_SxCR_DIR
DECL|DMA_SxCR_DMEIE_Msk|macro|DMA_SxCR_DMEIE_Msk
DECL|DMA_SxCR_DMEIE_Pos|macro|DMA_SxCR_DMEIE_Pos
DECL|DMA_SxCR_DMEIE|macro|DMA_SxCR_DMEIE
DECL|DMA_SxCR_EN_Msk|macro|DMA_SxCR_EN_Msk
DECL|DMA_SxCR_EN_Pos|macro|DMA_SxCR_EN_Pos
DECL|DMA_SxCR_EN|macro|DMA_SxCR_EN
DECL|DMA_SxCR_HTIE_Msk|macro|DMA_SxCR_HTIE_Msk
DECL|DMA_SxCR_HTIE_Pos|macro|DMA_SxCR_HTIE_Pos
DECL|DMA_SxCR_HTIE|macro|DMA_SxCR_HTIE
DECL|DMA_SxCR_MBURST_0|macro|DMA_SxCR_MBURST_0
DECL|DMA_SxCR_MBURST_1|macro|DMA_SxCR_MBURST_1
DECL|DMA_SxCR_MBURST_Msk|macro|DMA_SxCR_MBURST_Msk
DECL|DMA_SxCR_MBURST_Pos|macro|DMA_SxCR_MBURST_Pos
DECL|DMA_SxCR_MBURST|macro|DMA_SxCR_MBURST
DECL|DMA_SxCR_MINC_Msk|macro|DMA_SxCR_MINC_Msk
DECL|DMA_SxCR_MINC_Pos|macro|DMA_SxCR_MINC_Pos
DECL|DMA_SxCR_MINC|macro|DMA_SxCR_MINC
DECL|DMA_SxCR_MSIZE_0|macro|DMA_SxCR_MSIZE_0
DECL|DMA_SxCR_MSIZE_1|macro|DMA_SxCR_MSIZE_1
DECL|DMA_SxCR_MSIZE_Msk|macro|DMA_SxCR_MSIZE_Msk
DECL|DMA_SxCR_MSIZE_Pos|macro|DMA_SxCR_MSIZE_Pos
DECL|DMA_SxCR_MSIZE|macro|DMA_SxCR_MSIZE
DECL|DMA_SxCR_PBURST_0|macro|DMA_SxCR_PBURST_0
DECL|DMA_SxCR_PBURST_1|macro|DMA_SxCR_PBURST_1
DECL|DMA_SxCR_PBURST_Msk|macro|DMA_SxCR_PBURST_Msk
DECL|DMA_SxCR_PBURST_Pos|macro|DMA_SxCR_PBURST_Pos
DECL|DMA_SxCR_PBURST|macro|DMA_SxCR_PBURST
DECL|DMA_SxCR_PFCTRL_Msk|macro|DMA_SxCR_PFCTRL_Msk
DECL|DMA_SxCR_PFCTRL_Pos|macro|DMA_SxCR_PFCTRL_Pos
DECL|DMA_SxCR_PFCTRL|macro|DMA_SxCR_PFCTRL
DECL|DMA_SxCR_PINCOS_Msk|macro|DMA_SxCR_PINCOS_Msk
DECL|DMA_SxCR_PINCOS_Pos|macro|DMA_SxCR_PINCOS_Pos
DECL|DMA_SxCR_PINCOS|macro|DMA_SxCR_PINCOS
DECL|DMA_SxCR_PINC_Msk|macro|DMA_SxCR_PINC_Msk
DECL|DMA_SxCR_PINC_Pos|macro|DMA_SxCR_PINC_Pos
DECL|DMA_SxCR_PINC|macro|DMA_SxCR_PINC
DECL|DMA_SxCR_PL_0|macro|DMA_SxCR_PL_0
DECL|DMA_SxCR_PL_1|macro|DMA_SxCR_PL_1
DECL|DMA_SxCR_PL_Msk|macro|DMA_SxCR_PL_Msk
DECL|DMA_SxCR_PL_Pos|macro|DMA_SxCR_PL_Pos
DECL|DMA_SxCR_PL|macro|DMA_SxCR_PL
DECL|DMA_SxCR_PSIZE_0|macro|DMA_SxCR_PSIZE_0
DECL|DMA_SxCR_PSIZE_1|macro|DMA_SxCR_PSIZE_1
DECL|DMA_SxCR_PSIZE_Msk|macro|DMA_SxCR_PSIZE_Msk
DECL|DMA_SxCR_PSIZE_Pos|macro|DMA_SxCR_PSIZE_Pos
DECL|DMA_SxCR_PSIZE|macro|DMA_SxCR_PSIZE
DECL|DMA_SxCR_TCIE_Msk|macro|DMA_SxCR_TCIE_Msk
DECL|DMA_SxCR_TCIE_Pos|macro|DMA_SxCR_TCIE_Pos
DECL|DMA_SxCR_TCIE|macro|DMA_SxCR_TCIE
DECL|DMA_SxCR_TEIE_Msk|macro|DMA_SxCR_TEIE_Msk
DECL|DMA_SxCR_TEIE_Pos|macro|DMA_SxCR_TEIE_Pos
DECL|DMA_SxCR_TEIE|macro|DMA_SxCR_TEIE
DECL|DMA_SxFCR_DMDIS_Msk|macro|DMA_SxFCR_DMDIS_Msk
DECL|DMA_SxFCR_DMDIS_Pos|macro|DMA_SxFCR_DMDIS_Pos
DECL|DMA_SxFCR_DMDIS|macro|DMA_SxFCR_DMDIS
DECL|DMA_SxFCR_FEIE_Msk|macro|DMA_SxFCR_FEIE_Msk
DECL|DMA_SxFCR_FEIE_Pos|macro|DMA_SxFCR_FEIE_Pos
DECL|DMA_SxFCR_FEIE|macro|DMA_SxFCR_FEIE
DECL|DMA_SxFCR_FS_0|macro|DMA_SxFCR_FS_0
DECL|DMA_SxFCR_FS_1|macro|DMA_SxFCR_FS_1
DECL|DMA_SxFCR_FS_2|macro|DMA_SxFCR_FS_2
DECL|DMA_SxFCR_FS_Msk|macro|DMA_SxFCR_FS_Msk
DECL|DMA_SxFCR_FS_Pos|macro|DMA_SxFCR_FS_Pos
DECL|DMA_SxFCR_FS|macro|DMA_SxFCR_FS
DECL|DMA_SxFCR_FTH_0|macro|DMA_SxFCR_FTH_0
DECL|DMA_SxFCR_FTH_1|macro|DMA_SxFCR_FTH_1
DECL|DMA_SxFCR_FTH_Msk|macro|DMA_SxFCR_FTH_Msk
DECL|DMA_SxFCR_FTH_Pos|macro|DMA_SxFCR_FTH_Pos
DECL|DMA_SxFCR_FTH|macro|DMA_SxFCR_FTH
DECL|DMA_SxM0AR_M0A_Msk|macro|DMA_SxM0AR_M0A_Msk
DECL|DMA_SxM0AR_M0A_Pos|macro|DMA_SxM0AR_M0A_Pos
DECL|DMA_SxM0AR_M0A|macro|DMA_SxM0AR_M0A
DECL|DMA_SxM1AR_M1A_Msk|macro|DMA_SxM1AR_M1A_Msk
DECL|DMA_SxM1AR_M1A_Pos|macro|DMA_SxM1AR_M1A_Pos
DECL|DMA_SxM1AR_M1A|macro|DMA_SxM1AR_M1A
DECL|DMA_SxNDT_0|macro|DMA_SxNDT_0
DECL|DMA_SxNDT_10|macro|DMA_SxNDT_10
DECL|DMA_SxNDT_11|macro|DMA_SxNDT_11
DECL|DMA_SxNDT_12|macro|DMA_SxNDT_12
DECL|DMA_SxNDT_13|macro|DMA_SxNDT_13
DECL|DMA_SxNDT_14|macro|DMA_SxNDT_14
DECL|DMA_SxNDT_15|macro|DMA_SxNDT_15
DECL|DMA_SxNDT_1|macro|DMA_SxNDT_1
DECL|DMA_SxNDT_2|macro|DMA_SxNDT_2
DECL|DMA_SxNDT_3|macro|DMA_SxNDT_3
DECL|DMA_SxNDT_4|macro|DMA_SxNDT_4
DECL|DMA_SxNDT_5|macro|DMA_SxNDT_5
DECL|DMA_SxNDT_6|macro|DMA_SxNDT_6
DECL|DMA_SxNDT_7|macro|DMA_SxNDT_7
DECL|DMA_SxNDT_8|macro|DMA_SxNDT_8
DECL|DMA_SxNDT_9|macro|DMA_SxNDT_9
DECL|DMA_SxNDT_Msk|macro|DMA_SxNDT_Msk
DECL|DMA_SxNDT_Pos|macro|DMA_SxNDT_Pos
DECL|DMA_SxNDT|macro|DMA_SxNDT
DECL|DMA_SxPAR_PA_Msk|macro|DMA_SxPAR_PA_Msk
DECL|DMA_SxPAR_PA_Pos|macro|DMA_SxPAR_PA_Pos
DECL|DMA_SxPAR_PA|macro|DMA_SxPAR_PA
DECL|DMA_TypeDef|typedef|} DMA_TypeDef;
DECL|DOEPCTL|member|__IO uint32_t DOEPCTL; /*!< dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h */
DECL|DOEPDMA|member|__IO uint32_t DOEPDMA; /*!< dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h */
DECL|DOEPINT|member|__IO uint32_t DOEPINT; /*!< dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h */
DECL|DOEPMSK|member|__IO uint32_t DOEPMSK; /*!< dev OUT Endpoint Mask 814h */
DECL|DOEPTSIZ|member|__IO uint32_t DOEPTSIZ; /*!< dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h */
DECL|DOR1|member|__IO uint32_t DOR1; /*!< DAC channel1 data output register, Address offset: 0x2C */
DECL|DOR2|member|__IO uint32_t DOR2; /*!< DAC channel2 data output register, Address offset: 0x30 */
DECL|DOUTEP1MSK|member|__IO uint32_t DOUTEP1MSK; /*!< dedicated EP msk 884h */
DECL|DOUTR|member|__IO uint32_t DOUTR; /*!< AES data output register, Address offset: 0x0C */
DECL|DR|member|__IO uint32_t DR; /*!< ADC regular data register, Address offset: 0x4C */
DECL|DR|member|__IO uint32_t DR; /*!< CRC Data register, Address offset: 0x00 */
DECL|DR|member|__IO uint32_t DR; /*!< QUADSPI Data register, Address offset: 0x20 */
DECL|DR|member|__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
DECL|DR|member|__IO uint32_t DR; /*!< RTC date register, Address offset: 0x04 */
DECL|DR|member|__IO uint32_t DR; /*!< SAI block x data register, Address offset: 0x20 */
DECL|DR|member|__IO uint32_t DR; /*!< SPI data register, Address offset: 0x0C */
DECL|DSTS|member|__IO uint32_t DSTS; /*!< dev Status Register (RO) 808h */
DECL|DTHRCTL|member|__IO uint32_t DTHRCTL; /*!< dev threshold 830h */
DECL|DTIMER|member|__IO uint32_t DTIMER; /*!< SDMMC data timer register, Address offset: 0x24 */
DECL|DTXFSTS|member|__IO uint32_t DTXFSTS; /*!< IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h */
DECL|DVBUSDIS|member|__IO uint32_t DVBUSDIS; /*!< dev VBUS discharge Register 828h */
DECL|DVBUSPULSE|member|__IO uint32_t DVBUSPULSE; /*!< dev VBUS Pulse Register 82Ch */
DECL|DebugMonitor_IRQn|enumerator|DebugMonitor_IRQn = -4, /*!< 12 Cortex-M7 Debug Monitor Interrupt */
DECL|ECCR|member|__IO uint32_t ECCR; /*!< NAND Flash ECC result registers, Address offset: 0x94 */
DECL|EGR|member|__IO uint32_t EGR; /*!< TIM event generation register, Address offset: 0x14 */
DECL|EMR|member|__IO uint32_t EMR; /*!< EXTI Event mask register, Address offset: 0x04 */
DECL|ESR|member|__IO uint32_t ESR; /*!< CAN error status register, Address offset: 0x18 */
DECL|ETH_IRQn|enumerator|ETH_IRQn = 61, /*!< Ethernet global Interrupt */
DECL|ETH_WKUP_IRQn|enumerator|ETH_WKUP_IRQn = 62, /*!< Ethernet Wakeup through EXTI line Interrupt */
DECL|EXTI0_IRQn|enumerator|EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */
DECL|EXTI15_10_IRQn|enumerator|EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
DECL|EXTI1_IRQn|enumerator|EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */
DECL|EXTI2_IRQn|enumerator|EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */
DECL|EXTI3_IRQn|enumerator|EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */
DECL|EXTI4_IRQn|enumerator|EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */
DECL|EXTI9_5_IRQn|enumerator|EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
DECL|EXTICR|member|__IO uint32_t EXTICR[4]; /*!< SYSCFG external interrupt configuration registers, Address offset: 0x08-0x14 */
DECL|EXTI_BASE|macro|EXTI_BASE
DECL|EXTI_EMR_EM0|macro|EXTI_EMR_EM0
DECL|EXTI_EMR_EM10|macro|EXTI_EMR_EM10
DECL|EXTI_EMR_EM11|macro|EXTI_EMR_EM11
DECL|EXTI_EMR_EM12|macro|EXTI_EMR_EM12
DECL|EXTI_EMR_EM13|macro|EXTI_EMR_EM13
DECL|EXTI_EMR_EM14|macro|EXTI_EMR_EM14
DECL|EXTI_EMR_EM15|macro|EXTI_EMR_EM15
DECL|EXTI_EMR_EM16|macro|EXTI_EMR_EM16
DECL|EXTI_EMR_EM17|macro|EXTI_EMR_EM17
DECL|EXTI_EMR_EM18|macro|EXTI_EMR_EM18
DECL|EXTI_EMR_EM19|macro|EXTI_EMR_EM19
DECL|EXTI_EMR_EM1|macro|EXTI_EMR_EM1
DECL|EXTI_EMR_EM20|macro|EXTI_EMR_EM20
DECL|EXTI_EMR_EM21|macro|EXTI_EMR_EM21
DECL|EXTI_EMR_EM22|macro|EXTI_EMR_EM22
DECL|EXTI_EMR_EM23|macro|EXTI_EMR_EM23
DECL|EXTI_EMR_EM2|macro|EXTI_EMR_EM2
DECL|EXTI_EMR_EM3|macro|EXTI_EMR_EM3
DECL|EXTI_EMR_EM4|macro|EXTI_EMR_EM4
DECL|EXTI_EMR_EM5|macro|EXTI_EMR_EM5
DECL|EXTI_EMR_EM6|macro|EXTI_EMR_EM6
DECL|EXTI_EMR_EM7|macro|EXTI_EMR_EM7
DECL|EXTI_EMR_EM8|macro|EXTI_EMR_EM8
DECL|EXTI_EMR_EM9|macro|EXTI_EMR_EM9
DECL|EXTI_EMR_MR0_Msk|macro|EXTI_EMR_MR0_Msk
DECL|EXTI_EMR_MR0_Pos|macro|EXTI_EMR_MR0_Pos
DECL|EXTI_EMR_MR0|macro|EXTI_EMR_MR0
DECL|EXTI_EMR_MR10_Msk|macro|EXTI_EMR_MR10_Msk
DECL|EXTI_EMR_MR10_Pos|macro|EXTI_EMR_MR10_Pos
DECL|EXTI_EMR_MR10|macro|EXTI_EMR_MR10
DECL|EXTI_EMR_MR11_Msk|macro|EXTI_EMR_MR11_Msk
DECL|EXTI_EMR_MR11_Pos|macro|EXTI_EMR_MR11_Pos
DECL|EXTI_EMR_MR11|macro|EXTI_EMR_MR11
DECL|EXTI_EMR_MR12_Msk|macro|EXTI_EMR_MR12_Msk
DECL|EXTI_EMR_MR12_Pos|macro|EXTI_EMR_MR12_Pos
DECL|EXTI_EMR_MR12|macro|EXTI_EMR_MR12
DECL|EXTI_EMR_MR13_Msk|macro|EXTI_EMR_MR13_Msk
DECL|EXTI_EMR_MR13_Pos|macro|EXTI_EMR_MR13_Pos
DECL|EXTI_EMR_MR13|macro|EXTI_EMR_MR13
DECL|EXTI_EMR_MR14_Msk|macro|EXTI_EMR_MR14_Msk
DECL|EXTI_EMR_MR14_Pos|macro|EXTI_EMR_MR14_Pos
DECL|EXTI_EMR_MR14|macro|EXTI_EMR_MR14
DECL|EXTI_EMR_MR15_Msk|macro|EXTI_EMR_MR15_Msk
DECL|EXTI_EMR_MR15_Pos|macro|EXTI_EMR_MR15_Pos
DECL|EXTI_EMR_MR15|macro|EXTI_EMR_MR15
DECL|EXTI_EMR_MR16_Msk|macro|EXTI_EMR_MR16_Msk
DECL|EXTI_EMR_MR16_Pos|macro|EXTI_EMR_MR16_Pos
DECL|EXTI_EMR_MR16|macro|EXTI_EMR_MR16
DECL|EXTI_EMR_MR17_Msk|macro|EXTI_EMR_MR17_Msk
DECL|EXTI_EMR_MR17_Pos|macro|EXTI_EMR_MR17_Pos
DECL|EXTI_EMR_MR17|macro|EXTI_EMR_MR17
DECL|EXTI_EMR_MR18_Msk|macro|EXTI_EMR_MR18_Msk
DECL|EXTI_EMR_MR18_Pos|macro|EXTI_EMR_MR18_Pos
DECL|EXTI_EMR_MR18|macro|EXTI_EMR_MR18
DECL|EXTI_EMR_MR19_Msk|macro|EXTI_EMR_MR19_Msk
DECL|EXTI_EMR_MR19_Pos|macro|EXTI_EMR_MR19_Pos
DECL|EXTI_EMR_MR19|macro|EXTI_EMR_MR19
DECL|EXTI_EMR_MR1_Msk|macro|EXTI_EMR_MR1_Msk
DECL|EXTI_EMR_MR1_Pos|macro|EXTI_EMR_MR1_Pos
DECL|EXTI_EMR_MR1|macro|EXTI_EMR_MR1
DECL|EXTI_EMR_MR20_Msk|macro|EXTI_EMR_MR20_Msk
DECL|EXTI_EMR_MR20_Pos|macro|EXTI_EMR_MR20_Pos
DECL|EXTI_EMR_MR20|macro|EXTI_EMR_MR20
DECL|EXTI_EMR_MR21_Msk|macro|EXTI_EMR_MR21_Msk
DECL|EXTI_EMR_MR21_Pos|macro|EXTI_EMR_MR21_Pos
DECL|EXTI_EMR_MR21|macro|EXTI_EMR_MR21
DECL|EXTI_EMR_MR22_Msk|macro|EXTI_EMR_MR22_Msk
DECL|EXTI_EMR_MR22_Pos|macro|EXTI_EMR_MR22_Pos
DECL|EXTI_EMR_MR22|macro|EXTI_EMR_MR22
DECL|EXTI_EMR_MR23_Msk|macro|EXTI_EMR_MR23_Msk
DECL|EXTI_EMR_MR23_Pos|macro|EXTI_EMR_MR23_Pos
DECL|EXTI_EMR_MR23|macro|EXTI_EMR_MR23
DECL|EXTI_EMR_MR2_Msk|macro|EXTI_EMR_MR2_Msk
DECL|EXTI_EMR_MR2_Pos|macro|EXTI_EMR_MR2_Pos
DECL|EXTI_EMR_MR2|macro|EXTI_EMR_MR2
DECL|EXTI_EMR_MR3_Msk|macro|EXTI_EMR_MR3_Msk
DECL|EXTI_EMR_MR3_Pos|macro|EXTI_EMR_MR3_Pos
DECL|EXTI_EMR_MR3|macro|EXTI_EMR_MR3
DECL|EXTI_EMR_MR4_Msk|macro|EXTI_EMR_MR4_Msk
DECL|EXTI_EMR_MR4_Pos|macro|EXTI_EMR_MR4_Pos
DECL|EXTI_EMR_MR4|macro|EXTI_EMR_MR4
DECL|EXTI_EMR_MR5_Msk|macro|EXTI_EMR_MR5_Msk
DECL|EXTI_EMR_MR5_Pos|macro|EXTI_EMR_MR5_Pos
DECL|EXTI_EMR_MR5|macro|EXTI_EMR_MR5
DECL|EXTI_EMR_MR6_Msk|macro|EXTI_EMR_MR6_Msk
DECL|EXTI_EMR_MR6_Pos|macro|EXTI_EMR_MR6_Pos
DECL|EXTI_EMR_MR6|macro|EXTI_EMR_MR6
DECL|EXTI_EMR_MR7_Msk|macro|EXTI_EMR_MR7_Msk
DECL|EXTI_EMR_MR7_Pos|macro|EXTI_EMR_MR7_Pos
DECL|EXTI_EMR_MR7|macro|EXTI_EMR_MR7
DECL|EXTI_EMR_MR8_Msk|macro|EXTI_EMR_MR8_Msk
DECL|EXTI_EMR_MR8_Pos|macro|EXTI_EMR_MR8_Pos
DECL|EXTI_EMR_MR8|macro|EXTI_EMR_MR8
DECL|EXTI_EMR_MR9_Msk|macro|EXTI_EMR_MR9_Msk
DECL|EXTI_EMR_MR9_Pos|macro|EXTI_EMR_MR9_Pos
DECL|EXTI_EMR_MR9|macro|EXTI_EMR_MR9
DECL|EXTI_FTSR_TR0_Msk|macro|EXTI_FTSR_TR0_Msk
DECL|EXTI_FTSR_TR0_Pos|macro|EXTI_FTSR_TR0_Pos
DECL|EXTI_FTSR_TR0|macro|EXTI_FTSR_TR0
DECL|EXTI_FTSR_TR10_Msk|macro|EXTI_FTSR_TR10_Msk
DECL|EXTI_FTSR_TR10_Pos|macro|EXTI_FTSR_TR10_Pos
DECL|EXTI_FTSR_TR10|macro|EXTI_FTSR_TR10
DECL|EXTI_FTSR_TR11_Msk|macro|EXTI_FTSR_TR11_Msk
DECL|EXTI_FTSR_TR11_Pos|macro|EXTI_FTSR_TR11_Pos
DECL|EXTI_FTSR_TR11|macro|EXTI_FTSR_TR11
DECL|EXTI_FTSR_TR12_Msk|macro|EXTI_FTSR_TR12_Msk
DECL|EXTI_FTSR_TR12_Pos|macro|EXTI_FTSR_TR12_Pos
DECL|EXTI_FTSR_TR12|macro|EXTI_FTSR_TR12
DECL|EXTI_FTSR_TR13_Msk|macro|EXTI_FTSR_TR13_Msk
DECL|EXTI_FTSR_TR13_Pos|macro|EXTI_FTSR_TR13_Pos
DECL|EXTI_FTSR_TR13|macro|EXTI_FTSR_TR13
DECL|EXTI_FTSR_TR14_Msk|macro|EXTI_FTSR_TR14_Msk
DECL|EXTI_FTSR_TR14_Pos|macro|EXTI_FTSR_TR14_Pos
DECL|EXTI_FTSR_TR14|macro|EXTI_FTSR_TR14
DECL|EXTI_FTSR_TR15_Msk|macro|EXTI_FTSR_TR15_Msk
DECL|EXTI_FTSR_TR15_Pos|macro|EXTI_FTSR_TR15_Pos
DECL|EXTI_FTSR_TR15|macro|EXTI_FTSR_TR15
DECL|EXTI_FTSR_TR16_Msk|macro|EXTI_FTSR_TR16_Msk
DECL|EXTI_FTSR_TR16_Pos|macro|EXTI_FTSR_TR16_Pos
DECL|EXTI_FTSR_TR16|macro|EXTI_FTSR_TR16
DECL|EXTI_FTSR_TR17_Msk|macro|EXTI_FTSR_TR17_Msk
DECL|EXTI_FTSR_TR17_Pos|macro|EXTI_FTSR_TR17_Pos
DECL|EXTI_FTSR_TR17|macro|EXTI_FTSR_TR17
DECL|EXTI_FTSR_TR18_Msk|macro|EXTI_FTSR_TR18_Msk
DECL|EXTI_FTSR_TR18_Pos|macro|EXTI_FTSR_TR18_Pos
DECL|EXTI_FTSR_TR18|macro|EXTI_FTSR_TR18
DECL|EXTI_FTSR_TR19_Msk|macro|EXTI_FTSR_TR19_Msk
DECL|EXTI_FTSR_TR19_Pos|macro|EXTI_FTSR_TR19_Pos
DECL|EXTI_FTSR_TR19|macro|EXTI_FTSR_TR19
DECL|EXTI_FTSR_TR1_Msk|macro|EXTI_FTSR_TR1_Msk
DECL|EXTI_FTSR_TR1_Pos|macro|EXTI_FTSR_TR1_Pos
DECL|EXTI_FTSR_TR1|macro|EXTI_FTSR_TR1
DECL|EXTI_FTSR_TR20_Msk|macro|EXTI_FTSR_TR20_Msk
DECL|EXTI_FTSR_TR20_Pos|macro|EXTI_FTSR_TR20_Pos
DECL|EXTI_FTSR_TR20|macro|EXTI_FTSR_TR20
DECL|EXTI_FTSR_TR21_Msk|macro|EXTI_FTSR_TR21_Msk
DECL|EXTI_FTSR_TR21_Pos|macro|EXTI_FTSR_TR21_Pos
DECL|EXTI_FTSR_TR21|macro|EXTI_FTSR_TR21
DECL|EXTI_FTSR_TR22_Msk|macro|EXTI_FTSR_TR22_Msk
DECL|EXTI_FTSR_TR22_Pos|macro|EXTI_FTSR_TR22_Pos
DECL|EXTI_FTSR_TR22|macro|EXTI_FTSR_TR22
DECL|EXTI_FTSR_TR23_Msk|macro|EXTI_FTSR_TR23_Msk
DECL|EXTI_FTSR_TR23_Pos|macro|EXTI_FTSR_TR23_Pos
DECL|EXTI_FTSR_TR23|macro|EXTI_FTSR_TR23
DECL|EXTI_FTSR_TR2_Msk|macro|EXTI_FTSR_TR2_Msk
DECL|EXTI_FTSR_TR2_Pos|macro|EXTI_FTSR_TR2_Pos
DECL|EXTI_FTSR_TR2|macro|EXTI_FTSR_TR2
DECL|EXTI_FTSR_TR3_Msk|macro|EXTI_FTSR_TR3_Msk
DECL|EXTI_FTSR_TR3_Pos|macro|EXTI_FTSR_TR3_Pos
DECL|EXTI_FTSR_TR3|macro|EXTI_FTSR_TR3
DECL|EXTI_FTSR_TR4_Msk|macro|EXTI_FTSR_TR4_Msk
DECL|EXTI_FTSR_TR4_Pos|macro|EXTI_FTSR_TR4_Pos
DECL|EXTI_FTSR_TR4|macro|EXTI_FTSR_TR4
DECL|EXTI_FTSR_TR5_Msk|macro|EXTI_FTSR_TR5_Msk
DECL|EXTI_FTSR_TR5_Pos|macro|EXTI_FTSR_TR5_Pos
DECL|EXTI_FTSR_TR5|macro|EXTI_FTSR_TR5
DECL|EXTI_FTSR_TR6_Msk|macro|EXTI_FTSR_TR6_Msk
DECL|EXTI_FTSR_TR6_Pos|macro|EXTI_FTSR_TR6_Pos
DECL|EXTI_FTSR_TR6|macro|EXTI_FTSR_TR6
DECL|EXTI_FTSR_TR7_Msk|macro|EXTI_FTSR_TR7_Msk
DECL|EXTI_FTSR_TR7_Pos|macro|EXTI_FTSR_TR7_Pos
DECL|EXTI_FTSR_TR7|macro|EXTI_FTSR_TR7
DECL|EXTI_FTSR_TR8_Msk|macro|EXTI_FTSR_TR8_Msk
DECL|EXTI_FTSR_TR8_Pos|macro|EXTI_FTSR_TR8_Pos
DECL|EXTI_FTSR_TR8|macro|EXTI_FTSR_TR8
DECL|EXTI_FTSR_TR9_Msk|macro|EXTI_FTSR_TR9_Msk
DECL|EXTI_FTSR_TR9_Pos|macro|EXTI_FTSR_TR9_Pos
DECL|EXTI_FTSR_TR9|macro|EXTI_FTSR_TR9
DECL|EXTI_IMR_IM0|macro|EXTI_IMR_IM0
DECL|EXTI_IMR_IM10|macro|EXTI_IMR_IM10
DECL|EXTI_IMR_IM11|macro|EXTI_IMR_IM11
DECL|EXTI_IMR_IM12|macro|EXTI_IMR_IM12
DECL|EXTI_IMR_IM13|macro|EXTI_IMR_IM13
DECL|EXTI_IMR_IM14|macro|EXTI_IMR_IM14
DECL|EXTI_IMR_IM15|macro|EXTI_IMR_IM15
DECL|EXTI_IMR_IM16|macro|EXTI_IMR_IM16
DECL|EXTI_IMR_IM17|macro|EXTI_IMR_IM17
DECL|EXTI_IMR_IM18|macro|EXTI_IMR_IM18
DECL|EXTI_IMR_IM19|macro|EXTI_IMR_IM19
DECL|EXTI_IMR_IM1|macro|EXTI_IMR_IM1
DECL|EXTI_IMR_IM20|macro|EXTI_IMR_IM20
DECL|EXTI_IMR_IM21|macro|EXTI_IMR_IM21
DECL|EXTI_IMR_IM22|macro|EXTI_IMR_IM22
DECL|EXTI_IMR_IM23|macro|EXTI_IMR_IM23
DECL|EXTI_IMR_IM2|macro|EXTI_IMR_IM2
DECL|EXTI_IMR_IM3|macro|EXTI_IMR_IM3
DECL|EXTI_IMR_IM4|macro|EXTI_IMR_IM4
DECL|EXTI_IMR_IM5|macro|EXTI_IMR_IM5
DECL|EXTI_IMR_IM6|macro|EXTI_IMR_IM6
DECL|EXTI_IMR_IM7|macro|EXTI_IMR_IM7
DECL|EXTI_IMR_IM8|macro|EXTI_IMR_IM8
DECL|EXTI_IMR_IM9|macro|EXTI_IMR_IM9
DECL|EXTI_IMR_IM_Msk|macro|EXTI_IMR_IM_Msk
DECL|EXTI_IMR_IM_Pos|macro|EXTI_IMR_IM_Pos
DECL|EXTI_IMR_IM|macro|EXTI_IMR_IM
DECL|EXTI_IMR_MR0_Msk|macro|EXTI_IMR_MR0_Msk
DECL|EXTI_IMR_MR0_Pos|macro|EXTI_IMR_MR0_Pos
DECL|EXTI_IMR_MR0|macro|EXTI_IMR_MR0
DECL|EXTI_IMR_MR10_Msk|macro|EXTI_IMR_MR10_Msk
DECL|EXTI_IMR_MR10_Pos|macro|EXTI_IMR_MR10_Pos
DECL|EXTI_IMR_MR10|macro|EXTI_IMR_MR10
DECL|EXTI_IMR_MR11_Msk|macro|EXTI_IMR_MR11_Msk
DECL|EXTI_IMR_MR11_Pos|macro|EXTI_IMR_MR11_Pos
DECL|EXTI_IMR_MR11|macro|EXTI_IMR_MR11
DECL|EXTI_IMR_MR12_Msk|macro|EXTI_IMR_MR12_Msk
DECL|EXTI_IMR_MR12_Pos|macro|EXTI_IMR_MR12_Pos
DECL|EXTI_IMR_MR12|macro|EXTI_IMR_MR12
DECL|EXTI_IMR_MR13_Msk|macro|EXTI_IMR_MR13_Msk
DECL|EXTI_IMR_MR13_Pos|macro|EXTI_IMR_MR13_Pos
DECL|EXTI_IMR_MR13|macro|EXTI_IMR_MR13
DECL|EXTI_IMR_MR14_Msk|macro|EXTI_IMR_MR14_Msk
DECL|EXTI_IMR_MR14_Pos|macro|EXTI_IMR_MR14_Pos
DECL|EXTI_IMR_MR14|macro|EXTI_IMR_MR14
DECL|EXTI_IMR_MR15_Msk|macro|EXTI_IMR_MR15_Msk
DECL|EXTI_IMR_MR15_Pos|macro|EXTI_IMR_MR15_Pos
DECL|EXTI_IMR_MR15|macro|EXTI_IMR_MR15
DECL|EXTI_IMR_MR16_Msk|macro|EXTI_IMR_MR16_Msk
DECL|EXTI_IMR_MR16_Pos|macro|EXTI_IMR_MR16_Pos
DECL|EXTI_IMR_MR16|macro|EXTI_IMR_MR16
DECL|EXTI_IMR_MR17_Msk|macro|EXTI_IMR_MR17_Msk
DECL|EXTI_IMR_MR17_Pos|macro|EXTI_IMR_MR17_Pos
DECL|EXTI_IMR_MR17|macro|EXTI_IMR_MR17
DECL|EXTI_IMR_MR18_Msk|macro|EXTI_IMR_MR18_Msk
DECL|EXTI_IMR_MR18_Pos|macro|EXTI_IMR_MR18_Pos
DECL|EXTI_IMR_MR18|macro|EXTI_IMR_MR18
DECL|EXTI_IMR_MR19_Msk|macro|EXTI_IMR_MR19_Msk
DECL|EXTI_IMR_MR19_Pos|macro|EXTI_IMR_MR19_Pos
DECL|EXTI_IMR_MR19|macro|EXTI_IMR_MR19
DECL|EXTI_IMR_MR1_Msk|macro|EXTI_IMR_MR1_Msk
DECL|EXTI_IMR_MR1_Pos|macro|EXTI_IMR_MR1_Pos
DECL|EXTI_IMR_MR1|macro|EXTI_IMR_MR1
DECL|EXTI_IMR_MR20_Msk|macro|EXTI_IMR_MR20_Msk
DECL|EXTI_IMR_MR20_Pos|macro|EXTI_IMR_MR20_Pos
DECL|EXTI_IMR_MR20|macro|EXTI_IMR_MR20
DECL|EXTI_IMR_MR21_Msk|macro|EXTI_IMR_MR21_Msk
DECL|EXTI_IMR_MR21_Pos|macro|EXTI_IMR_MR21_Pos
DECL|EXTI_IMR_MR21|macro|EXTI_IMR_MR21
DECL|EXTI_IMR_MR22_Msk|macro|EXTI_IMR_MR22_Msk
DECL|EXTI_IMR_MR22_Pos|macro|EXTI_IMR_MR22_Pos
DECL|EXTI_IMR_MR22|macro|EXTI_IMR_MR22
DECL|EXTI_IMR_MR23_Msk|macro|EXTI_IMR_MR23_Msk
DECL|EXTI_IMR_MR23_Pos|macro|EXTI_IMR_MR23_Pos
DECL|EXTI_IMR_MR23|macro|EXTI_IMR_MR23
DECL|EXTI_IMR_MR2_Msk|macro|EXTI_IMR_MR2_Msk
DECL|EXTI_IMR_MR2_Pos|macro|EXTI_IMR_MR2_Pos
DECL|EXTI_IMR_MR2|macro|EXTI_IMR_MR2
DECL|EXTI_IMR_MR3_Msk|macro|EXTI_IMR_MR3_Msk
DECL|EXTI_IMR_MR3_Pos|macro|EXTI_IMR_MR3_Pos
DECL|EXTI_IMR_MR3|macro|EXTI_IMR_MR3
DECL|EXTI_IMR_MR4_Msk|macro|EXTI_IMR_MR4_Msk
DECL|EXTI_IMR_MR4_Pos|macro|EXTI_IMR_MR4_Pos
DECL|EXTI_IMR_MR4|macro|EXTI_IMR_MR4
DECL|EXTI_IMR_MR5_Msk|macro|EXTI_IMR_MR5_Msk
DECL|EXTI_IMR_MR5_Pos|macro|EXTI_IMR_MR5_Pos
DECL|EXTI_IMR_MR5|macro|EXTI_IMR_MR5
DECL|EXTI_IMR_MR6_Msk|macro|EXTI_IMR_MR6_Msk
DECL|EXTI_IMR_MR6_Pos|macro|EXTI_IMR_MR6_Pos
DECL|EXTI_IMR_MR6|macro|EXTI_IMR_MR6
DECL|EXTI_IMR_MR7_Msk|macro|EXTI_IMR_MR7_Msk
DECL|EXTI_IMR_MR7_Pos|macro|EXTI_IMR_MR7_Pos
DECL|EXTI_IMR_MR7|macro|EXTI_IMR_MR7
DECL|EXTI_IMR_MR8_Msk|macro|EXTI_IMR_MR8_Msk
DECL|EXTI_IMR_MR8_Pos|macro|EXTI_IMR_MR8_Pos
DECL|EXTI_IMR_MR8|macro|EXTI_IMR_MR8
DECL|EXTI_IMR_MR9_Msk|macro|EXTI_IMR_MR9_Msk
DECL|EXTI_IMR_MR9_Pos|macro|EXTI_IMR_MR9_Pos
DECL|EXTI_IMR_MR9|macro|EXTI_IMR_MR9
DECL|EXTI_PR_PR0_Msk|macro|EXTI_PR_PR0_Msk
DECL|EXTI_PR_PR0_Pos|macro|EXTI_PR_PR0_Pos
DECL|EXTI_PR_PR0|macro|EXTI_PR_PR0
DECL|EXTI_PR_PR10_Msk|macro|EXTI_PR_PR10_Msk
DECL|EXTI_PR_PR10_Pos|macro|EXTI_PR_PR10_Pos
DECL|EXTI_PR_PR10|macro|EXTI_PR_PR10
DECL|EXTI_PR_PR11_Msk|macro|EXTI_PR_PR11_Msk
DECL|EXTI_PR_PR11_Pos|macro|EXTI_PR_PR11_Pos
DECL|EXTI_PR_PR11|macro|EXTI_PR_PR11
DECL|EXTI_PR_PR12_Msk|macro|EXTI_PR_PR12_Msk
DECL|EXTI_PR_PR12_Pos|macro|EXTI_PR_PR12_Pos
DECL|EXTI_PR_PR12|macro|EXTI_PR_PR12
DECL|EXTI_PR_PR13_Msk|macro|EXTI_PR_PR13_Msk
DECL|EXTI_PR_PR13_Pos|macro|EXTI_PR_PR13_Pos
DECL|EXTI_PR_PR13|macro|EXTI_PR_PR13
DECL|EXTI_PR_PR14_Msk|macro|EXTI_PR_PR14_Msk
DECL|EXTI_PR_PR14_Pos|macro|EXTI_PR_PR14_Pos
DECL|EXTI_PR_PR14|macro|EXTI_PR_PR14
DECL|EXTI_PR_PR15_Msk|macro|EXTI_PR_PR15_Msk
DECL|EXTI_PR_PR15_Pos|macro|EXTI_PR_PR15_Pos
DECL|EXTI_PR_PR15|macro|EXTI_PR_PR15
DECL|EXTI_PR_PR16_Msk|macro|EXTI_PR_PR16_Msk
DECL|EXTI_PR_PR16_Pos|macro|EXTI_PR_PR16_Pos
DECL|EXTI_PR_PR16|macro|EXTI_PR_PR16
DECL|EXTI_PR_PR17_Msk|macro|EXTI_PR_PR17_Msk
DECL|EXTI_PR_PR17_Pos|macro|EXTI_PR_PR17_Pos
DECL|EXTI_PR_PR17|macro|EXTI_PR_PR17
DECL|EXTI_PR_PR18_Msk|macro|EXTI_PR_PR18_Msk
DECL|EXTI_PR_PR18_Pos|macro|EXTI_PR_PR18_Pos
DECL|EXTI_PR_PR18|macro|EXTI_PR_PR18
DECL|EXTI_PR_PR19_Msk|macro|EXTI_PR_PR19_Msk
DECL|EXTI_PR_PR19_Pos|macro|EXTI_PR_PR19_Pos
DECL|EXTI_PR_PR19|macro|EXTI_PR_PR19
DECL|EXTI_PR_PR1_Msk|macro|EXTI_PR_PR1_Msk
DECL|EXTI_PR_PR1_Pos|macro|EXTI_PR_PR1_Pos
DECL|EXTI_PR_PR1|macro|EXTI_PR_PR1
DECL|EXTI_PR_PR20_Msk|macro|EXTI_PR_PR20_Msk
DECL|EXTI_PR_PR20_Pos|macro|EXTI_PR_PR20_Pos
DECL|EXTI_PR_PR20|macro|EXTI_PR_PR20
DECL|EXTI_PR_PR21_Msk|macro|EXTI_PR_PR21_Msk
DECL|EXTI_PR_PR21_Pos|macro|EXTI_PR_PR21_Pos
DECL|EXTI_PR_PR21|macro|EXTI_PR_PR21
DECL|EXTI_PR_PR22_Msk|macro|EXTI_PR_PR22_Msk
DECL|EXTI_PR_PR22_Pos|macro|EXTI_PR_PR22_Pos
DECL|EXTI_PR_PR22|macro|EXTI_PR_PR22
DECL|EXTI_PR_PR23_Msk|macro|EXTI_PR_PR23_Msk
DECL|EXTI_PR_PR23_Pos|macro|EXTI_PR_PR23_Pos
DECL|EXTI_PR_PR23|macro|EXTI_PR_PR23
DECL|EXTI_PR_PR2_Msk|macro|EXTI_PR_PR2_Msk
DECL|EXTI_PR_PR2_Pos|macro|EXTI_PR_PR2_Pos
DECL|EXTI_PR_PR2|macro|EXTI_PR_PR2
DECL|EXTI_PR_PR3_Msk|macro|EXTI_PR_PR3_Msk
DECL|EXTI_PR_PR3_Pos|macro|EXTI_PR_PR3_Pos
DECL|EXTI_PR_PR3|macro|EXTI_PR_PR3
DECL|EXTI_PR_PR4_Msk|macro|EXTI_PR_PR4_Msk
DECL|EXTI_PR_PR4_Pos|macro|EXTI_PR_PR4_Pos
DECL|EXTI_PR_PR4|macro|EXTI_PR_PR4
DECL|EXTI_PR_PR5_Msk|macro|EXTI_PR_PR5_Msk
DECL|EXTI_PR_PR5_Pos|macro|EXTI_PR_PR5_Pos
DECL|EXTI_PR_PR5|macro|EXTI_PR_PR5
DECL|EXTI_PR_PR6_Msk|macro|EXTI_PR_PR6_Msk
DECL|EXTI_PR_PR6_Pos|macro|EXTI_PR_PR6_Pos
DECL|EXTI_PR_PR6|macro|EXTI_PR_PR6
DECL|EXTI_PR_PR7_Msk|macro|EXTI_PR_PR7_Msk
DECL|EXTI_PR_PR7_Pos|macro|EXTI_PR_PR7_Pos
DECL|EXTI_PR_PR7|macro|EXTI_PR_PR7
DECL|EXTI_PR_PR8_Msk|macro|EXTI_PR_PR8_Msk
DECL|EXTI_PR_PR8_Pos|macro|EXTI_PR_PR8_Pos
DECL|EXTI_PR_PR8|macro|EXTI_PR_PR8
DECL|EXTI_PR_PR9_Msk|macro|EXTI_PR_PR9_Msk
DECL|EXTI_PR_PR9_Pos|macro|EXTI_PR_PR9_Pos
DECL|EXTI_PR_PR9|macro|EXTI_PR_PR9
DECL|EXTI_RTSR_TR0_Msk|macro|EXTI_RTSR_TR0_Msk
DECL|EXTI_RTSR_TR0_Pos|macro|EXTI_RTSR_TR0_Pos
DECL|EXTI_RTSR_TR0|macro|EXTI_RTSR_TR0
DECL|EXTI_RTSR_TR10_Msk|macro|EXTI_RTSR_TR10_Msk
DECL|EXTI_RTSR_TR10_Pos|macro|EXTI_RTSR_TR10_Pos
DECL|EXTI_RTSR_TR10|macro|EXTI_RTSR_TR10
DECL|EXTI_RTSR_TR11_Msk|macro|EXTI_RTSR_TR11_Msk
DECL|EXTI_RTSR_TR11_Pos|macro|EXTI_RTSR_TR11_Pos
DECL|EXTI_RTSR_TR11|macro|EXTI_RTSR_TR11
DECL|EXTI_RTSR_TR12_Msk|macro|EXTI_RTSR_TR12_Msk
DECL|EXTI_RTSR_TR12_Pos|macro|EXTI_RTSR_TR12_Pos
DECL|EXTI_RTSR_TR12|macro|EXTI_RTSR_TR12
DECL|EXTI_RTSR_TR13_Msk|macro|EXTI_RTSR_TR13_Msk
DECL|EXTI_RTSR_TR13_Pos|macro|EXTI_RTSR_TR13_Pos
DECL|EXTI_RTSR_TR13|macro|EXTI_RTSR_TR13
DECL|EXTI_RTSR_TR14_Msk|macro|EXTI_RTSR_TR14_Msk
DECL|EXTI_RTSR_TR14_Pos|macro|EXTI_RTSR_TR14_Pos
DECL|EXTI_RTSR_TR14|macro|EXTI_RTSR_TR14
DECL|EXTI_RTSR_TR15_Msk|macro|EXTI_RTSR_TR15_Msk
DECL|EXTI_RTSR_TR15_Pos|macro|EXTI_RTSR_TR15_Pos
DECL|EXTI_RTSR_TR15|macro|EXTI_RTSR_TR15
DECL|EXTI_RTSR_TR16_Msk|macro|EXTI_RTSR_TR16_Msk
DECL|EXTI_RTSR_TR16_Pos|macro|EXTI_RTSR_TR16_Pos
DECL|EXTI_RTSR_TR16|macro|EXTI_RTSR_TR16
DECL|EXTI_RTSR_TR17_Msk|macro|EXTI_RTSR_TR17_Msk
DECL|EXTI_RTSR_TR17_Pos|macro|EXTI_RTSR_TR17_Pos
DECL|EXTI_RTSR_TR17|macro|EXTI_RTSR_TR17
DECL|EXTI_RTSR_TR18_Msk|macro|EXTI_RTSR_TR18_Msk
DECL|EXTI_RTSR_TR18_Pos|macro|EXTI_RTSR_TR18_Pos
DECL|EXTI_RTSR_TR18|macro|EXTI_RTSR_TR18
DECL|EXTI_RTSR_TR19_Msk|macro|EXTI_RTSR_TR19_Msk
DECL|EXTI_RTSR_TR19_Pos|macro|EXTI_RTSR_TR19_Pos
DECL|EXTI_RTSR_TR19|macro|EXTI_RTSR_TR19
DECL|EXTI_RTSR_TR1_Msk|macro|EXTI_RTSR_TR1_Msk
DECL|EXTI_RTSR_TR1_Pos|macro|EXTI_RTSR_TR1_Pos
DECL|EXTI_RTSR_TR1|macro|EXTI_RTSR_TR1
DECL|EXTI_RTSR_TR20_Msk|macro|EXTI_RTSR_TR20_Msk
DECL|EXTI_RTSR_TR20_Pos|macro|EXTI_RTSR_TR20_Pos
DECL|EXTI_RTSR_TR20|macro|EXTI_RTSR_TR20
DECL|EXTI_RTSR_TR21_Msk|macro|EXTI_RTSR_TR21_Msk
DECL|EXTI_RTSR_TR21_Pos|macro|EXTI_RTSR_TR21_Pos
DECL|EXTI_RTSR_TR21|macro|EXTI_RTSR_TR21
DECL|EXTI_RTSR_TR22_Msk|macro|EXTI_RTSR_TR22_Msk
DECL|EXTI_RTSR_TR22_Pos|macro|EXTI_RTSR_TR22_Pos
DECL|EXTI_RTSR_TR22|macro|EXTI_RTSR_TR22
DECL|EXTI_RTSR_TR23_Msk|macro|EXTI_RTSR_TR23_Msk
DECL|EXTI_RTSR_TR23_Pos|macro|EXTI_RTSR_TR23_Pos
DECL|EXTI_RTSR_TR23|macro|EXTI_RTSR_TR23
DECL|EXTI_RTSR_TR2_Msk|macro|EXTI_RTSR_TR2_Msk
DECL|EXTI_RTSR_TR2_Pos|macro|EXTI_RTSR_TR2_Pos
DECL|EXTI_RTSR_TR2|macro|EXTI_RTSR_TR2
DECL|EXTI_RTSR_TR3_Msk|macro|EXTI_RTSR_TR3_Msk
DECL|EXTI_RTSR_TR3_Pos|macro|EXTI_RTSR_TR3_Pos
DECL|EXTI_RTSR_TR3|macro|EXTI_RTSR_TR3
DECL|EXTI_RTSR_TR4_Msk|macro|EXTI_RTSR_TR4_Msk
DECL|EXTI_RTSR_TR4_Pos|macro|EXTI_RTSR_TR4_Pos
DECL|EXTI_RTSR_TR4|macro|EXTI_RTSR_TR4
DECL|EXTI_RTSR_TR5_Msk|macro|EXTI_RTSR_TR5_Msk
DECL|EXTI_RTSR_TR5_Pos|macro|EXTI_RTSR_TR5_Pos
DECL|EXTI_RTSR_TR5|macro|EXTI_RTSR_TR5
DECL|EXTI_RTSR_TR6_Msk|macro|EXTI_RTSR_TR6_Msk
DECL|EXTI_RTSR_TR6_Pos|macro|EXTI_RTSR_TR6_Pos
DECL|EXTI_RTSR_TR6|macro|EXTI_RTSR_TR6
DECL|EXTI_RTSR_TR7_Msk|macro|EXTI_RTSR_TR7_Msk
DECL|EXTI_RTSR_TR7_Pos|macro|EXTI_RTSR_TR7_Pos
DECL|EXTI_RTSR_TR7|macro|EXTI_RTSR_TR7
DECL|EXTI_RTSR_TR8_Msk|macro|EXTI_RTSR_TR8_Msk
DECL|EXTI_RTSR_TR8_Pos|macro|EXTI_RTSR_TR8_Pos
DECL|EXTI_RTSR_TR8|macro|EXTI_RTSR_TR8
DECL|EXTI_RTSR_TR9_Msk|macro|EXTI_RTSR_TR9_Msk
DECL|EXTI_RTSR_TR9_Pos|macro|EXTI_RTSR_TR9_Pos
DECL|EXTI_RTSR_TR9|macro|EXTI_RTSR_TR9
DECL|EXTI_SWIER_SWIER0_Msk|macro|EXTI_SWIER_SWIER0_Msk
DECL|EXTI_SWIER_SWIER0_Pos|macro|EXTI_SWIER_SWIER0_Pos
DECL|EXTI_SWIER_SWIER0|macro|EXTI_SWIER_SWIER0
DECL|EXTI_SWIER_SWIER10_Msk|macro|EXTI_SWIER_SWIER10_Msk
DECL|EXTI_SWIER_SWIER10_Pos|macro|EXTI_SWIER_SWIER10_Pos
DECL|EXTI_SWIER_SWIER10|macro|EXTI_SWIER_SWIER10
DECL|EXTI_SWIER_SWIER11_Msk|macro|EXTI_SWIER_SWIER11_Msk
DECL|EXTI_SWIER_SWIER11_Pos|macro|EXTI_SWIER_SWIER11_Pos
DECL|EXTI_SWIER_SWIER11|macro|EXTI_SWIER_SWIER11
DECL|EXTI_SWIER_SWIER12_Msk|macro|EXTI_SWIER_SWIER12_Msk
DECL|EXTI_SWIER_SWIER12_Pos|macro|EXTI_SWIER_SWIER12_Pos
DECL|EXTI_SWIER_SWIER12|macro|EXTI_SWIER_SWIER12
DECL|EXTI_SWIER_SWIER13_Msk|macro|EXTI_SWIER_SWIER13_Msk
DECL|EXTI_SWIER_SWIER13_Pos|macro|EXTI_SWIER_SWIER13_Pos
DECL|EXTI_SWIER_SWIER13|macro|EXTI_SWIER_SWIER13
DECL|EXTI_SWIER_SWIER14_Msk|macro|EXTI_SWIER_SWIER14_Msk
DECL|EXTI_SWIER_SWIER14_Pos|macro|EXTI_SWIER_SWIER14_Pos
DECL|EXTI_SWIER_SWIER14|macro|EXTI_SWIER_SWIER14
DECL|EXTI_SWIER_SWIER15_Msk|macro|EXTI_SWIER_SWIER15_Msk
DECL|EXTI_SWIER_SWIER15_Pos|macro|EXTI_SWIER_SWIER15_Pos
DECL|EXTI_SWIER_SWIER15|macro|EXTI_SWIER_SWIER15
DECL|EXTI_SWIER_SWIER16_Msk|macro|EXTI_SWIER_SWIER16_Msk
DECL|EXTI_SWIER_SWIER16_Pos|macro|EXTI_SWIER_SWIER16_Pos
DECL|EXTI_SWIER_SWIER16|macro|EXTI_SWIER_SWIER16
DECL|EXTI_SWIER_SWIER17_Msk|macro|EXTI_SWIER_SWIER17_Msk
DECL|EXTI_SWIER_SWIER17_Pos|macro|EXTI_SWIER_SWIER17_Pos
DECL|EXTI_SWIER_SWIER17|macro|EXTI_SWIER_SWIER17
DECL|EXTI_SWIER_SWIER18_Msk|macro|EXTI_SWIER_SWIER18_Msk
DECL|EXTI_SWIER_SWIER18_Pos|macro|EXTI_SWIER_SWIER18_Pos
DECL|EXTI_SWIER_SWIER18|macro|EXTI_SWIER_SWIER18
DECL|EXTI_SWIER_SWIER19_Msk|macro|EXTI_SWIER_SWIER19_Msk
DECL|EXTI_SWIER_SWIER19_Pos|macro|EXTI_SWIER_SWIER19_Pos
DECL|EXTI_SWIER_SWIER19|macro|EXTI_SWIER_SWIER19
DECL|EXTI_SWIER_SWIER1_Msk|macro|EXTI_SWIER_SWIER1_Msk
DECL|EXTI_SWIER_SWIER1_Pos|macro|EXTI_SWIER_SWIER1_Pos
DECL|EXTI_SWIER_SWIER1|macro|EXTI_SWIER_SWIER1
DECL|EXTI_SWIER_SWIER20_Msk|macro|EXTI_SWIER_SWIER20_Msk
DECL|EXTI_SWIER_SWIER20_Pos|macro|EXTI_SWIER_SWIER20_Pos
DECL|EXTI_SWIER_SWIER20|macro|EXTI_SWIER_SWIER20
DECL|EXTI_SWIER_SWIER21_Msk|macro|EXTI_SWIER_SWIER21_Msk
DECL|EXTI_SWIER_SWIER21_Pos|macro|EXTI_SWIER_SWIER21_Pos
DECL|EXTI_SWIER_SWIER21|macro|EXTI_SWIER_SWIER21
DECL|EXTI_SWIER_SWIER22_Msk|macro|EXTI_SWIER_SWIER22_Msk
DECL|EXTI_SWIER_SWIER22_Pos|macro|EXTI_SWIER_SWIER22_Pos
DECL|EXTI_SWIER_SWIER22|macro|EXTI_SWIER_SWIER22
DECL|EXTI_SWIER_SWIER23_Msk|macro|EXTI_SWIER_SWIER23_Msk
DECL|EXTI_SWIER_SWIER23_Pos|macro|EXTI_SWIER_SWIER23_Pos
DECL|EXTI_SWIER_SWIER23|macro|EXTI_SWIER_SWIER23
DECL|EXTI_SWIER_SWIER2_Msk|macro|EXTI_SWIER_SWIER2_Msk
DECL|EXTI_SWIER_SWIER2_Pos|macro|EXTI_SWIER_SWIER2_Pos
DECL|EXTI_SWIER_SWIER2|macro|EXTI_SWIER_SWIER2
DECL|EXTI_SWIER_SWIER3_Msk|macro|EXTI_SWIER_SWIER3_Msk
DECL|EXTI_SWIER_SWIER3_Pos|macro|EXTI_SWIER_SWIER3_Pos
DECL|EXTI_SWIER_SWIER3|macro|EXTI_SWIER_SWIER3
DECL|EXTI_SWIER_SWIER4_Msk|macro|EXTI_SWIER_SWIER4_Msk
DECL|EXTI_SWIER_SWIER4_Pos|macro|EXTI_SWIER_SWIER4_Pos
DECL|EXTI_SWIER_SWIER4|macro|EXTI_SWIER_SWIER4
DECL|EXTI_SWIER_SWIER5_Msk|macro|EXTI_SWIER_SWIER5_Msk
DECL|EXTI_SWIER_SWIER5_Pos|macro|EXTI_SWIER_SWIER5_Pos
DECL|EXTI_SWIER_SWIER5|macro|EXTI_SWIER_SWIER5
DECL|EXTI_SWIER_SWIER6_Msk|macro|EXTI_SWIER_SWIER6_Msk
DECL|EXTI_SWIER_SWIER6_Pos|macro|EXTI_SWIER_SWIER6_Pos
DECL|EXTI_SWIER_SWIER6|macro|EXTI_SWIER_SWIER6
DECL|EXTI_SWIER_SWIER7_Msk|macro|EXTI_SWIER_SWIER7_Msk
DECL|EXTI_SWIER_SWIER7_Pos|macro|EXTI_SWIER_SWIER7_Pos
DECL|EXTI_SWIER_SWIER7|macro|EXTI_SWIER_SWIER7
DECL|EXTI_SWIER_SWIER8_Msk|macro|EXTI_SWIER_SWIER8_Msk
DECL|EXTI_SWIER_SWIER8_Pos|macro|EXTI_SWIER_SWIER8_Pos
DECL|EXTI_SWIER_SWIER8|macro|EXTI_SWIER_SWIER8
DECL|EXTI_SWIER_SWIER9_Msk|macro|EXTI_SWIER_SWIER9_Msk
DECL|EXTI_SWIER_SWIER9_Pos|macro|EXTI_SWIER_SWIER9_Pos
DECL|EXTI_SWIER_SWIER9|macro|EXTI_SWIER_SWIER9
DECL|EXTI_TypeDef|typedef|} EXTI_TypeDef;
DECL|EXTI|macro|EXTI
DECL|FA1R|member|__IO uint32_t FA1R; /*!< CAN filter activation register, Address offset: 0x21C */
DECL|FCR|member|__IO uint32_t FCR; /*!< DMA stream x FIFO control register */
DECL|FCR|member|__IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset: 0x0C */
DECL|FFA1R|member|__IO uint32_t FFA1R; /*!< CAN filter FIFO assignment register, Address offset: 0x214 */
DECL|FIFOCNT|member|__I uint32_t FIFOCNT; /*!< SDMMC FIFO counter register, Address offset: 0x48 */
DECL|FIFO|member|__IO uint32_t FIFO; /*!< SDMMC data FIFO register, Address offset: 0x80 */
DECL|FLASHAXI_BASE|macro|FLASHAXI_BASE
DECL|FLASHITCM_BASE|macro|FLASHITCM_BASE
DECL|FLASHSIZE_BASE|macro|FLASHSIZE_BASE
DECL|FLASH_ACR_ARTEN_Msk|macro|FLASH_ACR_ARTEN_Msk
DECL|FLASH_ACR_ARTEN_Pos|macro|FLASH_ACR_ARTEN_Pos
DECL|FLASH_ACR_ARTEN|macro|FLASH_ACR_ARTEN
DECL|FLASH_ACR_ARTRST_Msk|macro|FLASH_ACR_ARTRST_Msk
DECL|FLASH_ACR_ARTRST_Pos|macro|FLASH_ACR_ARTRST_Pos
DECL|FLASH_ACR_ARTRST|macro|FLASH_ACR_ARTRST
DECL|FLASH_ACR_LATENCY_0WS|macro|FLASH_ACR_LATENCY_0WS
DECL|FLASH_ACR_LATENCY_10WS|macro|FLASH_ACR_LATENCY_10WS
DECL|FLASH_ACR_LATENCY_11WS|macro|FLASH_ACR_LATENCY_11WS
DECL|FLASH_ACR_LATENCY_12WS|macro|FLASH_ACR_LATENCY_12WS
DECL|FLASH_ACR_LATENCY_13WS|macro|FLASH_ACR_LATENCY_13WS
DECL|FLASH_ACR_LATENCY_14WS|macro|FLASH_ACR_LATENCY_14WS
DECL|FLASH_ACR_LATENCY_15WS|macro|FLASH_ACR_LATENCY_15WS
DECL|FLASH_ACR_LATENCY_1WS|macro|FLASH_ACR_LATENCY_1WS
DECL|FLASH_ACR_LATENCY_2WS|macro|FLASH_ACR_LATENCY_2WS
DECL|FLASH_ACR_LATENCY_3WS|macro|FLASH_ACR_LATENCY_3WS
DECL|FLASH_ACR_LATENCY_4WS|macro|FLASH_ACR_LATENCY_4WS
DECL|FLASH_ACR_LATENCY_5WS|macro|FLASH_ACR_LATENCY_5WS
DECL|FLASH_ACR_LATENCY_6WS|macro|FLASH_ACR_LATENCY_6WS
DECL|FLASH_ACR_LATENCY_7WS|macro|FLASH_ACR_LATENCY_7WS
DECL|FLASH_ACR_LATENCY_8WS|macro|FLASH_ACR_LATENCY_8WS
DECL|FLASH_ACR_LATENCY_9WS|macro|FLASH_ACR_LATENCY_9WS
DECL|FLASH_ACR_LATENCY_Msk|macro|FLASH_ACR_LATENCY_Msk
DECL|FLASH_ACR_LATENCY_Pos|macro|FLASH_ACR_LATENCY_Pos
DECL|FLASH_ACR_LATENCY|macro|FLASH_ACR_LATENCY
DECL|FLASH_ACR_PRFTEN_Msk|macro|FLASH_ACR_PRFTEN_Msk
DECL|FLASH_ACR_PRFTEN_Pos|macro|FLASH_ACR_PRFTEN_Pos
DECL|FLASH_ACR_PRFTEN|macro|FLASH_ACR_PRFTEN
DECL|FLASH_BASE|macro|FLASH_BASE
DECL|FLASH_CR_EOPIE_Msk|macro|FLASH_CR_EOPIE_Msk
DECL|FLASH_CR_EOPIE_Pos|macro|FLASH_CR_EOPIE_Pos
DECL|FLASH_CR_EOPIE|macro|FLASH_CR_EOPIE
DECL|FLASH_CR_ERRIE_Msk|macro|FLASH_CR_ERRIE_Msk
DECL|FLASH_CR_ERRIE_Pos|macro|FLASH_CR_ERRIE_Pos
DECL|FLASH_CR_ERRIE|macro|FLASH_CR_ERRIE
DECL|FLASH_CR_LOCK_Msk|macro|FLASH_CR_LOCK_Msk
DECL|FLASH_CR_LOCK_Pos|macro|FLASH_CR_LOCK_Pos
DECL|FLASH_CR_LOCK|macro|FLASH_CR_LOCK
DECL|FLASH_CR_MER_Msk|macro|FLASH_CR_MER_Msk
DECL|FLASH_CR_MER_Pos|macro|FLASH_CR_MER_Pos
DECL|FLASH_CR_MER|macro|FLASH_CR_MER
DECL|FLASH_CR_PG_Msk|macro|FLASH_CR_PG_Msk
DECL|FLASH_CR_PG_Pos|macro|FLASH_CR_PG_Pos
DECL|FLASH_CR_PG|macro|FLASH_CR_PG
DECL|FLASH_CR_PSIZE_0|macro|FLASH_CR_PSIZE_0
DECL|FLASH_CR_PSIZE_1|macro|FLASH_CR_PSIZE_1
DECL|FLASH_CR_PSIZE_Msk|macro|FLASH_CR_PSIZE_Msk
DECL|FLASH_CR_PSIZE_Pos|macro|FLASH_CR_PSIZE_Pos
DECL|FLASH_CR_PSIZE|macro|FLASH_CR_PSIZE
DECL|FLASH_CR_RDERRIE_Msk|macro|FLASH_CR_RDERRIE_Msk
DECL|FLASH_CR_RDERRIE_Pos|macro|FLASH_CR_RDERRIE_Pos
DECL|FLASH_CR_RDERRIE|macro|FLASH_CR_RDERRIE
DECL|FLASH_CR_SER_Msk|macro|FLASH_CR_SER_Msk
DECL|FLASH_CR_SER_Pos|macro|FLASH_CR_SER_Pos
DECL|FLASH_CR_SER|macro|FLASH_CR_SER
DECL|FLASH_CR_SNB_0|macro|FLASH_CR_SNB_0
DECL|FLASH_CR_SNB_1|macro|FLASH_CR_SNB_1
DECL|FLASH_CR_SNB_2|macro|FLASH_CR_SNB_2
DECL|FLASH_CR_SNB_3|macro|FLASH_CR_SNB_3
DECL|FLASH_CR_SNB_Msk|macro|FLASH_CR_SNB_Msk
DECL|FLASH_CR_SNB_Pos|macro|FLASH_CR_SNB_Pos
DECL|FLASH_CR_SNB|macro|FLASH_CR_SNB
DECL|FLASH_CR_STRT_Msk|macro|FLASH_CR_STRT_Msk
DECL|FLASH_CR_STRT_Pos|macro|FLASH_CR_STRT_Pos
DECL|FLASH_CR_STRT|macro|FLASH_CR_STRT
DECL|FLASH_END|macro|FLASH_END
DECL|FLASH_IRQn|enumerator|FLASH_IRQn = 4, /*!< FLASH global Interrupt */
DECL|FLASH_OPTCR1_BOOT_ADD0_Msk|macro|FLASH_OPTCR1_BOOT_ADD0_Msk
DECL|FLASH_OPTCR1_BOOT_ADD0_Pos|macro|FLASH_OPTCR1_BOOT_ADD0_Pos
DECL|FLASH_OPTCR1_BOOT_ADD0|macro|FLASH_OPTCR1_BOOT_ADD0
DECL|FLASH_OPTCR1_BOOT_ADD1_Msk|macro|FLASH_OPTCR1_BOOT_ADD1_Msk
DECL|FLASH_OPTCR1_BOOT_ADD1_Pos|macro|FLASH_OPTCR1_BOOT_ADD1_Pos
DECL|FLASH_OPTCR1_BOOT_ADD1|macro|FLASH_OPTCR1_BOOT_ADD1
DECL|FLASH_OPTCR2_PCROP_0|macro|FLASH_OPTCR2_PCROP_0
DECL|FLASH_OPTCR2_PCROP_1|macro|FLASH_OPTCR2_PCROP_1
DECL|FLASH_OPTCR2_PCROP_2|macro|FLASH_OPTCR2_PCROP_2
DECL|FLASH_OPTCR2_PCROP_3|macro|FLASH_OPTCR2_PCROP_3
DECL|FLASH_OPTCR2_PCROP_4|macro|FLASH_OPTCR2_PCROP_4
DECL|FLASH_OPTCR2_PCROP_5|macro|FLASH_OPTCR2_PCROP_5
DECL|FLASH_OPTCR2_PCROP_6|macro|FLASH_OPTCR2_PCROP_6
DECL|FLASH_OPTCR2_PCROP_7|macro|FLASH_OPTCR2_PCROP_7
DECL|FLASH_OPTCR2_PCROP_Msk|macro|FLASH_OPTCR2_PCROP_Msk
DECL|FLASH_OPTCR2_PCROP_Pos|macro|FLASH_OPTCR2_PCROP_Pos
DECL|FLASH_OPTCR2_PCROP_RDP_Msk|macro|FLASH_OPTCR2_PCROP_RDP_Msk
DECL|FLASH_OPTCR2_PCROP_RDP_Pos|macro|FLASH_OPTCR2_PCROP_RDP_Pos
DECL|FLASH_OPTCR2_PCROP_RDP|macro|FLASH_OPTCR2_PCROP_RDP
DECL|FLASH_OPTCR2_PCROP|macro|FLASH_OPTCR2_PCROP
DECL|FLASH_OPTCR_BOR_LEV_0|macro|FLASH_OPTCR_BOR_LEV_0
DECL|FLASH_OPTCR_BOR_LEV_1|macro|FLASH_OPTCR_BOR_LEV_1
DECL|FLASH_OPTCR_BOR_LEV_Msk|macro|FLASH_OPTCR_BOR_LEV_Msk
DECL|FLASH_OPTCR_BOR_LEV_Pos|macro|FLASH_OPTCR_BOR_LEV_Pos
DECL|FLASH_OPTCR_BOR_LEV|macro|FLASH_OPTCR_BOR_LEV
DECL|FLASH_OPTCR_IWDG_STDBY_Msk|macro|FLASH_OPTCR_IWDG_STDBY_Msk
DECL|FLASH_OPTCR_IWDG_STDBY_Pos|macro|FLASH_OPTCR_IWDG_STDBY_Pos
DECL|FLASH_OPTCR_IWDG_STDBY|macro|FLASH_OPTCR_IWDG_STDBY
DECL|FLASH_OPTCR_IWDG_STOP_Msk|macro|FLASH_OPTCR_IWDG_STOP_Msk
DECL|FLASH_OPTCR_IWDG_STOP_Pos|macro|FLASH_OPTCR_IWDG_STOP_Pos
DECL|FLASH_OPTCR_IWDG_STOP|macro|FLASH_OPTCR_IWDG_STOP
DECL|FLASH_OPTCR_IWDG_SW_Msk|macro|FLASH_OPTCR_IWDG_SW_Msk
DECL|FLASH_OPTCR_IWDG_SW_Pos|macro|FLASH_OPTCR_IWDG_SW_Pos
DECL|FLASH_OPTCR_IWDG_SW|macro|FLASH_OPTCR_IWDG_SW
DECL|FLASH_OPTCR_OPTLOCK_Msk|macro|FLASH_OPTCR_OPTLOCK_Msk
DECL|FLASH_OPTCR_OPTLOCK_Pos|macro|FLASH_OPTCR_OPTLOCK_Pos
DECL|FLASH_OPTCR_OPTLOCK|macro|FLASH_OPTCR_OPTLOCK
DECL|FLASH_OPTCR_OPTSTRT_Msk|macro|FLASH_OPTCR_OPTSTRT_Msk
DECL|FLASH_OPTCR_OPTSTRT_Pos|macro|FLASH_OPTCR_OPTSTRT_Pos
DECL|FLASH_OPTCR_OPTSTRT|macro|FLASH_OPTCR_OPTSTRT
DECL|FLASH_OPTCR_RDP_0|macro|FLASH_OPTCR_RDP_0
DECL|FLASH_OPTCR_RDP_1|macro|FLASH_OPTCR_RDP_1
DECL|FLASH_OPTCR_RDP_2|macro|FLASH_OPTCR_RDP_2
DECL|FLASH_OPTCR_RDP_3|macro|FLASH_OPTCR_RDP_3
DECL|FLASH_OPTCR_RDP_4|macro|FLASH_OPTCR_RDP_4
DECL|FLASH_OPTCR_RDP_5|macro|FLASH_OPTCR_RDP_5
DECL|FLASH_OPTCR_RDP_6|macro|FLASH_OPTCR_RDP_6
DECL|FLASH_OPTCR_RDP_7|macro|FLASH_OPTCR_RDP_7
DECL|FLASH_OPTCR_RDP_Msk|macro|FLASH_OPTCR_RDP_Msk
DECL|FLASH_OPTCR_RDP_Pos|macro|FLASH_OPTCR_RDP_Pos
DECL|FLASH_OPTCR_RDP|macro|FLASH_OPTCR_RDP
DECL|FLASH_OPTCR_WWDG_SW_Msk|macro|FLASH_OPTCR_WWDG_SW_Msk
DECL|FLASH_OPTCR_WWDG_SW_Pos|macro|FLASH_OPTCR_WWDG_SW_Pos
DECL|FLASH_OPTCR_WWDG_SW|macro|FLASH_OPTCR_WWDG_SW
DECL|FLASH_OPTCR_nRST_STDBY_Msk|macro|FLASH_OPTCR_nRST_STDBY_Msk
DECL|FLASH_OPTCR_nRST_STDBY_Pos|macro|FLASH_OPTCR_nRST_STDBY_Pos
DECL|FLASH_OPTCR_nRST_STDBY|macro|FLASH_OPTCR_nRST_STDBY
DECL|FLASH_OPTCR_nRST_STOP_Msk|macro|FLASH_OPTCR_nRST_STOP_Msk
DECL|FLASH_OPTCR_nRST_STOP_Pos|macro|FLASH_OPTCR_nRST_STOP_Pos
DECL|FLASH_OPTCR_nRST_STOP|macro|FLASH_OPTCR_nRST_STOP
DECL|FLASH_OPTCR_nWRP_0|macro|FLASH_OPTCR_nWRP_0
DECL|FLASH_OPTCR_nWRP_1|macro|FLASH_OPTCR_nWRP_1
DECL|FLASH_OPTCR_nWRP_2|macro|FLASH_OPTCR_nWRP_2
DECL|FLASH_OPTCR_nWRP_3|macro|FLASH_OPTCR_nWRP_3
DECL|FLASH_OPTCR_nWRP_4|macro|FLASH_OPTCR_nWRP_4
DECL|FLASH_OPTCR_nWRP_5|macro|FLASH_OPTCR_nWRP_5
DECL|FLASH_OPTCR_nWRP_6|macro|FLASH_OPTCR_nWRP_6
DECL|FLASH_OPTCR_nWRP_7|macro|FLASH_OPTCR_nWRP_7
DECL|FLASH_OPTCR_nWRP_Msk|macro|FLASH_OPTCR_nWRP_Msk
DECL|FLASH_OPTCR_nWRP_Pos|macro|FLASH_OPTCR_nWRP_Pos
DECL|FLASH_OPTCR_nWRP|macro|FLASH_OPTCR_nWRP
DECL|FLASH_OTP_BASE|macro|FLASH_OTP_BASE
DECL|FLASH_OTP_END|macro|FLASH_OTP_END
DECL|FLASH_R_BASE|macro|FLASH_R_BASE
DECL|FLASH_SECTOR_TOTAL|macro|FLASH_SECTOR_TOTAL
DECL|FLASH_SR_BSY_Msk|macro|FLASH_SR_BSY_Msk
DECL|FLASH_SR_BSY_Pos|macro|FLASH_SR_BSY_Pos
DECL|FLASH_SR_BSY|macro|FLASH_SR_BSY
DECL|FLASH_SR_EOP_Msk|macro|FLASH_SR_EOP_Msk
DECL|FLASH_SR_EOP_Pos|macro|FLASH_SR_EOP_Pos
DECL|FLASH_SR_EOP|macro|FLASH_SR_EOP
DECL|FLASH_SR_ERSERR_Msk|macro|FLASH_SR_ERSERR_Msk
DECL|FLASH_SR_ERSERR_Pos|macro|FLASH_SR_ERSERR_Pos
DECL|FLASH_SR_ERSERR|macro|FLASH_SR_ERSERR
DECL|FLASH_SR_OPERR_Msk|macro|FLASH_SR_OPERR_Msk
DECL|FLASH_SR_OPERR_Pos|macro|FLASH_SR_OPERR_Pos
DECL|FLASH_SR_OPERR|macro|FLASH_SR_OPERR
DECL|FLASH_SR_PGAERR_Msk|macro|FLASH_SR_PGAERR_Msk
DECL|FLASH_SR_PGAERR_Pos|macro|FLASH_SR_PGAERR_Pos
DECL|FLASH_SR_PGAERR|macro|FLASH_SR_PGAERR
DECL|FLASH_SR_PGPERR_Msk|macro|FLASH_SR_PGPERR_Msk
DECL|FLASH_SR_PGPERR_Pos|macro|FLASH_SR_PGPERR_Pos
DECL|FLASH_SR_PGPERR|macro|FLASH_SR_PGPERR
DECL|FLASH_SR_RDERR_Msk|macro|FLASH_SR_RDERR_Msk
DECL|FLASH_SR_RDERR_Pos|macro|FLASH_SR_RDERR_Pos
DECL|FLASH_SR_RDERR|macro|FLASH_SR_RDERR
DECL|FLASH_SR_WRPERR_Msk|macro|FLASH_SR_WRPERR_Msk
DECL|FLASH_SR_WRPERR_Pos|macro|FLASH_SR_WRPERR_Pos
DECL|FLASH_SR_WRPERR|macro|FLASH_SR_WRPERR
DECL|FLASH_TypeDef|typedef|} FLASH_TypeDef;
DECL|FLASH|macro|FLASH
DECL|FM1R|member|__IO uint32_t FM1R; /*!< CAN filter mode register, Address offset: 0x204 */
DECL|FMC_BCR1_ASYNCWAIT_Msk|macro|FMC_BCR1_ASYNCWAIT_Msk
DECL|FMC_BCR1_ASYNCWAIT_Pos|macro|FMC_BCR1_ASYNCWAIT_Pos
DECL|FMC_BCR1_ASYNCWAIT|macro|FMC_BCR1_ASYNCWAIT
DECL|FMC_BCR1_BURSTEN_Msk|macro|FMC_BCR1_BURSTEN_Msk
DECL|FMC_BCR1_BURSTEN_Pos|macro|FMC_BCR1_BURSTEN_Pos
DECL|FMC_BCR1_BURSTEN|macro|FMC_BCR1_BURSTEN
DECL|FMC_BCR1_CBURSTRW_Msk|macro|FMC_BCR1_CBURSTRW_Msk
DECL|FMC_BCR1_CBURSTRW_Pos|macro|FMC_BCR1_CBURSTRW_Pos
DECL|FMC_BCR1_CBURSTRW|macro|FMC_BCR1_CBURSTRW
DECL|FMC_BCR1_CCLKEN_Msk|macro|FMC_BCR1_CCLKEN_Msk
DECL|FMC_BCR1_CCLKEN_Pos|macro|FMC_BCR1_CCLKEN_Pos
DECL|FMC_BCR1_CCLKEN|macro|FMC_BCR1_CCLKEN
DECL|FMC_BCR1_CPSIZE_0|macro|FMC_BCR1_CPSIZE_0
DECL|FMC_BCR1_CPSIZE_1|macro|FMC_BCR1_CPSIZE_1
DECL|FMC_BCR1_CPSIZE_2|macro|FMC_BCR1_CPSIZE_2
DECL|FMC_BCR1_CPSIZE_Msk|macro|FMC_BCR1_CPSIZE_Msk
DECL|FMC_BCR1_CPSIZE_Pos|macro|FMC_BCR1_CPSIZE_Pos
DECL|FMC_BCR1_CPSIZE|macro|FMC_BCR1_CPSIZE
DECL|FMC_BCR1_EXTMOD_Msk|macro|FMC_BCR1_EXTMOD_Msk
DECL|FMC_BCR1_EXTMOD_Pos|macro|FMC_BCR1_EXTMOD_Pos
DECL|FMC_BCR1_EXTMOD|macro|FMC_BCR1_EXTMOD
DECL|FMC_BCR1_FACCEN_Msk|macro|FMC_BCR1_FACCEN_Msk
DECL|FMC_BCR1_FACCEN_Pos|macro|FMC_BCR1_FACCEN_Pos
DECL|FMC_BCR1_FACCEN|macro|FMC_BCR1_FACCEN
DECL|FMC_BCR1_MBKEN_Msk|macro|FMC_BCR1_MBKEN_Msk
DECL|FMC_BCR1_MBKEN_Pos|macro|FMC_BCR1_MBKEN_Pos
DECL|FMC_BCR1_MBKEN|macro|FMC_BCR1_MBKEN
DECL|FMC_BCR1_MTYP_0|macro|FMC_BCR1_MTYP_0
DECL|FMC_BCR1_MTYP_1|macro|FMC_BCR1_MTYP_1
DECL|FMC_BCR1_MTYP_Msk|macro|FMC_BCR1_MTYP_Msk
DECL|FMC_BCR1_MTYP_Pos|macro|FMC_BCR1_MTYP_Pos
DECL|FMC_BCR1_MTYP|macro|FMC_BCR1_MTYP
DECL|FMC_BCR1_MUXEN_Msk|macro|FMC_BCR1_MUXEN_Msk
DECL|FMC_BCR1_MUXEN_Pos|macro|FMC_BCR1_MUXEN_Pos
DECL|FMC_BCR1_MUXEN|macro|FMC_BCR1_MUXEN
DECL|FMC_BCR1_MWID_0|macro|FMC_BCR1_MWID_0
DECL|FMC_BCR1_MWID_1|macro|FMC_BCR1_MWID_1
DECL|FMC_BCR1_MWID_Msk|macro|FMC_BCR1_MWID_Msk
DECL|FMC_BCR1_MWID_Pos|macro|FMC_BCR1_MWID_Pos
DECL|FMC_BCR1_MWID|macro|FMC_BCR1_MWID
DECL|FMC_BCR1_WAITCFG_Msk|macro|FMC_BCR1_WAITCFG_Msk
DECL|FMC_BCR1_WAITCFG_Pos|macro|FMC_BCR1_WAITCFG_Pos
DECL|FMC_BCR1_WAITCFG|macro|FMC_BCR1_WAITCFG
DECL|FMC_BCR1_WAITEN_Msk|macro|FMC_BCR1_WAITEN_Msk
DECL|FMC_BCR1_WAITEN_Pos|macro|FMC_BCR1_WAITEN_Pos
DECL|FMC_BCR1_WAITEN|macro|FMC_BCR1_WAITEN
DECL|FMC_BCR1_WAITPOL_Msk|macro|FMC_BCR1_WAITPOL_Msk
DECL|FMC_BCR1_WAITPOL_Pos|macro|FMC_BCR1_WAITPOL_Pos
DECL|FMC_BCR1_WAITPOL|macro|FMC_BCR1_WAITPOL
DECL|FMC_BCR1_WFDIS_Msk|macro|FMC_BCR1_WFDIS_Msk
DECL|FMC_BCR1_WFDIS_Pos|macro|FMC_BCR1_WFDIS_Pos
DECL|FMC_BCR1_WFDIS|macro|FMC_BCR1_WFDIS
DECL|FMC_BCR1_WRAPMOD_Msk|macro|FMC_BCR1_WRAPMOD_Msk
DECL|FMC_BCR1_WRAPMOD_Pos|macro|FMC_BCR1_WRAPMOD_Pos
DECL|FMC_BCR1_WRAPMOD|macro|FMC_BCR1_WRAPMOD
DECL|FMC_BCR1_WREN_Msk|macro|FMC_BCR1_WREN_Msk
DECL|FMC_BCR1_WREN_Pos|macro|FMC_BCR1_WREN_Pos
DECL|FMC_BCR1_WREN|macro|FMC_BCR1_WREN
DECL|FMC_BCR2_ASYNCWAIT_Msk|macro|FMC_BCR2_ASYNCWAIT_Msk
DECL|FMC_BCR2_ASYNCWAIT_Pos|macro|FMC_BCR2_ASYNCWAIT_Pos
DECL|FMC_BCR2_ASYNCWAIT|macro|FMC_BCR2_ASYNCWAIT
DECL|FMC_BCR2_BURSTEN_Msk|macro|FMC_BCR2_BURSTEN_Msk
DECL|FMC_BCR2_BURSTEN_Pos|macro|FMC_BCR2_BURSTEN_Pos
DECL|FMC_BCR2_BURSTEN|macro|FMC_BCR2_BURSTEN
DECL|FMC_BCR2_CBURSTRW_Msk|macro|FMC_BCR2_CBURSTRW_Msk
DECL|FMC_BCR2_CBURSTRW_Pos|macro|FMC_BCR2_CBURSTRW_Pos
DECL|FMC_BCR2_CBURSTRW|macro|FMC_BCR2_CBURSTRW
DECL|FMC_BCR2_CPSIZE_0|macro|FMC_BCR2_CPSIZE_0
DECL|FMC_BCR2_CPSIZE_1|macro|FMC_BCR2_CPSIZE_1
DECL|FMC_BCR2_CPSIZE_2|macro|FMC_BCR2_CPSIZE_2
DECL|FMC_BCR2_CPSIZE_Msk|macro|FMC_BCR2_CPSIZE_Msk
DECL|FMC_BCR2_CPSIZE_Pos|macro|FMC_BCR2_CPSIZE_Pos
DECL|FMC_BCR2_CPSIZE|macro|FMC_BCR2_CPSIZE
DECL|FMC_BCR2_EXTMOD_Msk|macro|FMC_BCR2_EXTMOD_Msk
DECL|FMC_BCR2_EXTMOD_Pos|macro|FMC_BCR2_EXTMOD_Pos
DECL|FMC_BCR2_EXTMOD|macro|FMC_BCR2_EXTMOD
DECL|FMC_BCR2_FACCEN_Msk|macro|FMC_BCR2_FACCEN_Msk
DECL|FMC_BCR2_FACCEN_Pos|macro|FMC_BCR2_FACCEN_Pos
DECL|FMC_BCR2_FACCEN|macro|FMC_BCR2_FACCEN
DECL|FMC_BCR2_MBKEN_Msk|macro|FMC_BCR2_MBKEN_Msk
DECL|FMC_BCR2_MBKEN_Pos|macro|FMC_BCR2_MBKEN_Pos
DECL|FMC_BCR2_MBKEN|macro|FMC_BCR2_MBKEN
DECL|FMC_BCR2_MTYP_0|macro|FMC_BCR2_MTYP_0
DECL|FMC_BCR2_MTYP_1|macro|FMC_BCR2_MTYP_1
DECL|FMC_BCR2_MTYP_Msk|macro|FMC_BCR2_MTYP_Msk
DECL|FMC_BCR2_MTYP_Pos|macro|FMC_BCR2_MTYP_Pos
DECL|FMC_BCR2_MTYP|macro|FMC_BCR2_MTYP
DECL|FMC_BCR2_MUXEN_Msk|macro|FMC_BCR2_MUXEN_Msk
DECL|FMC_BCR2_MUXEN_Pos|macro|FMC_BCR2_MUXEN_Pos
DECL|FMC_BCR2_MUXEN|macro|FMC_BCR2_MUXEN
DECL|FMC_BCR2_MWID_0|macro|FMC_BCR2_MWID_0
DECL|FMC_BCR2_MWID_1|macro|FMC_BCR2_MWID_1
DECL|FMC_BCR2_MWID_Msk|macro|FMC_BCR2_MWID_Msk
DECL|FMC_BCR2_MWID_Pos|macro|FMC_BCR2_MWID_Pos
DECL|FMC_BCR2_MWID|macro|FMC_BCR2_MWID
DECL|FMC_BCR2_WAITCFG_Msk|macro|FMC_BCR2_WAITCFG_Msk
DECL|FMC_BCR2_WAITCFG_Pos|macro|FMC_BCR2_WAITCFG_Pos
DECL|FMC_BCR2_WAITCFG|macro|FMC_BCR2_WAITCFG
DECL|FMC_BCR2_WAITEN_Msk|macro|FMC_BCR2_WAITEN_Msk
DECL|FMC_BCR2_WAITEN_Pos|macro|FMC_BCR2_WAITEN_Pos
DECL|FMC_BCR2_WAITEN|macro|FMC_BCR2_WAITEN
DECL|FMC_BCR2_WAITPOL_Msk|macro|FMC_BCR2_WAITPOL_Msk
DECL|FMC_BCR2_WAITPOL_Pos|macro|FMC_BCR2_WAITPOL_Pos
DECL|FMC_BCR2_WAITPOL|macro|FMC_BCR2_WAITPOL
DECL|FMC_BCR2_WRAPMOD_Msk|macro|FMC_BCR2_WRAPMOD_Msk
DECL|FMC_BCR2_WRAPMOD_Pos|macro|FMC_BCR2_WRAPMOD_Pos
DECL|FMC_BCR2_WRAPMOD|macro|FMC_BCR2_WRAPMOD
DECL|FMC_BCR2_WREN_Msk|macro|FMC_BCR2_WREN_Msk
DECL|FMC_BCR2_WREN_Pos|macro|FMC_BCR2_WREN_Pos
DECL|FMC_BCR2_WREN|macro|FMC_BCR2_WREN
DECL|FMC_BCR3_ASYNCWAIT_Msk|macro|FMC_BCR3_ASYNCWAIT_Msk
DECL|FMC_BCR3_ASYNCWAIT_Pos|macro|FMC_BCR3_ASYNCWAIT_Pos
DECL|FMC_BCR3_ASYNCWAIT|macro|FMC_BCR3_ASYNCWAIT
DECL|FMC_BCR3_BURSTEN_Msk|macro|FMC_BCR3_BURSTEN_Msk
DECL|FMC_BCR3_BURSTEN_Pos|macro|FMC_BCR3_BURSTEN_Pos
DECL|FMC_BCR3_BURSTEN|macro|FMC_BCR3_BURSTEN
DECL|FMC_BCR3_CBURSTRW_Msk|macro|FMC_BCR3_CBURSTRW_Msk
DECL|FMC_BCR3_CBURSTRW_Pos|macro|FMC_BCR3_CBURSTRW_Pos
DECL|FMC_BCR3_CBURSTRW|macro|FMC_BCR3_CBURSTRW
DECL|FMC_BCR3_CPSIZE_0|macro|FMC_BCR3_CPSIZE_0
DECL|FMC_BCR3_CPSIZE_1|macro|FMC_BCR3_CPSIZE_1
DECL|FMC_BCR3_CPSIZE_2|macro|FMC_BCR3_CPSIZE_2
DECL|FMC_BCR3_CPSIZE_Msk|macro|FMC_BCR3_CPSIZE_Msk
DECL|FMC_BCR3_CPSIZE_Pos|macro|FMC_BCR3_CPSIZE_Pos
DECL|FMC_BCR3_CPSIZE|macro|FMC_BCR3_CPSIZE
DECL|FMC_BCR3_EXTMOD_Msk|macro|FMC_BCR3_EXTMOD_Msk
DECL|FMC_BCR3_EXTMOD_Pos|macro|FMC_BCR3_EXTMOD_Pos
DECL|FMC_BCR3_EXTMOD|macro|FMC_BCR3_EXTMOD
DECL|FMC_BCR3_FACCEN_Msk|macro|FMC_BCR3_FACCEN_Msk
DECL|FMC_BCR3_FACCEN_Pos|macro|FMC_BCR3_FACCEN_Pos
DECL|FMC_BCR3_FACCEN|macro|FMC_BCR3_FACCEN
DECL|FMC_BCR3_MBKEN_Msk|macro|FMC_BCR3_MBKEN_Msk
DECL|FMC_BCR3_MBKEN_Pos|macro|FMC_BCR3_MBKEN_Pos
DECL|FMC_BCR3_MBKEN|macro|FMC_BCR3_MBKEN
DECL|FMC_BCR3_MTYP_0|macro|FMC_BCR3_MTYP_0
DECL|FMC_BCR3_MTYP_1|macro|FMC_BCR3_MTYP_1
DECL|FMC_BCR3_MTYP_Msk|macro|FMC_BCR3_MTYP_Msk
DECL|FMC_BCR3_MTYP_Pos|macro|FMC_BCR3_MTYP_Pos
DECL|FMC_BCR3_MTYP|macro|FMC_BCR3_MTYP
DECL|FMC_BCR3_MUXEN_Msk|macro|FMC_BCR3_MUXEN_Msk
DECL|FMC_BCR3_MUXEN_Pos|macro|FMC_BCR3_MUXEN_Pos
DECL|FMC_BCR3_MUXEN|macro|FMC_BCR3_MUXEN
DECL|FMC_BCR3_MWID_0|macro|FMC_BCR3_MWID_0
DECL|FMC_BCR3_MWID_1|macro|FMC_BCR3_MWID_1
DECL|FMC_BCR3_MWID_Msk|macro|FMC_BCR3_MWID_Msk
DECL|FMC_BCR3_MWID_Pos|macro|FMC_BCR3_MWID_Pos
DECL|FMC_BCR3_MWID|macro|FMC_BCR3_MWID
DECL|FMC_BCR3_WAITCFG_Msk|macro|FMC_BCR3_WAITCFG_Msk
DECL|FMC_BCR3_WAITCFG_Pos|macro|FMC_BCR3_WAITCFG_Pos
DECL|FMC_BCR3_WAITCFG|macro|FMC_BCR3_WAITCFG
DECL|FMC_BCR3_WAITEN_Msk|macro|FMC_BCR3_WAITEN_Msk
DECL|FMC_BCR3_WAITEN_Pos|macro|FMC_BCR3_WAITEN_Pos
DECL|FMC_BCR3_WAITEN|macro|FMC_BCR3_WAITEN
DECL|FMC_BCR3_WAITPOL_Msk|macro|FMC_BCR3_WAITPOL_Msk
DECL|FMC_BCR3_WAITPOL_Pos|macro|FMC_BCR3_WAITPOL_Pos
DECL|FMC_BCR3_WAITPOL|macro|FMC_BCR3_WAITPOL
DECL|FMC_BCR3_WRAPMOD_Msk|macro|FMC_BCR3_WRAPMOD_Msk
DECL|FMC_BCR3_WRAPMOD_Pos|macro|FMC_BCR3_WRAPMOD_Pos
DECL|FMC_BCR3_WRAPMOD|macro|FMC_BCR3_WRAPMOD
DECL|FMC_BCR3_WREN_Msk|macro|FMC_BCR3_WREN_Msk
DECL|FMC_BCR3_WREN_Pos|macro|FMC_BCR3_WREN_Pos
DECL|FMC_BCR3_WREN|macro|FMC_BCR3_WREN
DECL|FMC_BCR4_ASYNCWAIT_Msk|macro|FMC_BCR4_ASYNCWAIT_Msk
DECL|FMC_BCR4_ASYNCWAIT_Pos|macro|FMC_BCR4_ASYNCWAIT_Pos
DECL|FMC_BCR4_ASYNCWAIT|macro|FMC_BCR4_ASYNCWAIT
DECL|FMC_BCR4_BURSTEN_Msk|macro|FMC_BCR4_BURSTEN_Msk
DECL|FMC_BCR4_BURSTEN_Pos|macro|FMC_BCR4_BURSTEN_Pos
DECL|FMC_BCR4_BURSTEN|macro|FMC_BCR4_BURSTEN
DECL|FMC_BCR4_CBURSTRW_Msk|macro|FMC_BCR4_CBURSTRW_Msk
DECL|FMC_BCR4_CBURSTRW_Pos|macro|FMC_BCR4_CBURSTRW_Pos
DECL|FMC_BCR4_CBURSTRW|macro|FMC_BCR4_CBURSTRW
DECL|FMC_BCR4_CPSIZE_0|macro|FMC_BCR4_CPSIZE_0
DECL|FMC_BCR4_CPSIZE_1|macro|FMC_BCR4_CPSIZE_1
DECL|FMC_BCR4_CPSIZE_2|macro|FMC_BCR4_CPSIZE_2
DECL|FMC_BCR4_CPSIZE_Msk|macro|FMC_BCR4_CPSIZE_Msk
DECL|FMC_BCR4_CPSIZE_Pos|macro|FMC_BCR4_CPSIZE_Pos
DECL|FMC_BCR4_CPSIZE|macro|FMC_BCR4_CPSIZE
DECL|FMC_BCR4_EXTMOD_Msk|macro|FMC_BCR4_EXTMOD_Msk
DECL|FMC_BCR4_EXTMOD_Pos|macro|FMC_BCR4_EXTMOD_Pos
DECL|FMC_BCR4_EXTMOD|macro|FMC_BCR4_EXTMOD
DECL|FMC_BCR4_FACCEN_Msk|macro|FMC_BCR4_FACCEN_Msk
DECL|FMC_BCR4_FACCEN_Pos|macro|FMC_BCR4_FACCEN_Pos
DECL|FMC_BCR4_FACCEN|macro|FMC_BCR4_FACCEN
DECL|FMC_BCR4_MBKEN_Msk|macro|FMC_BCR4_MBKEN_Msk
DECL|FMC_BCR4_MBKEN_Pos|macro|FMC_BCR4_MBKEN_Pos
DECL|FMC_BCR4_MBKEN|macro|FMC_BCR4_MBKEN
DECL|FMC_BCR4_MTYP_0|macro|FMC_BCR4_MTYP_0
DECL|FMC_BCR4_MTYP_1|macro|FMC_BCR4_MTYP_1
DECL|FMC_BCR4_MTYP_Msk|macro|FMC_BCR4_MTYP_Msk
DECL|FMC_BCR4_MTYP_Pos|macro|FMC_BCR4_MTYP_Pos
DECL|FMC_BCR4_MTYP|macro|FMC_BCR4_MTYP
DECL|FMC_BCR4_MUXEN_Msk|macro|FMC_BCR4_MUXEN_Msk
DECL|FMC_BCR4_MUXEN_Pos|macro|FMC_BCR4_MUXEN_Pos
DECL|FMC_BCR4_MUXEN|macro|FMC_BCR4_MUXEN
DECL|FMC_BCR4_MWID_0|macro|FMC_BCR4_MWID_0
DECL|FMC_BCR4_MWID_1|macro|FMC_BCR4_MWID_1
DECL|FMC_BCR4_MWID_Msk|macro|FMC_BCR4_MWID_Msk
DECL|FMC_BCR4_MWID_Pos|macro|FMC_BCR4_MWID_Pos
DECL|FMC_BCR4_MWID|macro|FMC_BCR4_MWID
DECL|FMC_BCR4_WAITCFG_Msk|macro|FMC_BCR4_WAITCFG_Msk
DECL|FMC_BCR4_WAITCFG_Pos|macro|FMC_BCR4_WAITCFG_Pos
DECL|FMC_BCR4_WAITCFG|macro|FMC_BCR4_WAITCFG
DECL|FMC_BCR4_WAITEN_Msk|macro|FMC_BCR4_WAITEN_Msk
DECL|FMC_BCR4_WAITEN_Pos|macro|FMC_BCR4_WAITEN_Pos
DECL|FMC_BCR4_WAITEN|macro|FMC_BCR4_WAITEN
DECL|FMC_BCR4_WAITPOL_Msk|macro|FMC_BCR4_WAITPOL_Msk
DECL|FMC_BCR4_WAITPOL_Pos|macro|FMC_BCR4_WAITPOL_Pos
DECL|FMC_BCR4_WAITPOL|macro|FMC_BCR4_WAITPOL
DECL|FMC_BCR4_WRAPMOD_Msk|macro|FMC_BCR4_WRAPMOD_Msk
DECL|FMC_BCR4_WRAPMOD_Pos|macro|FMC_BCR4_WRAPMOD_Pos
DECL|FMC_BCR4_WRAPMOD|macro|FMC_BCR4_WRAPMOD
DECL|FMC_BCR4_WREN_Msk|macro|FMC_BCR4_WREN_Msk
DECL|FMC_BCR4_WREN_Pos|macro|FMC_BCR4_WREN_Pos
DECL|FMC_BCR4_WREN|macro|FMC_BCR4_WREN
DECL|FMC_BTR1_ACCMOD_0|macro|FMC_BTR1_ACCMOD_0
DECL|FMC_BTR1_ACCMOD_1|macro|FMC_BTR1_ACCMOD_1
DECL|FMC_BTR1_ACCMOD_Msk|macro|FMC_BTR1_ACCMOD_Msk
DECL|FMC_BTR1_ACCMOD_Pos|macro|FMC_BTR1_ACCMOD_Pos
DECL|FMC_BTR1_ACCMOD|macro|FMC_BTR1_ACCMOD
DECL|FMC_BTR1_ADDHLD_0|macro|FMC_BTR1_ADDHLD_0
DECL|FMC_BTR1_ADDHLD_1|macro|FMC_BTR1_ADDHLD_1
DECL|FMC_BTR1_ADDHLD_2|macro|FMC_BTR1_ADDHLD_2
DECL|FMC_BTR1_ADDHLD_3|macro|FMC_BTR1_ADDHLD_3
DECL|FMC_BTR1_ADDHLD_Msk|macro|FMC_BTR1_ADDHLD_Msk
DECL|FMC_BTR1_ADDHLD_Pos|macro|FMC_BTR1_ADDHLD_Pos
DECL|FMC_BTR1_ADDHLD|macro|FMC_BTR1_ADDHLD
DECL|FMC_BTR1_ADDSET_0|macro|FMC_BTR1_ADDSET_0
DECL|FMC_BTR1_ADDSET_1|macro|FMC_BTR1_ADDSET_1
DECL|FMC_BTR1_ADDSET_2|macro|FMC_BTR1_ADDSET_2
DECL|FMC_BTR1_ADDSET_3|macro|FMC_BTR1_ADDSET_3
DECL|FMC_BTR1_ADDSET_Msk|macro|FMC_BTR1_ADDSET_Msk
DECL|FMC_BTR1_ADDSET_Pos|macro|FMC_BTR1_ADDSET_Pos
DECL|FMC_BTR1_ADDSET|macro|FMC_BTR1_ADDSET
DECL|FMC_BTR1_BUSTURN_0|macro|FMC_BTR1_BUSTURN_0
DECL|FMC_BTR1_BUSTURN_1|macro|FMC_BTR1_BUSTURN_1
DECL|FMC_BTR1_BUSTURN_2|macro|FMC_BTR1_BUSTURN_2
DECL|FMC_BTR1_BUSTURN_3|macro|FMC_BTR1_BUSTURN_3
DECL|FMC_BTR1_BUSTURN_Msk|macro|FMC_BTR1_BUSTURN_Msk
DECL|FMC_BTR1_BUSTURN_Pos|macro|FMC_BTR1_BUSTURN_Pos
DECL|FMC_BTR1_BUSTURN|macro|FMC_BTR1_BUSTURN
DECL|FMC_BTR1_CLKDIV_0|macro|FMC_BTR1_CLKDIV_0
DECL|FMC_BTR1_CLKDIV_1|macro|FMC_BTR1_CLKDIV_1
DECL|FMC_BTR1_CLKDIV_2|macro|FMC_BTR1_CLKDIV_2
DECL|FMC_BTR1_CLKDIV_3|macro|FMC_BTR1_CLKDIV_3
DECL|FMC_BTR1_CLKDIV_Msk|macro|FMC_BTR1_CLKDIV_Msk
DECL|FMC_BTR1_CLKDIV_Pos|macro|FMC_BTR1_CLKDIV_Pos
DECL|FMC_BTR1_CLKDIV|macro|FMC_BTR1_CLKDIV
DECL|FMC_BTR1_DATAST_0|macro|FMC_BTR1_DATAST_0
DECL|FMC_BTR1_DATAST_1|macro|FMC_BTR1_DATAST_1
DECL|FMC_BTR1_DATAST_2|macro|FMC_BTR1_DATAST_2
DECL|FMC_BTR1_DATAST_3|macro|FMC_BTR1_DATAST_3
DECL|FMC_BTR1_DATAST_4|macro|FMC_BTR1_DATAST_4
DECL|FMC_BTR1_DATAST_5|macro|FMC_BTR1_DATAST_5
DECL|FMC_BTR1_DATAST_6|macro|FMC_BTR1_DATAST_6
DECL|FMC_BTR1_DATAST_7|macro|FMC_BTR1_DATAST_7
DECL|FMC_BTR1_DATAST_Msk|macro|FMC_BTR1_DATAST_Msk
DECL|FMC_BTR1_DATAST_Pos|macro|FMC_BTR1_DATAST_Pos
DECL|FMC_BTR1_DATAST|macro|FMC_BTR1_DATAST
DECL|FMC_BTR1_DATLAT_0|macro|FMC_BTR1_DATLAT_0
DECL|FMC_BTR1_DATLAT_1|macro|FMC_BTR1_DATLAT_1
DECL|FMC_BTR1_DATLAT_2|macro|FMC_BTR1_DATLAT_2
DECL|FMC_BTR1_DATLAT_3|macro|FMC_BTR1_DATLAT_3
DECL|FMC_BTR1_DATLAT_Msk|macro|FMC_BTR1_DATLAT_Msk
DECL|FMC_BTR1_DATLAT_Pos|macro|FMC_BTR1_DATLAT_Pos
DECL|FMC_BTR1_DATLAT|macro|FMC_BTR1_DATLAT
DECL|FMC_BTR2_ACCMOD_0|macro|FMC_BTR2_ACCMOD_0
DECL|FMC_BTR2_ACCMOD_1|macro|FMC_BTR2_ACCMOD_1
DECL|FMC_BTR2_ACCMOD_Msk|macro|FMC_BTR2_ACCMOD_Msk
DECL|FMC_BTR2_ACCMOD_Pos|macro|FMC_BTR2_ACCMOD_Pos
DECL|FMC_BTR2_ACCMOD|macro|FMC_BTR2_ACCMOD
DECL|FMC_BTR2_ADDHLD_0|macro|FMC_BTR2_ADDHLD_0
DECL|FMC_BTR2_ADDHLD_1|macro|FMC_BTR2_ADDHLD_1
DECL|FMC_BTR2_ADDHLD_2|macro|FMC_BTR2_ADDHLD_2
DECL|FMC_BTR2_ADDHLD_3|macro|FMC_BTR2_ADDHLD_3
DECL|FMC_BTR2_ADDHLD_Msk|macro|FMC_BTR2_ADDHLD_Msk
DECL|FMC_BTR2_ADDHLD_Pos|macro|FMC_BTR2_ADDHLD_Pos
DECL|FMC_BTR2_ADDHLD|macro|FMC_BTR2_ADDHLD
DECL|FMC_BTR2_ADDSET_0|macro|FMC_BTR2_ADDSET_0
DECL|FMC_BTR2_ADDSET_1|macro|FMC_BTR2_ADDSET_1
DECL|FMC_BTR2_ADDSET_2|macro|FMC_BTR2_ADDSET_2
DECL|FMC_BTR2_ADDSET_3|macro|FMC_BTR2_ADDSET_3
DECL|FMC_BTR2_ADDSET_Msk|macro|FMC_BTR2_ADDSET_Msk
DECL|FMC_BTR2_ADDSET_Pos|macro|FMC_BTR2_ADDSET_Pos
DECL|FMC_BTR2_ADDSET|macro|FMC_BTR2_ADDSET
DECL|FMC_BTR2_BUSTURN_0|macro|FMC_BTR2_BUSTURN_0
DECL|FMC_BTR2_BUSTURN_1|macro|FMC_BTR2_BUSTURN_1
DECL|FMC_BTR2_BUSTURN_2|macro|FMC_BTR2_BUSTURN_2
DECL|FMC_BTR2_BUSTURN_3|macro|FMC_BTR2_BUSTURN_3
DECL|FMC_BTR2_BUSTURN_Msk|macro|FMC_BTR2_BUSTURN_Msk
DECL|FMC_BTR2_BUSTURN_Pos|macro|FMC_BTR2_BUSTURN_Pos
DECL|FMC_BTR2_BUSTURN|macro|FMC_BTR2_BUSTURN
DECL|FMC_BTR2_CLKDIV_0|macro|FMC_BTR2_CLKDIV_0
DECL|FMC_BTR2_CLKDIV_1|macro|FMC_BTR2_CLKDIV_1
DECL|FMC_BTR2_CLKDIV_2|macro|FMC_BTR2_CLKDIV_2
DECL|FMC_BTR2_CLKDIV_3|macro|FMC_BTR2_CLKDIV_3
DECL|FMC_BTR2_CLKDIV_Msk|macro|FMC_BTR2_CLKDIV_Msk
DECL|FMC_BTR2_CLKDIV_Pos|macro|FMC_BTR2_CLKDIV_Pos
DECL|FMC_BTR2_CLKDIV|macro|FMC_BTR2_CLKDIV
DECL|FMC_BTR2_DATAST_0|macro|FMC_BTR2_DATAST_0
DECL|FMC_BTR2_DATAST_1|macro|FMC_BTR2_DATAST_1
DECL|FMC_BTR2_DATAST_2|macro|FMC_BTR2_DATAST_2
DECL|FMC_BTR2_DATAST_3|macro|FMC_BTR2_DATAST_3
DECL|FMC_BTR2_DATAST_4|macro|FMC_BTR2_DATAST_4
DECL|FMC_BTR2_DATAST_5|macro|FMC_BTR2_DATAST_5
DECL|FMC_BTR2_DATAST_6|macro|FMC_BTR2_DATAST_6
DECL|FMC_BTR2_DATAST_7|macro|FMC_BTR2_DATAST_7
DECL|FMC_BTR2_DATAST_Msk|macro|FMC_BTR2_DATAST_Msk
DECL|FMC_BTR2_DATAST_Pos|macro|FMC_BTR2_DATAST_Pos
DECL|FMC_BTR2_DATAST|macro|FMC_BTR2_DATAST
DECL|FMC_BTR2_DATLAT_0|macro|FMC_BTR2_DATLAT_0
DECL|FMC_BTR2_DATLAT_1|macro|FMC_BTR2_DATLAT_1
DECL|FMC_BTR2_DATLAT_2|macro|FMC_BTR2_DATLAT_2
DECL|FMC_BTR2_DATLAT_3|macro|FMC_BTR2_DATLAT_3
DECL|FMC_BTR2_DATLAT_Msk|macro|FMC_BTR2_DATLAT_Msk
DECL|FMC_BTR2_DATLAT_Pos|macro|FMC_BTR2_DATLAT_Pos
DECL|FMC_BTR2_DATLAT|macro|FMC_BTR2_DATLAT
DECL|FMC_BTR3_ACCMOD_0|macro|FMC_BTR3_ACCMOD_0
DECL|FMC_BTR3_ACCMOD_1|macro|FMC_BTR3_ACCMOD_1
DECL|FMC_BTR3_ACCMOD_Msk|macro|FMC_BTR3_ACCMOD_Msk
DECL|FMC_BTR3_ACCMOD_Pos|macro|FMC_BTR3_ACCMOD_Pos
DECL|FMC_BTR3_ACCMOD|macro|FMC_BTR3_ACCMOD
DECL|FMC_BTR3_ADDHLD_0|macro|FMC_BTR3_ADDHLD_0
DECL|FMC_BTR3_ADDHLD_1|macro|FMC_BTR3_ADDHLD_1
DECL|FMC_BTR3_ADDHLD_2|macro|FMC_BTR3_ADDHLD_2
DECL|FMC_BTR3_ADDHLD_3|macro|FMC_BTR3_ADDHLD_3
DECL|FMC_BTR3_ADDHLD_Msk|macro|FMC_BTR3_ADDHLD_Msk
DECL|FMC_BTR3_ADDHLD_Pos|macro|FMC_BTR3_ADDHLD_Pos
DECL|FMC_BTR3_ADDHLD|macro|FMC_BTR3_ADDHLD
DECL|FMC_BTR3_ADDSET_0|macro|FMC_BTR3_ADDSET_0
DECL|FMC_BTR3_ADDSET_1|macro|FMC_BTR3_ADDSET_1
DECL|FMC_BTR3_ADDSET_2|macro|FMC_BTR3_ADDSET_2
DECL|FMC_BTR3_ADDSET_3|macro|FMC_BTR3_ADDSET_3
DECL|FMC_BTR3_ADDSET_Msk|macro|FMC_BTR3_ADDSET_Msk
DECL|FMC_BTR3_ADDSET_Pos|macro|FMC_BTR3_ADDSET_Pos
DECL|FMC_BTR3_ADDSET|macro|FMC_BTR3_ADDSET
DECL|FMC_BTR3_BUSTURN_0|macro|FMC_BTR3_BUSTURN_0
DECL|FMC_BTR3_BUSTURN_1|macro|FMC_BTR3_BUSTURN_1
DECL|FMC_BTR3_BUSTURN_2|macro|FMC_BTR3_BUSTURN_2
DECL|FMC_BTR3_BUSTURN_3|macro|FMC_BTR3_BUSTURN_3
DECL|FMC_BTR3_BUSTURN_Msk|macro|FMC_BTR3_BUSTURN_Msk
DECL|FMC_BTR3_BUSTURN_Pos|macro|FMC_BTR3_BUSTURN_Pos
DECL|FMC_BTR3_BUSTURN|macro|FMC_BTR3_BUSTURN
DECL|FMC_BTR3_CLKDIV_0|macro|FMC_BTR3_CLKDIV_0
DECL|FMC_BTR3_CLKDIV_1|macro|FMC_BTR3_CLKDIV_1
DECL|FMC_BTR3_CLKDIV_2|macro|FMC_BTR3_CLKDIV_2
DECL|FMC_BTR3_CLKDIV_3|macro|FMC_BTR3_CLKDIV_3
DECL|FMC_BTR3_CLKDIV_Msk|macro|FMC_BTR3_CLKDIV_Msk
DECL|FMC_BTR3_CLKDIV_Pos|macro|FMC_BTR3_CLKDIV_Pos
DECL|FMC_BTR3_CLKDIV|macro|FMC_BTR3_CLKDIV
DECL|FMC_BTR3_DATAST_0|macro|FMC_BTR3_DATAST_0
DECL|FMC_BTR3_DATAST_1|macro|FMC_BTR3_DATAST_1
DECL|FMC_BTR3_DATAST_2|macro|FMC_BTR3_DATAST_2
DECL|FMC_BTR3_DATAST_3|macro|FMC_BTR3_DATAST_3
DECL|FMC_BTR3_DATAST_4|macro|FMC_BTR3_DATAST_4
DECL|FMC_BTR3_DATAST_5|macro|FMC_BTR3_DATAST_5
DECL|FMC_BTR3_DATAST_6|macro|FMC_BTR3_DATAST_6
DECL|FMC_BTR3_DATAST_7|macro|FMC_BTR3_DATAST_7
DECL|FMC_BTR3_DATAST_Msk|macro|FMC_BTR3_DATAST_Msk
DECL|FMC_BTR3_DATAST_Pos|macro|FMC_BTR3_DATAST_Pos
DECL|FMC_BTR3_DATAST|macro|FMC_BTR3_DATAST
DECL|FMC_BTR3_DATLAT_0|macro|FMC_BTR3_DATLAT_0
DECL|FMC_BTR3_DATLAT_1|macro|FMC_BTR3_DATLAT_1
DECL|FMC_BTR3_DATLAT_2|macro|FMC_BTR3_DATLAT_2
DECL|FMC_BTR3_DATLAT_3|macro|FMC_BTR3_DATLAT_3
DECL|FMC_BTR3_DATLAT_Msk|macro|FMC_BTR3_DATLAT_Msk
DECL|FMC_BTR3_DATLAT_Pos|macro|FMC_BTR3_DATLAT_Pos
DECL|FMC_BTR3_DATLAT|macro|FMC_BTR3_DATLAT
DECL|FMC_BTR4_ACCMOD_0|macro|FMC_BTR4_ACCMOD_0
DECL|FMC_BTR4_ACCMOD_1|macro|FMC_BTR4_ACCMOD_1
DECL|FMC_BTR4_ACCMOD_Msk|macro|FMC_BTR4_ACCMOD_Msk
DECL|FMC_BTR4_ACCMOD_Pos|macro|FMC_BTR4_ACCMOD_Pos
DECL|FMC_BTR4_ACCMOD|macro|FMC_BTR4_ACCMOD
DECL|FMC_BTR4_ADDHLD_0|macro|FMC_BTR4_ADDHLD_0
DECL|FMC_BTR4_ADDHLD_1|macro|FMC_BTR4_ADDHLD_1
DECL|FMC_BTR4_ADDHLD_2|macro|FMC_BTR4_ADDHLD_2
DECL|FMC_BTR4_ADDHLD_3|macro|FMC_BTR4_ADDHLD_3
DECL|FMC_BTR4_ADDHLD_Msk|macro|FMC_BTR4_ADDHLD_Msk
DECL|FMC_BTR4_ADDHLD_Pos|macro|FMC_BTR4_ADDHLD_Pos
DECL|FMC_BTR4_ADDHLD|macro|FMC_BTR4_ADDHLD
DECL|FMC_BTR4_ADDSET_0|macro|FMC_BTR4_ADDSET_0
DECL|FMC_BTR4_ADDSET_1|macro|FMC_BTR4_ADDSET_1
DECL|FMC_BTR4_ADDSET_2|macro|FMC_BTR4_ADDSET_2
DECL|FMC_BTR4_ADDSET_3|macro|FMC_BTR4_ADDSET_3
DECL|FMC_BTR4_ADDSET_Msk|macro|FMC_BTR4_ADDSET_Msk
DECL|FMC_BTR4_ADDSET_Pos|macro|FMC_BTR4_ADDSET_Pos
DECL|FMC_BTR4_ADDSET|macro|FMC_BTR4_ADDSET
DECL|FMC_BTR4_BUSTURN_0|macro|FMC_BTR4_BUSTURN_0
DECL|FMC_BTR4_BUSTURN_1|macro|FMC_BTR4_BUSTURN_1
DECL|FMC_BTR4_BUSTURN_2|macro|FMC_BTR4_BUSTURN_2
DECL|FMC_BTR4_BUSTURN_3|macro|FMC_BTR4_BUSTURN_3
DECL|FMC_BTR4_BUSTURN_Msk|macro|FMC_BTR4_BUSTURN_Msk
DECL|FMC_BTR4_BUSTURN_Pos|macro|FMC_BTR4_BUSTURN_Pos
DECL|FMC_BTR4_BUSTURN|macro|FMC_BTR4_BUSTURN
DECL|FMC_BTR4_CLKDIV_0|macro|FMC_BTR4_CLKDIV_0
DECL|FMC_BTR4_CLKDIV_1|macro|FMC_BTR4_CLKDIV_1
DECL|FMC_BTR4_CLKDIV_2|macro|FMC_BTR4_CLKDIV_2
DECL|FMC_BTR4_CLKDIV_3|macro|FMC_BTR4_CLKDIV_3
DECL|FMC_BTR4_CLKDIV_Msk|macro|FMC_BTR4_CLKDIV_Msk
DECL|FMC_BTR4_CLKDIV_Pos|macro|FMC_BTR4_CLKDIV_Pos
DECL|FMC_BTR4_CLKDIV|macro|FMC_BTR4_CLKDIV
DECL|FMC_BTR4_DATAST_0|macro|FMC_BTR4_DATAST_0
DECL|FMC_BTR4_DATAST_1|macro|FMC_BTR4_DATAST_1
DECL|FMC_BTR4_DATAST_2|macro|FMC_BTR4_DATAST_2
DECL|FMC_BTR4_DATAST_3|macro|FMC_BTR4_DATAST_3
DECL|FMC_BTR4_DATAST_4|macro|FMC_BTR4_DATAST_4
DECL|FMC_BTR4_DATAST_5|macro|FMC_BTR4_DATAST_5
DECL|FMC_BTR4_DATAST_6|macro|FMC_BTR4_DATAST_6
DECL|FMC_BTR4_DATAST_7|macro|FMC_BTR4_DATAST_7
DECL|FMC_BTR4_DATAST_Msk|macro|FMC_BTR4_DATAST_Msk
DECL|FMC_BTR4_DATAST_Pos|macro|FMC_BTR4_DATAST_Pos
DECL|FMC_BTR4_DATAST|macro|FMC_BTR4_DATAST
DECL|FMC_BTR4_DATLAT_0|macro|FMC_BTR4_DATLAT_0
DECL|FMC_BTR4_DATLAT_1|macro|FMC_BTR4_DATLAT_1
DECL|FMC_BTR4_DATLAT_2|macro|FMC_BTR4_DATLAT_2
DECL|FMC_BTR4_DATLAT_3|macro|FMC_BTR4_DATLAT_3
DECL|FMC_BTR4_DATLAT_Msk|macro|FMC_BTR4_DATLAT_Msk
DECL|FMC_BTR4_DATLAT_Pos|macro|FMC_BTR4_DATLAT_Pos
DECL|FMC_BTR4_DATLAT|macro|FMC_BTR4_DATLAT
DECL|FMC_BWTR1_ACCMOD_0|macro|FMC_BWTR1_ACCMOD_0
DECL|FMC_BWTR1_ACCMOD_1|macro|FMC_BWTR1_ACCMOD_1
DECL|FMC_BWTR1_ACCMOD_Msk|macro|FMC_BWTR1_ACCMOD_Msk
DECL|FMC_BWTR1_ACCMOD_Pos|macro|FMC_BWTR1_ACCMOD_Pos
DECL|FMC_BWTR1_ACCMOD|macro|FMC_BWTR1_ACCMOD
DECL|FMC_BWTR1_ADDHLD_0|macro|FMC_BWTR1_ADDHLD_0
DECL|FMC_BWTR1_ADDHLD_1|macro|FMC_BWTR1_ADDHLD_1
DECL|FMC_BWTR1_ADDHLD_2|macro|FMC_BWTR1_ADDHLD_2
DECL|FMC_BWTR1_ADDHLD_3|macro|FMC_BWTR1_ADDHLD_3
DECL|FMC_BWTR1_ADDHLD_Msk|macro|FMC_BWTR1_ADDHLD_Msk
DECL|FMC_BWTR1_ADDHLD_Pos|macro|FMC_BWTR1_ADDHLD_Pos
DECL|FMC_BWTR1_ADDHLD|macro|FMC_BWTR1_ADDHLD
DECL|FMC_BWTR1_ADDSET_0|macro|FMC_BWTR1_ADDSET_0
DECL|FMC_BWTR1_ADDSET_1|macro|FMC_BWTR1_ADDSET_1
DECL|FMC_BWTR1_ADDSET_2|macro|FMC_BWTR1_ADDSET_2
DECL|FMC_BWTR1_ADDSET_3|macro|FMC_BWTR1_ADDSET_3
DECL|FMC_BWTR1_ADDSET_Msk|macro|FMC_BWTR1_ADDSET_Msk
DECL|FMC_BWTR1_ADDSET_Pos|macro|FMC_BWTR1_ADDSET_Pos
DECL|FMC_BWTR1_ADDSET|macro|FMC_BWTR1_ADDSET
DECL|FMC_BWTR1_BUSTURN_0|macro|FMC_BWTR1_BUSTURN_0
DECL|FMC_BWTR1_BUSTURN_1|macro|FMC_BWTR1_BUSTURN_1
DECL|FMC_BWTR1_BUSTURN_2|macro|FMC_BWTR1_BUSTURN_2
DECL|FMC_BWTR1_BUSTURN_3|macro|FMC_BWTR1_BUSTURN_3
DECL|FMC_BWTR1_BUSTURN_Msk|macro|FMC_BWTR1_BUSTURN_Msk
DECL|FMC_BWTR1_BUSTURN_Pos|macro|FMC_BWTR1_BUSTURN_Pos
DECL|FMC_BWTR1_BUSTURN|macro|FMC_BWTR1_BUSTURN
DECL|FMC_BWTR1_DATAST_0|macro|FMC_BWTR1_DATAST_0
DECL|FMC_BWTR1_DATAST_1|macro|FMC_BWTR1_DATAST_1
DECL|FMC_BWTR1_DATAST_2|macro|FMC_BWTR1_DATAST_2
DECL|FMC_BWTR1_DATAST_3|macro|FMC_BWTR1_DATAST_3
DECL|FMC_BWTR1_DATAST_4|macro|FMC_BWTR1_DATAST_4
DECL|FMC_BWTR1_DATAST_5|macro|FMC_BWTR1_DATAST_5
DECL|FMC_BWTR1_DATAST_6|macro|FMC_BWTR1_DATAST_6
DECL|FMC_BWTR1_DATAST_7|macro|FMC_BWTR1_DATAST_7
DECL|FMC_BWTR1_DATAST_Msk|macro|FMC_BWTR1_DATAST_Msk
DECL|FMC_BWTR1_DATAST_Pos|macro|FMC_BWTR1_DATAST_Pos
DECL|FMC_BWTR1_DATAST|macro|FMC_BWTR1_DATAST
DECL|FMC_BWTR2_ACCMOD_0|macro|FMC_BWTR2_ACCMOD_0
DECL|FMC_BWTR2_ACCMOD_1|macro|FMC_BWTR2_ACCMOD_1
DECL|FMC_BWTR2_ACCMOD_Msk|macro|FMC_BWTR2_ACCMOD_Msk
DECL|FMC_BWTR2_ACCMOD_Pos|macro|FMC_BWTR2_ACCMOD_Pos
DECL|FMC_BWTR2_ACCMOD|macro|FMC_BWTR2_ACCMOD
DECL|FMC_BWTR2_ADDHLD_0|macro|FMC_BWTR2_ADDHLD_0
DECL|FMC_BWTR2_ADDHLD_1|macro|FMC_BWTR2_ADDHLD_1
DECL|FMC_BWTR2_ADDHLD_2|macro|FMC_BWTR2_ADDHLD_2
DECL|FMC_BWTR2_ADDHLD_3|macro|FMC_BWTR2_ADDHLD_3
DECL|FMC_BWTR2_ADDHLD_Msk|macro|FMC_BWTR2_ADDHLD_Msk
DECL|FMC_BWTR2_ADDHLD_Pos|macro|FMC_BWTR2_ADDHLD_Pos
DECL|FMC_BWTR2_ADDHLD|macro|FMC_BWTR2_ADDHLD
DECL|FMC_BWTR2_ADDSET_0|macro|FMC_BWTR2_ADDSET_0
DECL|FMC_BWTR2_ADDSET_1|macro|FMC_BWTR2_ADDSET_1
DECL|FMC_BWTR2_ADDSET_2|macro|FMC_BWTR2_ADDSET_2
DECL|FMC_BWTR2_ADDSET_3|macro|FMC_BWTR2_ADDSET_3
DECL|FMC_BWTR2_ADDSET_Msk|macro|FMC_BWTR2_ADDSET_Msk
DECL|FMC_BWTR2_ADDSET_Pos|macro|FMC_BWTR2_ADDSET_Pos
DECL|FMC_BWTR2_ADDSET|macro|FMC_BWTR2_ADDSET
DECL|FMC_BWTR2_BUSTURN_0|macro|FMC_BWTR2_BUSTURN_0
DECL|FMC_BWTR2_BUSTURN_1|macro|FMC_BWTR2_BUSTURN_1
DECL|FMC_BWTR2_BUSTURN_2|macro|FMC_BWTR2_BUSTURN_2
DECL|FMC_BWTR2_BUSTURN_3|macro|FMC_BWTR2_BUSTURN_3
DECL|FMC_BWTR2_BUSTURN_Msk|macro|FMC_BWTR2_BUSTURN_Msk
DECL|FMC_BWTR2_BUSTURN_Pos|macro|FMC_BWTR2_BUSTURN_Pos
DECL|FMC_BWTR2_BUSTURN|macro|FMC_BWTR2_BUSTURN
DECL|FMC_BWTR2_DATAST_0|macro|FMC_BWTR2_DATAST_0
DECL|FMC_BWTR2_DATAST_1|macro|FMC_BWTR2_DATAST_1
DECL|FMC_BWTR2_DATAST_2|macro|FMC_BWTR2_DATAST_2
DECL|FMC_BWTR2_DATAST_3|macro|FMC_BWTR2_DATAST_3
DECL|FMC_BWTR2_DATAST_4|macro|FMC_BWTR2_DATAST_4
DECL|FMC_BWTR2_DATAST_5|macro|FMC_BWTR2_DATAST_5
DECL|FMC_BWTR2_DATAST_6|macro|FMC_BWTR2_DATAST_6
DECL|FMC_BWTR2_DATAST_7|macro|FMC_BWTR2_DATAST_7
DECL|FMC_BWTR2_DATAST_Msk|macro|FMC_BWTR2_DATAST_Msk
DECL|FMC_BWTR2_DATAST_Pos|macro|FMC_BWTR2_DATAST_Pos
DECL|FMC_BWTR2_DATAST|macro|FMC_BWTR2_DATAST
DECL|FMC_BWTR3_ACCMOD_0|macro|FMC_BWTR3_ACCMOD_0
DECL|FMC_BWTR3_ACCMOD_1|macro|FMC_BWTR3_ACCMOD_1
DECL|FMC_BWTR3_ACCMOD_Msk|macro|FMC_BWTR3_ACCMOD_Msk
DECL|FMC_BWTR3_ACCMOD_Pos|macro|FMC_BWTR3_ACCMOD_Pos
DECL|FMC_BWTR3_ACCMOD|macro|FMC_BWTR3_ACCMOD
DECL|FMC_BWTR3_ADDHLD_0|macro|FMC_BWTR3_ADDHLD_0
DECL|FMC_BWTR3_ADDHLD_1|macro|FMC_BWTR3_ADDHLD_1
DECL|FMC_BWTR3_ADDHLD_2|macro|FMC_BWTR3_ADDHLD_2
DECL|FMC_BWTR3_ADDHLD_3|macro|FMC_BWTR3_ADDHLD_3
DECL|FMC_BWTR3_ADDHLD_Msk|macro|FMC_BWTR3_ADDHLD_Msk
DECL|FMC_BWTR3_ADDHLD_Pos|macro|FMC_BWTR3_ADDHLD_Pos
DECL|FMC_BWTR3_ADDHLD|macro|FMC_BWTR3_ADDHLD
DECL|FMC_BWTR3_ADDSET_0|macro|FMC_BWTR3_ADDSET_0
DECL|FMC_BWTR3_ADDSET_1|macro|FMC_BWTR3_ADDSET_1
DECL|FMC_BWTR3_ADDSET_2|macro|FMC_BWTR3_ADDSET_2
DECL|FMC_BWTR3_ADDSET_3|macro|FMC_BWTR3_ADDSET_3
DECL|FMC_BWTR3_ADDSET_Msk|macro|FMC_BWTR3_ADDSET_Msk
DECL|FMC_BWTR3_ADDSET_Pos|macro|FMC_BWTR3_ADDSET_Pos
DECL|FMC_BWTR3_ADDSET|macro|FMC_BWTR3_ADDSET
DECL|FMC_BWTR3_BUSTURN_0|macro|FMC_BWTR3_BUSTURN_0
DECL|FMC_BWTR3_BUSTURN_1|macro|FMC_BWTR3_BUSTURN_1
DECL|FMC_BWTR3_BUSTURN_2|macro|FMC_BWTR3_BUSTURN_2
DECL|FMC_BWTR3_BUSTURN_3|macro|FMC_BWTR3_BUSTURN_3
DECL|FMC_BWTR3_BUSTURN_Msk|macro|FMC_BWTR3_BUSTURN_Msk
DECL|FMC_BWTR3_BUSTURN_Pos|macro|FMC_BWTR3_BUSTURN_Pos
DECL|FMC_BWTR3_BUSTURN|macro|FMC_BWTR3_BUSTURN
DECL|FMC_BWTR3_DATAST_0|macro|FMC_BWTR3_DATAST_0
DECL|FMC_BWTR3_DATAST_1|macro|FMC_BWTR3_DATAST_1
DECL|FMC_BWTR3_DATAST_2|macro|FMC_BWTR3_DATAST_2
DECL|FMC_BWTR3_DATAST_3|macro|FMC_BWTR3_DATAST_3
DECL|FMC_BWTR3_DATAST_4|macro|FMC_BWTR3_DATAST_4
DECL|FMC_BWTR3_DATAST_5|macro|FMC_BWTR3_DATAST_5
DECL|FMC_BWTR3_DATAST_6|macro|FMC_BWTR3_DATAST_6
DECL|FMC_BWTR3_DATAST_7|macro|FMC_BWTR3_DATAST_7
DECL|FMC_BWTR3_DATAST_Msk|macro|FMC_BWTR3_DATAST_Msk
DECL|FMC_BWTR3_DATAST_Pos|macro|FMC_BWTR3_DATAST_Pos
DECL|FMC_BWTR3_DATAST|macro|FMC_BWTR3_DATAST
DECL|FMC_BWTR4_ACCMOD_0|macro|FMC_BWTR4_ACCMOD_0
DECL|FMC_BWTR4_ACCMOD_1|macro|FMC_BWTR4_ACCMOD_1
DECL|FMC_BWTR4_ACCMOD_Msk|macro|FMC_BWTR4_ACCMOD_Msk
DECL|FMC_BWTR4_ACCMOD_Pos|macro|FMC_BWTR4_ACCMOD_Pos
DECL|FMC_BWTR4_ACCMOD|macro|FMC_BWTR4_ACCMOD
DECL|FMC_BWTR4_ADDHLD_0|macro|FMC_BWTR4_ADDHLD_0
DECL|FMC_BWTR4_ADDHLD_1|macro|FMC_BWTR4_ADDHLD_1
DECL|FMC_BWTR4_ADDHLD_2|macro|FMC_BWTR4_ADDHLD_2
DECL|FMC_BWTR4_ADDHLD_3|macro|FMC_BWTR4_ADDHLD_3
DECL|FMC_BWTR4_ADDHLD_Msk|macro|FMC_BWTR4_ADDHLD_Msk
DECL|FMC_BWTR4_ADDHLD_Pos|macro|FMC_BWTR4_ADDHLD_Pos
DECL|FMC_BWTR4_ADDHLD|macro|FMC_BWTR4_ADDHLD
DECL|FMC_BWTR4_ADDSET_0|macro|FMC_BWTR4_ADDSET_0
DECL|FMC_BWTR4_ADDSET_1|macro|FMC_BWTR4_ADDSET_1
DECL|FMC_BWTR4_ADDSET_2|macro|FMC_BWTR4_ADDSET_2
DECL|FMC_BWTR4_ADDSET_3|macro|FMC_BWTR4_ADDSET_3
DECL|FMC_BWTR4_ADDSET_Msk|macro|FMC_BWTR4_ADDSET_Msk
DECL|FMC_BWTR4_ADDSET_Pos|macro|FMC_BWTR4_ADDSET_Pos
DECL|FMC_BWTR4_ADDSET|macro|FMC_BWTR4_ADDSET
DECL|FMC_BWTR4_BUSTURN_0|macro|FMC_BWTR4_BUSTURN_0
DECL|FMC_BWTR4_BUSTURN_1|macro|FMC_BWTR4_BUSTURN_1
DECL|FMC_BWTR4_BUSTURN_2|macro|FMC_BWTR4_BUSTURN_2
DECL|FMC_BWTR4_BUSTURN_3|macro|FMC_BWTR4_BUSTURN_3
DECL|FMC_BWTR4_BUSTURN_Msk|macro|FMC_BWTR4_BUSTURN_Msk
DECL|FMC_BWTR4_BUSTURN_Pos|macro|FMC_BWTR4_BUSTURN_Pos
DECL|FMC_BWTR4_BUSTURN|macro|FMC_BWTR4_BUSTURN
DECL|FMC_BWTR4_DATAST_0|macro|FMC_BWTR4_DATAST_0
DECL|FMC_BWTR4_DATAST_1|macro|FMC_BWTR4_DATAST_1
DECL|FMC_BWTR4_DATAST_2|macro|FMC_BWTR4_DATAST_2
DECL|FMC_BWTR4_DATAST_3|macro|FMC_BWTR4_DATAST_3
DECL|FMC_BWTR4_DATAST_4|macro|FMC_BWTR4_DATAST_4
DECL|FMC_BWTR4_DATAST_5|macro|FMC_BWTR4_DATAST_5
DECL|FMC_BWTR4_DATAST_6|macro|FMC_BWTR4_DATAST_6
DECL|FMC_BWTR4_DATAST_7|macro|FMC_BWTR4_DATAST_7
DECL|FMC_BWTR4_DATAST_Msk|macro|FMC_BWTR4_DATAST_Msk
DECL|FMC_BWTR4_DATAST_Pos|macro|FMC_BWTR4_DATAST_Pos
DECL|FMC_BWTR4_DATAST|macro|FMC_BWTR4_DATAST
DECL|FMC_Bank1E_R_BASE|macro|FMC_Bank1E_R_BASE
DECL|FMC_Bank1E_TypeDef|typedef|} FMC_Bank1E_TypeDef;
DECL|FMC_Bank1E|macro|FMC_Bank1E
DECL|FMC_Bank1_R_BASE|macro|FMC_Bank1_R_BASE
DECL|FMC_Bank1_TypeDef|typedef|} FMC_Bank1_TypeDef;
DECL|FMC_Bank1|macro|FMC_Bank1
DECL|FMC_Bank3_R_BASE|macro|FMC_Bank3_R_BASE
DECL|FMC_Bank3_TypeDef|typedef|} FMC_Bank3_TypeDef;
DECL|FMC_Bank3|macro|FMC_Bank3
DECL|FMC_Bank5_6_R_BASE|macro|FMC_Bank5_6_R_BASE
DECL|FMC_Bank5_6_TypeDef|typedef|} FMC_Bank5_6_TypeDef;
DECL|FMC_Bank5_6|macro|FMC_Bank5_6
DECL|FMC_ECCR_ECC3_Msk|macro|FMC_ECCR_ECC3_Msk
DECL|FMC_ECCR_ECC3_Pos|macro|FMC_ECCR_ECC3_Pos
DECL|FMC_ECCR_ECC3|macro|FMC_ECCR_ECC3
DECL|FMC_IRQn|enumerator|FMC_IRQn = 48, /*!< FMC global Interrupt */
DECL|FMC_PATT_ATTHIZ3_0|macro|FMC_PATT_ATTHIZ3_0
DECL|FMC_PATT_ATTHIZ3_1|macro|FMC_PATT_ATTHIZ3_1
DECL|FMC_PATT_ATTHIZ3_2|macro|FMC_PATT_ATTHIZ3_2
DECL|FMC_PATT_ATTHIZ3_3|macro|FMC_PATT_ATTHIZ3_3
DECL|FMC_PATT_ATTHIZ3_4|macro|FMC_PATT_ATTHIZ3_4
DECL|FMC_PATT_ATTHIZ3_5|macro|FMC_PATT_ATTHIZ3_5
DECL|FMC_PATT_ATTHIZ3_6|macro|FMC_PATT_ATTHIZ3_6
DECL|FMC_PATT_ATTHIZ3_7|macro|FMC_PATT_ATTHIZ3_7
DECL|FMC_PATT_ATTHIZ3_Msk|macro|FMC_PATT_ATTHIZ3_Msk
DECL|FMC_PATT_ATTHIZ3_Pos|macro|FMC_PATT_ATTHIZ3_Pos
DECL|FMC_PATT_ATTHIZ3|macro|FMC_PATT_ATTHIZ3
DECL|FMC_PATT_ATTHOLD3_0|macro|FMC_PATT_ATTHOLD3_0
DECL|FMC_PATT_ATTHOLD3_1|macro|FMC_PATT_ATTHOLD3_1
DECL|FMC_PATT_ATTHOLD3_2|macro|FMC_PATT_ATTHOLD3_2
DECL|FMC_PATT_ATTHOLD3_3|macro|FMC_PATT_ATTHOLD3_3
DECL|FMC_PATT_ATTHOLD3_4|macro|FMC_PATT_ATTHOLD3_4
DECL|FMC_PATT_ATTHOLD3_5|macro|FMC_PATT_ATTHOLD3_5
DECL|FMC_PATT_ATTHOLD3_6|macro|FMC_PATT_ATTHOLD3_6
DECL|FMC_PATT_ATTHOLD3_7|macro|FMC_PATT_ATTHOLD3_7
DECL|FMC_PATT_ATTHOLD3_Msk|macro|FMC_PATT_ATTHOLD3_Msk
DECL|FMC_PATT_ATTHOLD3_Pos|macro|FMC_PATT_ATTHOLD3_Pos
DECL|FMC_PATT_ATTHOLD3|macro|FMC_PATT_ATTHOLD3
DECL|FMC_PATT_ATTSET3_0|macro|FMC_PATT_ATTSET3_0
DECL|FMC_PATT_ATTSET3_1|macro|FMC_PATT_ATTSET3_1
DECL|FMC_PATT_ATTSET3_2|macro|FMC_PATT_ATTSET3_2
DECL|FMC_PATT_ATTSET3_3|macro|FMC_PATT_ATTSET3_3
DECL|FMC_PATT_ATTSET3_4|macro|FMC_PATT_ATTSET3_4
DECL|FMC_PATT_ATTSET3_5|macro|FMC_PATT_ATTSET3_5
DECL|FMC_PATT_ATTSET3_6|macro|FMC_PATT_ATTSET3_6
DECL|FMC_PATT_ATTSET3_7|macro|FMC_PATT_ATTSET3_7
DECL|FMC_PATT_ATTSET3_Msk|macro|FMC_PATT_ATTSET3_Msk
DECL|FMC_PATT_ATTSET3_Pos|macro|FMC_PATT_ATTSET3_Pos
DECL|FMC_PATT_ATTSET3|macro|FMC_PATT_ATTSET3
DECL|FMC_PATT_ATTWAIT3_0|macro|FMC_PATT_ATTWAIT3_0
DECL|FMC_PATT_ATTWAIT3_1|macro|FMC_PATT_ATTWAIT3_1
DECL|FMC_PATT_ATTWAIT3_2|macro|FMC_PATT_ATTWAIT3_2
DECL|FMC_PATT_ATTWAIT3_3|macro|FMC_PATT_ATTWAIT3_3
DECL|FMC_PATT_ATTWAIT3_4|macro|FMC_PATT_ATTWAIT3_4
DECL|FMC_PATT_ATTWAIT3_5|macro|FMC_PATT_ATTWAIT3_5
DECL|FMC_PATT_ATTWAIT3_6|macro|FMC_PATT_ATTWAIT3_6
DECL|FMC_PATT_ATTWAIT3_7|macro|FMC_PATT_ATTWAIT3_7
DECL|FMC_PATT_ATTWAIT3_Msk|macro|FMC_PATT_ATTWAIT3_Msk
DECL|FMC_PATT_ATTWAIT3_Pos|macro|FMC_PATT_ATTWAIT3_Pos
DECL|FMC_PATT_ATTWAIT3|macro|FMC_PATT_ATTWAIT3
DECL|FMC_PCR_ECCEN_Msk|macro|FMC_PCR_ECCEN_Msk
DECL|FMC_PCR_ECCEN_Pos|macro|FMC_PCR_ECCEN_Pos
DECL|FMC_PCR_ECCEN|macro|FMC_PCR_ECCEN
DECL|FMC_PCR_ECCPS_0|macro|FMC_PCR_ECCPS_0
DECL|FMC_PCR_ECCPS_1|macro|FMC_PCR_ECCPS_1
DECL|FMC_PCR_ECCPS_2|macro|FMC_PCR_ECCPS_2
DECL|FMC_PCR_ECCPS_Msk|macro|FMC_PCR_ECCPS_Msk
DECL|FMC_PCR_ECCPS_Pos|macro|FMC_PCR_ECCPS_Pos
DECL|FMC_PCR_ECCPS|macro|FMC_PCR_ECCPS
DECL|FMC_PCR_PBKEN_Msk|macro|FMC_PCR_PBKEN_Msk
DECL|FMC_PCR_PBKEN_Pos|macro|FMC_PCR_PBKEN_Pos
DECL|FMC_PCR_PBKEN|macro|FMC_PCR_PBKEN
DECL|FMC_PCR_PTYP_Msk|macro|FMC_PCR_PTYP_Msk
DECL|FMC_PCR_PTYP_Pos|macro|FMC_PCR_PTYP_Pos
DECL|FMC_PCR_PTYP|macro|FMC_PCR_PTYP
DECL|FMC_PCR_PWAITEN_Msk|macro|FMC_PCR_PWAITEN_Msk
DECL|FMC_PCR_PWAITEN_Pos|macro|FMC_PCR_PWAITEN_Pos
DECL|FMC_PCR_PWAITEN|macro|FMC_PCR_PWAITEN
DECL|FMC_PCR_PWID_0|macro|FMC_PCR_PWID_0
DECL|FMC_PCR_PWID_1|macro|FMC_PCR_PWID_1
DECL|FMC_PCR_PWID_Msk|macro|FMC_PCR_PWID_Msk
DECL|FMC_PCR_PWID_Pos|macro|FMC_PCR_PWID_Pos
DECL|FMC_PCR_PWID|macro|FMC_PCR_PWID
DECL|FMC_PCR_TAR_0|macro|FMC_PCR_TAR_0
DECL|FMC_PCR_TAR_1|macro|FMC_PCR_TAR_1
DECL|FMC_PCR_TAR_2|macro|FMC_PCR_TAR_2
DECL|FMC_PCR_TAR_3|macro|FMC_PCR_TAR_3
DECL|FMC_PCR_TAR_Msk|macro|FMC_PCR_TAR_Msk
DECL|FMC_PCR_TAR_Pos|macro|FMC_PCR_TAR_Pos
DECL|FMC_PCR_TAR|macro|FMC_PCR_TAR
DECL|FMC_PCR_TCLR_0|macro|FMC_PCR_TCLR_0
DECL|FMC_PCR_TCLR_1|macro|FMC_PCR_TCLR_1
DECL|FMC_PCR_TCLR_2|macro|FMC_PCR_TCLR_2
DECL|FMC_PCR_TCLR_3|macro|FMC_PCR_TCLR_3
DECL|FMC_PCR_TCLR_Msk|macro|FMC_PCR_TCLR_Msk
DECL|FMC_PCR_TCLR_Pos|macro|FMC_PCR_TCLR_Pos
DECL|FMC_PCR_TCLR|macro|FMC_PCR_TCLR
DECL|FMC_PMEM_MEMHIZ3_0|macro|FMC_PMEM_MEMHIZ3_0
DECL|FMC_PMEM_MEMHIZ3_1|macro|FMC_PMEM_MEMHIZ3_1
DECL|FMC_PMEM_MEMHIZ3_2|macro|FMC_PMEM_MEMHIZ3_2
DECL|FMC_PMEM_MEMHIZ3_3|macro|FMC_PMEM_MEMHIZ3_3
DECL|FMC_PMEM_MEMHIZ3_4|macro|FMC_PMEM_MEMHIZ3_4
DECL|FMC_PMEM_MEMHIZ3_5|macro|FMC_PMEM_MEMHIZ3_5
DECL|FMC_PMEM_MEMHIZ3_6|macro|FMC_PMEM_MEMHIZ3_6
DECL|FMC_PMEM_MEMHIZ3_7|macro|FMC_PMEM_MEMHIZ3_7
DECL|FMC_PMEM_MEMHIZ3_Msk|macro|FMC_PMEM_MEMHIZ3_Msk
DECL|FMC_PMEM_MEMHIZ3_Pos|macro|FMC_PMEM_MEMHIZ3_Pos
DECL|FMC_PMEM_MEMHIZ3|macro|FMC_PMEM_MEMHIZ3
DECL|FMC_PMEM_MEMHOLD3_0|macro|FMC_PMEM_MEMHOLD3_0
DECL|FMC_PMEM_MEMHOLD3_1|macro|FMC_PMEM_MEMHOLD3_1
DECL|FMC_PMEM_MEMHOLD3_2|macro|FMC_PMEM_MEMHOLD3_2
DECL|FMC_PMEM_MEMHOLD3_3|macro|FMC_PMEM_MEMHOLD3_3
DECL|FMC_PMEM_MEMHOLD3_4|macro|FMC_PMEM_MEMHOLD3_4
DECL|FMC_PMEM_MEMHOLD3_5|macro|FMC_PMEM_MEMHOLD3_5
DECL|FMC_PMEM_MEMHOLD3_6|macro|FMC_PMEM_MEMHOLD3_6
DECL|FMC_PMEM_MEMHOLD3_7|macro|FMC_PMEM_MEMHOLD3_7
DECL|FMC_PMEM_MEMHOLD3_Msk|macro|FMC_PMEM_MEMHOLD3_Msk
DECL|FMC_PMEM_MEMHOLD3_Pos|macro|FMC_PMEM_MEMHOLD3_Pos
DECL|FMC_PMEM_MEMHOLD3|macro|FMC_PMEM_MEMHOLD3
DECL|FMC_PMEM_MEMSET3_0|macro|FMC_PMEM_MEMSET3_0
DECL|FMC_PMEM_MEMSET3_1|macro|FMC_PMEM_MEMSET3_1
DECL|FMC_PMEM_MEMSET3_2|macro|FMC_PMEM_MEMSET3_2
DECL|FMC_PMEM_MEMSET3_3|macro|FMC_PMEM_MEMSET3_3
DECL|FMC_PMEM_MEMSET3_4|macro|FMC_PMEM_MEMSET3_4
DECL|FMC_PMEM_MEMSET3_5|macro|FMC_PMEM_MEMSET3_5
DECL|FMC_PMEM_MEMSET3_6|macro|FMC_PMEM_MEMSET3_6
DECL|FMC_PMEM_MEMSET3_7|macro|FMC_PMEM_MEMSET3_7
DECL|FMC_PMEM_MEMSET3_Msk|macro|FMC_PMEM_MEMSET3_Msk
DECL|FMC_PMEM_MEMSET3_Pos|macro|FMC_PMEM_MEMSET3_Pos
DECL|FMC_PMEM_MEMSET3|macro|FMC_PMEM_MEMSET3
DECL|FMC_PMEM_MEMWAIT3_0|macro|FMC_PMEM_MEMWAIT3_0
DECL|FMC_PMEM_MEMWAIT3_1|macro|FMC_PMEM_MEMWAIT3_1
DECL|FMC_PMEM_MEMWAIT3_2|macro|FMC_PMEM_MEMWAIT3_2
DECL|FMC_PMEM_MEMWAIT3_3|macro|FMC_PMEM_MEMWAIT3_3
DECL|FMC_PMEM_MEMWAIT3_4|macro|FMC_PMEM_MEMWAIT3_4
DECL|FMC_PMEM_MEMWAIT3_5|macro|FMC_PMEM_MEMWAIT3_5
DECL|FMC_PMEM_MEMWAIT3_6|macro|FMC_PMEM_MEMWAIT3_6
DECL|FMC_PMEM_MEMWAIT3_7|macro|FMC_PMEM_MEMWAIT3_7
DECL|FMC_PMEM_MEMWAIT3_Msk|macro|FMC_PMEM_MEMWAIT3_Msk
DECL|FMC_PMEM_MEMWAIT3_Pos|macro|FMC_PMEM_MEMWAIT3_Pos
DECL|FMC_PMEM_MEMWAIT3|macro|FMC_PMEM_MEMWAIT3
DECL|FMC_R_BASE|macro|FMC_R_BASE
DECL|FMC_SDCMR_CTB1_Msk|macro|FMC_SDCMR_CTB1_Msk
DECL|FMC_SDCMR_CTB1_Pos|macro|FMC_SDCMR_CTB1_Pos
DECL|FMC_SDCMR_CTB1|macro|FMC_SDCMR_CTB1
DECL|FMC_SDCMR_CTB2_Msk|macro|FMC_SDCMR_CTB2_Msk
DECL|FMC_SDCMR_CTB2_Pos|macro|FMC_SDCMR_CTB2_Pos
DECL|FMC_SDCMR_CTB2|macro|FMC_SDCMR_CTB2
DECL|FMC_SDCMR_MODE_0|macro|FMC_SDCMR_MODE_0
DECL|FMC_SDCMR_MODE_1|macro|FMC_SDCMR_MODE_1
DECL|FMC_SDCMR_MODE_2|macro|FMC_SDCMR_MODE_2
DECL|FMC_SDCMR_MODE_Msk|macro|FMC_SDCMR_MODE_Msk
DECL|FMC_SDCMR_MODE_Pos|macro|FMC_SDCMR_MODE_Pos
DECL|FMC_SDCMR_MODE|macro|FMC_SDCMR_MODE
DECL|FMC_SDCMR_MRD_Msk|macro|FMC_SDCMR_MRD_Msk
DECL|FMC_SDCMR_MRD_Pos|macro|FMC_SDCMR_MRD_Pos
DECL|FMC_SDCMR_MRD|macro|FMC_SDCMR_MRD
DECL|FMC_SDCMR_NRFS_0|macro|FMC_SDCMR_NRFS_0
DECL|FMC_SDCMR_NRFS_1|macro|FMC_SDCMR_NRFS_1
DECL|FMC_SDCMR_NRFS_2|macro|FMC_SDCMR_NRFS_2
DECL|FMC_SDCMR_NRFS_3|macro|FMC_SDCMR_NRFS_3
DECL|FMC_SDCMR_NRFS_Msk|macro|FMC_SDCMR_NRFS_Msk
DECL|FMC_SDCMR_NRFS_Pos|macro|FMC_SDCMR_NRFS_Pos
DECL|FMC_SDCMR_NRFS|macro|FMC_SDCMR_NRFS
DECL|FMC_SDCR1_CAS_0|macro|FMC_SDCR1_CAS_0
DECL|FMC_SDCR1_CAS_1|macro|FMC_SDCR1_CAS_1
DECL|FMC_SDCR1_CAS_Msk|macro|FMC_SDCR1_CAS_Msk
DECL|FMC_SDCR1_CAS_Pos|macro|FMC_SDCR1_CAS_Pos
DECL|FMC_SDCR1_CAS|macro|FMC_SDCR1_CAS
DECL|FMC_SDCR1_MWID_0|macro|FMC_SDCR1_MWID_0
DECL|FMC_SDCR1_MWID_1|macro|FMC_SDCR1_MWID_1
DECL|FMC_SDCR1_MWID_Msk|macro|FMC_SDCR1_MWID_Msk
DECL|FMC_SDCR1_MWID_Pos|macro|FMC_SDCR1_MWID_Pos
DECL|FMC_SDCR1_MWID|macro|FMC_SDCR1_MWID
DECL|FMC_SDCR1_NB_Msk|macro|FMC_SDCR1_NB_Msk
DECL|FMC_SDCR1_NB_Pos|macro|FMC_SDCR1_NB_Pos
DECL|FMC_SDCR1_NB|macro|FMC_SDCR1_NB
DECL|FMC_SDCR1_NC_0|macro|FMC_SDCR1_NC_0
DECL|FMC_SDCR1_NC_1|macro|FMC_SDCR1_NC_1
DECL|FMC_SDCR1_NC_Msk|macro|FMC_SDCR1_NC_Msk
DECL|FMC_SDCR1_NC_Pos|macro|FMC_SDCR1_NC_Pos
DECL|FMC_SDCR1_NC|macro|FMC_SDCR1_NC
DECL|FMC_SDCR1_NR_0|macro|FMC_SDCR1_NR_0
DECL|FMC_SDCR1_NR_1|macro|FMC_SDCR1_NR_1
DECL|FMC_SDCR1_NR_Msk|macro|FMC_SDCR1_NR_Msk
DECL|FMC_SDCR1_NR_Pos|macro|FMC_SDCR1_NR_Pos
DECL|FMC_SDCR1_NR|macro|FMC_SDCR1_NR
DECL|FMC_SDCR1_RBURST_Msk|macro|FMC_SDCR1_RBURST_Msk
DECL|FMC_SDCR1_RBURST_Pos|macro|FMC_SDCR1_RBURST_Pos
DECL|FMC_SDCR1_RBURST|macro|FMC_SDCR1_RBURST
DECL|FMC_SDCR1_RPIPE_0|macro|FMC_SDCR1_RPIPE_0
DECL|FMC_SDCR1_RPIPE_1|macro|FMC_SDCR1_RPIPE_1
DECL|FMC_SDCR1_RPIPE_Msk|macro|FMC_SDCR1_RPIPE_Msk
DECL|FMC_SDCR1_RPIPE_Pos|macro|FMC_SDCR1_RPIPE_Pos
DECL|FMC_SDCR1_RPIPE|macro|FMC_SDCR1_RPIPE
DECL|FMC_SDCR1_SDCLK_0|macro|FMC_SDCR1_SDCLK_0
DECL|FMC_SDCR1_SDCLK_1|macro|FMC_SDCR1_SDCLK_1
DECL|FMC_SDCR1_SDCLK_Msk|macro|FMC_SDCR1_SDCLK_Msk
DECL|FMC_SDCR1_SDCLK_Pos|macro|FMC_SDCR1_SDCLK_Pos
DECL|FMC_SDCR1_SDCLK|macro|FMC_SDCR1_SDCLK
DECL|FMC_SDCR1_WP_Msk|macro|FMC_SDCR1_WP_Msk
DECL|FMC_SDCR1_WP_Pos|macro|FMC_SDCR1_WP_Pos
DECL|FMC_SDCR1_WP|macro|FMC_SDCR1_WP
DECL|FMC_SDCR2_CAS_0|macro|FMC_SDCR2_CAS_0
DECL|FMC_SDCR2_CAS_1|macro|FMC_SDCR2_CAS_1
DECL|FMC_SDCR2_CAS_Msk|macro|FMC_SDCR2_CAS_Msk
DECL|FMC_SDCR2_CAS_Pos|macro|FMC_SDCR2_CAS_Pos
DECL|FMC_SDCR2_CAS|macro|FMC_SDCR2_CAS
DECL|FMC_SDCR2_MWID_0|macro|FMC_SDCR2_MWID_0
DECL|FMC_SDCR2_MWID_1|macro|FMC_SDCR2_MWID_1
DECL|FMC_SDCR2_MWID_Msk|macro|FMC_SDCR2_MWID_Msk
DECL|FMC_SDCR2_MWID_Pos|macro|FMC_SDCR2_MWID_Pos
DECL|FMC_SDCR2_MWID|macro|FMC_SDCR2_MWID
DECL|FMC_SDCR2_NB_Msk|macro|FMC_SDCR2_NB_Msk
DECL|FMC_SDCR2_NB_Pos|macro|FMC_SDCR2_NB_Pos
DECL|FMC_SDCR2_NB|macro|FMC_SDCR2_NB
DECL|FMC_SDCR2_NC_0|macro|FMC_SDCR2_NC_0
DECL|FMC_SDCR2_NC_1|macro|FMC_SDCR2_NC_1
DECL|FMC_SDCR2_NC_Msk|macro|FMC_SDCR2_NC_Msk
DECL|FMC_SDCR2_NC_Pos|macro|FMC_SDCR2_NC_Pos
DECL|FMC_SDCR2_NC|macro|FMC_SDCR2_NC
DECL|FMC_SDCR2_NR_0|macro|FMC_SDCR2_NR_0
DECL|FMC_SDCR2_NR_1|macro|FMC_SDCR2_NR_1
DECL|FMC_SDCR2_NR_Msk|macro|FMC_SDCR2_NR_Msk
DECL|FMC_SDCR2_NR_Pos|macro|FMC_SDCR2_NR_Pos
DECL|FMC_SDCR2_NR|macro|FMC_SDCR2_NR
DECL|FMC_SDCR2_RBURST_Msk|macro|FMC_SDCR2_RBURST_Msk
DECL|FMC_SDCR2_RBURST_Pos|macro|FMC_SDCR2_RBURST_Pos
DECL|FMC_SDCR2_RBURST|macro|FMC_SDCR2_RBURST
DECL|FMC_SDCR2_RPIPE_0|macro|FMC_SDCR2_RPIPE_0
DECL|FMC_SDCR2_RPIPE_1|macro|FMC_SDCR2_RPIPE_1
DECL|FMC_SDCR2_RPIPE_Msk|macro|FMC_SDCR2_RPIPE_Msk
DECL|FMC_SDCR2_RPIPE_Pos|macro|FMC_SDCR2_RPIPE_Pos
DECL|FMC_SDCR2_RPIPE|macro|FMC_SDCR2_RPIPE
DECL|FMC_SDCR2_SDCLK_0|macro|FMC_SDCR2_SDCLK_0
DECL|FMC_SDCR2_SDCLK_1|macro|FMC_SDCR2_SDCLK_1
DECL|FMC_SDCR2_SDCLK_Msk|macro|FMC_SDCR2_SDCLK_Msk
DECL|FMC_SDCR2_SDCLK_Pos|macro|FMC_SDCR2_SDCLK_Pos
DECL|FMC_SDCR2_SDCLK|macro|FMC_SDCR2_SDCLK
DECL|FMC_SDCR2_WP_Msk|macro|FMC_SDCR2_WP_Msk
DECL|FMC_SDCR2_WP_Pos|macro|FMC_SDCR2_WP_Pos
DECL|FMC_SDCR2_WP|macro|FMC_SDCR2_WP
DECL|FMC_SDRTR_COUNT_Msk|macro|FMC_SDRTR_COUNT_Msk
DECL|FMC_SDRTR_COUNT_Pos|macro|FMC_SDRTR_COUNT_Pos
DECL|FMC_SDRTR_COUNT|macro|FMC_SDRTR_COUNT
DECL|FMC_SDRTR_CRE_Msk|macro|FMC_SDRTR_CRE_Msk
DECL|FMC_SDRTR_CRE_Pos|macro|FMC_SDRTR_CRE_Pos
DECL|FMC_SDRTR_CRE|macro|FMC_SDRTR_CRE
DECL|FMC_SDRTR_REIE_Msk|macro|FMC_SDRTR_REIE_Msk
DECL|FMC_SDRTR_REIE_Pos|macro|FMC_SDRTR_REIE_Pos
DECL|FMC_SDRTR_REIE|macro|FMC_SDRTR_REIE
DECL|FMC_SDSR_BUSY_Msk|macro|FMC_SDSR_BUSY_Msk
DECL|FMC_SDSR_BUSY_Pos|macro|FMC_SDSR_BUSY_Pos
DECL|FMC_SDSR_BUSY|macro|FMC_SDSR_BUSY
DECL|FMC_SDSR_MODES1_0|macro|FMC_SDSR_MODES1_0
DECL|FMC_SDSR_MODES1_1|macro|FMC_SDSR_MODES1_1
DECL|FMC_SDSR_MODES1_Msk|macro|FMC_SDSR_MODES1_Msk
DECL|FMC_SDSR_MODES1_Pos|macro|FMC_SDSR_MODES1_Pos
DECL|FMC_SDSR_MODES1|macro|FMC_SDSR_MODES1
DECL|FMC_SDSR_MODES2_0|macro|FMC_SDSR_MODES2_0
DECL|FMC_SDSR_MODES2_1|macro|FMC_SDSR_MODES2_1
DECL|FMC_SDSR_MODES2_Msk|macro|FMC_SDSR_MODES2_Msk
DECL|FMC_SDSR_MODES2_Pos|macro|FMC_SDSR_MODES2_Pos
DECL|FMC_SDSR_MODES2|macro|FMC_SDSR_MODES2
DECL|FMC_SDSR_RE_Msk|macro|FMC_SDSR_RE_Msk
DECL|FMC_SDSR_RE_Pos|macro|FMC_SDSR_RE_Pos
DECL|FMC_SDSR_RE|macro|FMC_SDSR_RE
DECL|FMC_SDTR1_TMRD_0|macro|FMC_SDTR1_TMRD_0
DECL|FMC_SDTR1_TMRD_1|macro|FMC_SDTR1_TMRD_1
DECL|FMC_SDTR1_TMRD_2|macro|FMC_SDTR1_TMRD_2
DECL|FMC_SDTR1_TMRD_3|macro|FMC_SDTR1_TMRD_3
DECL|FMC_SDTR1_TMRD_Msk|macro|FMC_SDTR1_TMRD_Msk
DECL|FMC_SDTR1_TMRD_Pos|macro|FMC_SDTR1_TMRD_Pos
DECL|FMC_SDTR1_TMRD|macro|FMC_SDTR1_TMRD
DECL|FMC_SDTR1_TRAS_0|macro|FMC_SDTR1_TRAS_0
DECL|FMC_SDTR1_TRAS_1|macro|FMC_SDTR1_TRAS_1
DECL|FMC_SDTR1_TRAS_2|macro|FMC_SDTR1_TRAS_2
DECL|FMC_SDTR1_TRAS_3|macro|FMC_SDTR1_TRAS_3
DECL|FMC_SDTR1_TRAS_Msk|macro|FMC_SDTR1_TRAS_Msk
DECL|FMC_SDTR1_TRAS_Pos|macro|FMC_SDTR1_TRAS_Pos
DECL|FMC_SDTR1_TRAS|macro|FMC_SDTR1_TRAS
DECL|FMC_SDTR1_TRCD_0|macro|FMC_SDTR1_TRCD_0
DECL|FMC_SDTR1_TRCD_1|macro|FMC_SDTR1_TRCD_1
DECL|FMC_SDTR1_TRCD_2|macro|FMC_SDTR1_TRCD_2
DECL|FMC_SDTR1_TRCD_Msk|macro|FMC_SDTR1_TRCD_Msk
DECL|FMC_SDTR1_TRCD_Pos|macro|FMC_SDTR1_TRCD_Pos
DECL|FMC_SDTR1_TRCD|macro|FMC_SDTR1_TRCD
DECL|FMC_SDTR1_TRC_0|macro|FMC_SDTR1_TRC_0
DECL|FMC_SDTR1_TRC_1|macro|FMC_SDTR1_TRC_1
DECL|FMC_SDTR1_TRC_2|macro|FMC_SDTR1_TRC_2
DECL|FMC_SDTR1_TRC_Msk|macro|FMC_SDTR1_TRC_Msk
DECL|FMC_SDTR1_TRC_Pos|macro|FMC_SDTR1_TRC_Pos
DECL|FMC_SDTR1_TRC|macro|FMC_SDTR1_TRC
DECL|FMC_SDTR1_TRP_0|macro|FMC_SDTR1_TRP_0
DECL|FMC_SDTR1_TRP_1|macro|FMC_SDTR1_TRP_1
DECL|FMC_SDTR1_TRP_2|macro|FMC_SDTR1_TRP_2
DECL|FMC_SDTR1_TRP_Msk|macro|FMC_SDTR1_TRP_Msk
DECL|FMC_SDTR1_TRP_Pos|macro|FMC_SDTR1_TRP_Pos
DECL|FMC_SDTR1_TRP|macro|FMC_SDTR1_TRP
DECL|FMC_SDTR1_TWR_0|macro|FMC_SDTR1_TWR_0
DECL|FMC_SDTR1_TWR_1|macro|FMC_SDTR1_TWR_1
DECL|FMC_SDTR1_TWR_2|macro|FMC_SDTR1_TWR_2
DECL|FMC_SDTR1_TWR_Msk|macro|FMC_SDTR1_TWR_Msk
DECL|FMC_SDTR1_TWR_Pos|macro|FMC_SDTR1_TWR_Pos
DECL|FMC_SDTR1_TWR|macro|FMC_SDTR1_TWR
DECL|FMC_SDTR1_TXSR_0|macro|FMC_SDTR1_TXSR_0
DECL|FMC_SDTR1_TXSR_1|macro|FMC_SDTR1_TXSR_1
DECL|FMC_SDTR1_TXSR_2|macro|FMC_SDTR1_TXSR_2
DECL|FMC_SDTR1_TXSR_3|macro|FMC_SDTR1_TXSR_3
DECL|FMC_SDTR1_TXSR_Msk|macro|FMC_SDTR1_TXSR_Msk
DECL|FMC_SDTR1_TXSR_Pos|macro|FMC_SDTR1_TXSR_Pos
DECL|FMC_SDTR1_TXSR|macro|FMC_SDTR1_TXSR
DECL|FMC_SDTR2_TMRD_0|macro|FMC_SDTR2_TMRD_0
DECL|FMC_SDTR2_TMRD_1|macro|FMC_SDTR2_TMRD_1
DECL|FMC_SDTR2_TMRD_2|macro|FMC_SDTR2_TMRD_2
DECL|FMC_SDTR2_TMRD_3|macro|FMC_SDTR2_TMRD_3
DECL|FMC_SDTR2_TMRD_Msk|macro|FMC_SDTR2_TMRD_Msk
DECL|FMC_SDTR2_TMRD_Pos|macro|FMC_SDTR2_TMRD_Pos
DECL|FMC_SDTR2_TMRD|macro|FMC_SDTR2_TMRD
DECL|FMC_SDTR2_TRAS_0|macro|FMC_SDTR2_TRAS_0
DECL|FMC_SDTR2_TRAS_1|macro|FMC_SDTR2_TRAS_1
DECL|FMC_SDTR2_TRAS_2|macro|FMC_SDTR2_TRAS_2
DECL|FMC_SDTR2_TRAS_3|macro|FMC_SDTR2_TRAS_3
DECL|FMC_SDTR2_TRAS_Msk|macro|FMC_SDTR2_TRAS_Msk
DECL|FMC_SDTR2_TRAS_Pos|macro|FMC_SDTR2_TRAS_Pos
DECL|FMC_SDTR2_TRAS|macro|FMC_SDTR2_TRAS
DECL|FMC_SDTR2_TRCD_0|macro|FMC_SDTR2_TRCD_0
DECL|FMC_SDTR2_TRCD_1|macro|FMC_SDTR2_TRCD_1
DECL|FMC_SDTR2_TRCD_2|macro|FMC_SDTR2_TRCD_2
DECL|FMC_SDTR2_TRCD_Msk|macro|FMC_SDTR2_TRCD_Msk
DECL|FMC_SDTR2_TRCD_Pos|macro|FMC_SDTR2_TRCD_Pos
DECL|FMC_SDTR2_TRCD|macro|FMC_SDTR2_TRCD
DECL|FMC_SDTR2_TRC_0|macro|FMC_SDTR2_TRC_0
DECL|FMC_SDTR2_TRC_1|macro|FMC_SDTR2_TRC_1
DECL|FMC_SDTR2_TRC_2|macro|FMC_SDTR2_TRC_2
DECL|FMC_SDTR2_TRC_Msk|macro|FMC_SDTR2_TRC_Msk
DECL|FMC_SDTR2_TRC_Pos|macro|FMC_SDTR2_TRC_Pos
DECL|FMC_SDTR2_TRC|macro|FMC_SDTR2_TRC
DECL|FMC_SDTR2_TRP_0|macro|FMC_SDTR2_TRP_0
DECL|FMC_SDTR2_TRP_1|macro|FMC_SDTR2_TRP_1
DECL|FMC_SDTR2_TRP_2|macro|FMC_SDTR2_TRP_2
DECL|FMC_SDTR2_TRP_Msk|macro|FMC_SDTR2_TRP_Msk
DECL|FMC_SDTR2_TRP_Pos|macro|FMC_SDTR2_TRP_Pos
DECL|FMC_SDTR2_TRP|macro|FMC_SDTR2_TRP
DECL|FMC_SDTR2_TWR_0|macro|FMC_SDTR2_TWR_0
DECL|FMC_SDTR2_TWR_1|macro|FMC_SDTR2_TWR_1
DECL|FMC_SDTR2_TWR_2|macro|FMC_SDTR2_TWR_2
DECL|FMC_SDTR2_TWR_Msk|macro|FMC_SDTR2_TWR_Msk
DECL|FMC_SDTR2_TWR_Pos|macro|FMC_SDTR2_TWR_Pos
DECL|FMC_SDTR2_TWR|macro|FMC_SDTR2_TWR
DECL|FMC_SDTR2_TXSR_0|macro|FMC_SDTR2_TXSR_0
DECL|FMC_SDTR2_TXSR_1|macro|FMC_SDTR2_TXSR_1
DECL|FMC_SDTR2_TXSR_2|macro|FMC_SDTR2_TXSR_2
DECL|FMC_SDTR2_TXSR_3|macro|FMC_SDTR2_TXSR_3
DECL|FMC_SDTR2_TXSR_Msk|macro|FMC_SDTR2_TXSR_Msk
DECL|FMC_SDTR2_TXSR_Pos|macro|FMC_SDTR2_TXSR_Pos
DECL|FMC_SDTR2_TXSR|macro|FMC_SDTR2_TXSR
DECL|FMC_SR_FEMPT_Msk|macro|FMC_SR_FEMPT_Msk
DECL|FMC_SR_FEMPT_Pos|macro|FMC_SR_FEMPT_Pos
DECL|FMC_SR_FEMPT|macro|FMC_SR_FEMPT
DECL|FMC_SR_IFEN_Msk|macro|FMC_SR_IFEN_Msk
DECL|FMC_SR_IFEN_Pos|macro|FMC_SR_IFEN_Pos
DECL|FMC_SR_IFEN|macro|FMC_SR_IFEN
DECL|FMC_SR_IFS_Msk|macro|FMC_SR_IFS_Msk
DECL|FMC_SR_IFS_Pos|macro|FMC_SR_IFS_Pos
DECL|FMC_SR_IFS|macro|FMC_SR_IFS
DECL|FMC_SR_ILEN_Msk|macro|FMC_SR_ILEN_Msk
DECL|FMC_SR_ILEN_Pos|macro|FMC_SR_ILEN_Pos
DECL|FMC_SR_ILEN|macro|FMC_SR_ILEN
DECL|FMC_SR_ILS_Msk|macro|FMC_SR_ILS_Msk
DECL|FMC_SR_ILS_Pos|macro|FMC_SR_ILS_Pos
DECL|FMC_SR_ILS|macro|FMC_SR_ILS
DECL|FMC_SR_IREN_Msk|macro|FMC_SR_IREN_Msk
DECL|FMC_SR_IREN_Pos|macro|FMC_SR_IREN_Pos
DECL|FMC_SR_IREN|macro|FMC_SR_IREN
DECL|FMC_SR_IRS_Msk|macro|FMC_SR_IRS_Msk
DECL|FMC_SR_IRS_Pos|macro|FMC_SR_IRS_Pos
DECL|FMC_SR_IRS|macro|FMC_SR_IRS
DECL|FMR|member|__IO uint32_t FMR; /*!< CAN filter master register, Address offset: 0x200 */
DECL|FPU_IRQn|enumerator|FPU_IRQn = 81, /*!< FPU global interrupt */
DECL|FR1|member|__IO uint32_t FR1; /*!< CAN Filter bank register 1 */
DECL|FR2|member|__IO uint32_t FR2; /*!< CAN Filter bank register 1 */
DECL|FRCR|member|__IO uint32_t FRCR; /*!< SAI block x frame configuration register, Address offset: 0x0C */
DECL|FS1R|member|__IO uint32_t FS1R; /*!< CAN filter scale register, Address offset: 0x20C */
DECL|FTSR|member|__IO uint32_t FTSR; /*!< EXTI Falling trigger selection register, Address offset: 0x0C */
DECL|GADPCTL|member|__IO uint32_t GADPCTL; /*!< ADP Timer, Control and Status Register 60Ch */
DECL|GAHBCFG|member|__IO uint32_t GAHBCFG; /*!< Core AHB Configuration Register 008h */
DECL|GCCFG|member|__IO uint32_t GCCFG; /*!< General Purpose IO Register 038h */
DECL|GCR|member|__IO uint32_t GCR; /*!< SAI global configuration register, Address offset: 0x00 */
DECL|GDFIFOCFG|member|__IO uint32_t GDFIFOCFG; /*!< DFIFO Software Config Register 05Ch */
DECL|GHWCFG3|member|__IO uint32_t GHWCFG3; /*!< User HW config3 04Ch */
DECL|GINTMSK|member|__IO uint32_t GINTMSK; /*!< Core Interrupt Mask Register 018h */
DECL|GINTSTS|member|__IO uint32_t GINTSTS; /*!< Core Interrupt Register 014h */
DECL|GLPMCFG|member|__IO uint32_t GLPMCFG; /*!< LPM Register 054h */
DECL|GOTGCTL|member|__IO uint32_t GOTGCTL; /*!< USB_OTG Control and Status Register 000h */
DECL|GOTGINT|member|__IO uint32_t GOTGINT; /*!< USB_OTG Interrupt Register 004h */
DECL|GPIOA_BASE|macro|GPIOA_BASE
DECL|GPIOA|macro|GPIOA
DECL|GPIOB_BASE|macro|GPIOB_BASE
DECL|GPIOB|macro|GPIOB
DECL|GPIOC_BASE|macro|GPIOC_BASE
DECL|GPIOC|macro|GPIOC
DECL|GPIOD_BASE|macro|GPIOD_BASE
DECL|GPIOD|macro|GPIOD
DECL|GPIOE_BASE|macro|GPIOE_BASE
DECL|GPIOE|macro|GPIOE
DECL|GPIOF_BASE|macro|GPIOF_BASE
DECL|GPIOF|macro|GPIOF
DECL|GPIOG_BASE|macro|GPIOG_BASE
DECL|GPIOG|macro|GPIOG
DECL|GPIOH_BASE|macro|GPIOH_BASE
DECL|GPIOH|macro|GPIOH
DECL|GPIOI_BASE|macro|GPIOI_BASE
DECL|GPIOI|macro|GPIOI
DECL|GPIO_AFRH_AFRH0_0|macro|GPIO_AFRH_AFRH0_0
DECL|GPIO_AFRH_AFRH0_1|macro|GPIO_AFRH_AFRH0_1
DECL|GPIO_AFRH_AFRH0_2|macro|GPIO_AFRH_AFRH0_2
DECL|GPIO_AFRH_AFRH0_3|macro|GPIO_AFRH_AFRH0_3
DECL|GPIO_AFRH_AFRH0_Msk|macro|GPIO_AFRH_AFRH0_Msk
DECL|GPIO_AFRH_AFRH0_Pos|macro|GPIO_AFRH_AFRH0_Pos
DECL|GPIO_AFRH_AFRH0|macro|GPIO_AFRH_AFRH0
DECL|GPIO_AFRH_AFRH1_0|macro|GPIO_AFRH_AFRH1_0
DECL|GPIO_AFRH_AFRH1_1|macro|GPIO_AFRH_AFRH1_1
DECL|GPIO_AFRH_AFRH1_2|macro|GPIO_AFRH_AFRH1_2
DECL|GPIO_AFRH_AFRH1_3|macro|GPIO_AFRH_AFRH1_3
DECL|GPIO_AFRH_AFRH1_Msk|macro|GPIO_AFRH_AFRH1_Msk
DECL|GPIO_AFRH_AFRH1_Pos|macro|GPIO_AFRH_AFRH1_Pos
DECL|GPIO_AFRH_AFRH1|macro|GPIO_AFRH_AFRH1
DECL|GPIO_AFRH_AFRH2_0|macro|GPIO_AFRH_AFRH2_0
DECL|GPIO_AFRH_AFRH2_1|macro|GPIO_AFRH_AFRH2_1
DECL|GPIO_AFRH_AFRH2_2|macro|GPIO_AFRH_AFRH2_2
DECL|GPIO_AFRH_AFRH2_3|macro|GPIO_AFRH_AFRH2_3
DECL|GPIO_AFRH_AFRH2_Msk|macro|GPIO_AFRH_AFRH2_Msk
DECL|GPIO_AFRH_AFRH2_Pos|macro|GPIO_AFRH_AFRH2_Pos
DECL|GPIO_AFRH_AFRH2|macro|GPIO_AFRH_AFRH2
DECL|GPIO_AFRH_AFRH3_0|macro|GPIO_AFRH_AFRH3_0
DECL|GPIO_AFRH_AFRH3_1|macro|GPIO_AFRH_AFRH3_1
DECL|GPIO_AFRH_AFRH3_2|macro|GPIO_AFRH_AFRH3_2
DECL|GPIO_AFRH_AFRH3_3|macro|GPIO_AFRH_AFRH3_3
DECL|GPIO_AFRH_AFRH3_Msk|macro|GPIO_AFRH_AFRH3_Msk
DECL|GPIO_AFRH_AFRH3_Pos|macro|GPIO_AFRH_AFRH3_Pos
DECL|GPIO_AFRH_AFRH3|macro|GPIO_AFRH_AFRH3
DECL|GPIO_AFRH_AFRH4_0|macro|GPIO_AFRH_AFRH4_0
DECL|GPIO_AFRH_AFRH4_1|macro|GPIO_AFRH_AFRH4_1
DECL|GPIO_AFRH_AFRH4_2|macro|GPIO_AFRH_AFRH4_2
DECL|GPIO_AFRH_AFRH4_3|macro|GPIO_AFRH_AFRH4_3
DECL|GPIO_AFRH_AFRH4_Msk|macro|GPIO_AFRH_AFRH4_Msk
DECL|GPIO_AFRH_AFRH4_Pos|macro|GPIO_AFRH_AFRH4_Pos
DECL|GPIO_AFRH_AFRH4|macro|GPIO_AFRH_AFRH4
DECL|GPIO_AFRH_AFRH5_0|macro|GPIO_AFRH_AFRH5_0
DECL|GPIO_AFRH_AFRH5_1|macro|GPIO_AFRH_AFRH5_1
DECL|GPIO_AFRH_AFRH5_2|macro|GPIO_AFRH_AFRH5_2
DECL|GPIO_AFRH_AFRH5_3|macro|GPIO_AFRH_AFRH5_3
DECL|GPIO_AFRH_AFRH5_Msk|macro|GPIO_AFRH_AFRH5_Msk
DECL|GPIO_AFRH_AFRH5_Pos|macro|GPIO_AFRH_AFRH5_Pos
DECL|GPIO_AFRH_AFRH5|macro|GPIO_AFRH_AFRH5
DECL|GPIO_AFRH_AFRH6_0|macro|GPIO_AFRH_AFRH6_0
DECL|GPIO_AFRH_AFRH6_1|macro|GPIO_AFRH_AFRH6_1
DECL|GPIO_AFRH_AFRH6_2|macro|GPIO_AFRH_AFRH6_2
DECL|GPIO_AFRH_AFRH6_3|macro|GPIO_AFRH_AFRH6_3
DECL|GPIO_AFRH_AFRH6_Msk|macro|GPIO_AFRH_AFRH6_Msk
DECL|GPIO_AFRH_AFRH6_Pos|macro|GPIO_AFRH_AFRH6_Pos
DECL|GPIO_AFRH_AFRH6|macro|GPIO_AFRH_AFRH6
DECL|GPIO_AFRH_AFRH7_0|macro|GPIO_AFRH_AFRH7_0
DECL|GPIO_AFRH_AFRH7_1|macro|GPIO_AFRH_AFRH7_1
DECL|GPIO_AFRH_AFRH7_2|macro|GPIO_AFRH_AFRH7_2
DECL|GPIO_AFRH_AFRH7_3|macro|GPIO_AFRH_AFRH7_3
DECL|GPIO_AFRH_AFRH7_Msk|macro|GPIO_AFRH_AFRH7_Msk
DECL|GPIO_AFRH_AFRH7_Pos|macro|GPIO_AFRH_AFRH7_Pos
DECL|GPIO_AFRH_AFRH7|macro|GPIO_AFRH_AFRH7
DECL|GPIO_AFRL_AFRL0_0|macro|GPIO_AFRL_AFRL0_0
DECL|GPIO_AFRL_AFRL0_1|macro|GPIO_AFRL_AFRL0_1
DECL|GPIO_AFRL_AFRL0_2|macro|GPIO_AFRL_AFRL0_2
DECL|GPIO_AFRL_AFRL0_3|macro|GPIO_AFRL_AFRL0_3
DECL|GPIO_AFRL_AFRL0_Msk|macro|GPIO_AFRL_AFRL0_Msk
DECL|GPIO_AFRL_AFRL0_Pos|macro|GPIO_AFRL_AFRL0_Pos
DECL|GPIO_AFRL_AFRL0|macro|GPIO_AFRL_AFRL0
DECL|GPIO_AFRL_AFRL1_0|macro|GPIO_AFRL_AFRL1_0
DECL|GPIO_AFRL_AFRL1_1|macro|GPIO_AFRL_AFRL1_1
DECL|GPIO_AFRL_AFRL1_2|macro|GPIO_AFRL_AFRL1_2
DECL|GPIO_AFRL_AFRL1_3|macro|GPIO_AFRL_AFRL1_3
DECL|GPIO_AFRL_AFRL1_Msk|macro|GPIO_AFRL_AFRL1_Msk
DECL|GPIO_AFRL_AFRL1_Pos|macro|GPIO_AFRL_AFRL1_Pos
DECL|GPIO_AFRL_AFRL1|macro|GPIO_AFRL_AFRL1
DECL|GPIO_AFRL_AFRL2_0|macro|GPIO_AFRL_AFRL2_0
DECL|GPIO_AFRL_AFRL2_1|macro|GPIO_AFRL_AFRL2_1
DECL|GPIO_AFRL_AFRL2_2|macro|GPIO_AFRL_AFRL2_2
DECL|GPIO_AFRL_AFRL2_3|macro|GPIO_AFRL_AFRL2_3
DECL|GPIO_AFRL_AFRL2_Msk|macro|GPIO_AFRL_AFRL2_Msk
DECL|GPIO_AFRL_AFRL2_Pos|macro|GPIO_AFRL_AFRL2_Pos
DECL|GPIO_AFRL_AFRL2|macro|GPIO_AFRL_AFRL2
DECL|GPIO_AFRL_AFRL3_0|macro|GPIO_AFRL_AFRL3_0
DECL|GPIO_AFRL_AFRL3_1|macro|GPIO_AFRL_AFRL3_1
DECL|GPIO_AFRL_AFRL3_2|macro|GPIO_AFRL_AFRL3_2
DECL|GPIO_AFRL_AFRL3_3|macro|GPIO_AFRL_AFRL3_3
DECL|GPIO_AFRL_AFRL3_Msk|macro|GPIO_AFRL_AFRL3_Msk
DECL|GPIO_AFRL_AFRL3_Pos|macro|GPIO_AFRL_AFRL3_Pos
DECL|GPIO_AFRL_AFRL3|macro|GPIO_AFRL_AFRL3
DECL|GPIO_AFRL_AFRL4_0|macro|GPIO_AFRL_AFRL4_0
DECL|GPIO_AFRL_AFRL4_1|macro|GPIO_AFRL_AFRL4_1
DECL|GPIO_AFRL_AFRL4_2|macro|GPIO_AFRL_AFRL4_2
DECL|GPIO_AFRL_AFRL4_3|macro|GPIO_AFRL_AFRL4_3
DECL|GPIO_AFRL_AFRL4_Msk|macro|GPIO_AFRL_AFRL4_Msk
DECL|GPIO_AFRL_AFRL4_Pos|macro|GPIO_AFRL_AFRL4_Pos
DECL|GPIO_AFRL_AFRL4|macro|GPIO_AFRL_AFRL4
DECL|GPIO_AFRL_AFRL5_0|macro|GPIO_AFRL_AFRL5_0
DECL|GPIO_AFRL_AFRL5_1|macro|GPIO_AFRL_AFRL5_1
DECL|GPIO_AFRL_AFRL5_2|macro|GPIO_AFRL_AFRL5_2
DECL|GPIO_AFRL_AFRL5_3|macro|GPIO_AFRL_AFRL5_3
DECL|GPIO_AFRL_AFRL5_Msk|macro|GPIO_AFRL_AFRL5_Msk
DECL|GPIO_AFRL_AFRL5_Pos|macro|GPIO_AFRL_AFRL5_Pos
DECL|GPIO_AFRL_AFRL5|macro|GPIO_AFRL_AFRL5
DECL|GPIO_AFRL_AFRL6_0|macro|GPIO_AFRL_AFRL6_0
DECL|GPIO_AFRL_AFRL6_1|macro|GPIO_AFRL_AFRL6_1
DECL|GPIO_AFRL_AFRL6_2|macro|GPIO_AFRL_AFRL6_2
DECL|GPIO_AFRL_AFRL6_3|macro|GPIO_AFRL_AFRL6_3
DECL|GPIO_AFRL_AFRL6_Msk|macro|GPIO_AFRL_AFRL6_Msk
DECL|GPIO_AFRL_AFRL6_Pos|macro|GPIO_AFRL_AFRL6_Pos
DECL|GPIO_AFRL_AFRL6|macro|GPIO_AFRL_AFRL6
DECL|GPIO_AFRL_AFRL7_0|macro|GPIO_AFRL_AFRL7_0
DECL|GPIO_AFRL_AFRL7_1|macro|GPIO_AFRL_AFRL7_1
DECL|GPIO_AFRL_AFRL7_2|macro|GPIO_AFRL_AFRL7_2
DECL|GPIO_AFRL_AFRL7_3|macro|GPIO_AFRL_AFRL7_3
DECL|GPIO_AFRL_AFRL7_Msk|macro|GPIO_AFRL_AFRL7_Msk
DECL|GPIO_AFRL_AFRL7_Pos|macro|GPIO_AFRL_AFRL7_Pos
DECL|GPIO_AFRL_AFRL7|macro|GPIO_AFRL_AFRL7
DECL|GPIO_BSRR_BR_0|macro|GPIO_BSRR_BR_0
DECL|GPIO_BSRR_BR_10|macro|GPIO_BSRR_BR_10
DECL|GPIO_BSRR_BR_11|macro|GPIO_BSRR_BR_11
DECL|GPIO_BSRR_BR_12|macro|GPIO_BSRR_BR_12
DECL|GPIO_BSRR_BR_13|macro|GPIO_BSRR_BR_13
DECL|GPIO_BSRR_BR_14|macro|GPIO_BSRR_BR_14
DECL|GPIO_BSRR_BR_15|macro|GPIO_BSRR_BR_15
DECL|GPIO_BSRR_BR_1|macro|GPIO_BSRR_BR_1
DECL|GPIO_BSRR_BR_2|macro|GPIO_BSRR_BR_2
DECL|GPIO_BSRR_BR_3|macro|GPIO_BSRR_BR_3
DECL|GPIO_BSRR_BR_4|macro|GPIO_BSRR_BR_4
DECL|GPIO_BSRR_BR_5|macro|GPIO_BSRR_BR_5
DECL|GPIO_BSRR_BR_6|macro|GPIO_BSRR_BR_6
DECL|GPIO_BSRR_BR_7|macro|GPIO_BSRR_BR_7
DECL|GPIO_BSRR_BR_8|macro|GPIO_BSRR_BR_8
DECL|GPIO_BSRR_BR_9|macro|GPIO_BSRR_BR_9
DECL|GPIO_BSRR_BS_0|macro|GPIO_BSRR_BS_0
DECL|GPIO_BSRR_BS_10|macro|GPIO_BSRR_BS_10
DECL|GPIO_BSRR_BS_11|macro|GPIO_BSRR_BS_11
DECL|GPIO_BSRR_BS_12|macro|GPIO_BSRR_BS_12
DECL|GPIO_BSRR_BS_13|macro|GPIO_BSRR_BS_13
DECL|GPIO_BSRR_BS_14|macro|GPIO_BSRR_BS_14
DECL|GPIO_BSRR_BS_15|macro|GPIO_BSRR_BS_15
DECL|GPIO_BSRR_BS_1|macro|GPIO_BSRR_BS_1
DECL|GPIO_BSRR_BS_2|macro|GPIO_BSRR_BS_2
DECL|GPIO_BSRR_BS_3|macro|GPIO_BSRR_BS_3
DECL|GPIO_BSRR_BS_4|macro|GPIO_BSRR_BS_4
DECL|GPIO_BSRR_BS_5|macro|GPIO_BSRR_BS_5
DECL|GPIO_BSRR_BS_6|macro|GPIO_BSRR_BS_6
DECL|GPIO_BSRR_BS_7|macro|GPIO_BSRR_BS_7
DECL|GPIO_BSRR_BS_8|macro|GPIO_BSRR_BS_8
DECL|GPIO_BSRR_BS_9|macro|GPIO_BSRR_BS_9
DECL|GPIO_IDR_IDR_0|macro|GPIO_IDR_IDR_0
DECL|GPIO_IDR_IDR_10|macro|GPIO_IDR_IDR_10
DECL|GPIO_IDR_IDR_11|macro|GPIO_IDR_IDR_11
DECL|GPIO_IDR_IDR_12|macro|GPIO_IDR_IDR_12
DECL|GPIO_IDR_IDR_13|macro|GPIO_IDR_IDR_13
DECL|GPIO_IDR_IDR_14|macro|GPIO_IDR_IDR_14
DECL|GPIO_IDR_IDR_15|macro|GPIO_IDR_IDR_15
DECL|GPIO_IDR_IDR_1|macro|GPIO_IDR_IDR_1
DECL|GPIO_IDR_IDR_2|macro|GPIO_IDR_IDR_2
DECL|GPIO_IDR_IDR_3|macro|GPIO_IDR_IDR_3
DECL|GPIO_IDR_IDR_4|macro|GPIO_IDR_IDR_4
DECL|GPIO_IDR_IDR_5|macro|GPIO_IDR_IDR_5
DECL|GPIO_IDR_IDR_6|macro|GPIO_IDR_IDR_6
DECL|GPIO_IDR_IDR_7|macro|GPIO_IDR_IDR_7
DECL|GPIO_IDR_IDR_8|macro|GPIO_IDR_IDR_8
DECL|GPIO_IDR_IDR_9|macro|GPIO_IDR_IDR_9
DECL|GPIO_LCKR_LCK0_Msk|macro|GPIO_LCKR_LCK0_Msk
DECL|GPIO_LCKR_LCK0_Pos|macro|GPIO_LCKR_LCK0_Pos
DECL|GPIO_LCKR_LCK0|macro|GPIO_LCKR_LCK0
DECL|GPIO_LCKR_LCK10_Msk|macro|GPIO_LCKR_LCK10_Msk
DECL|GPIO_LCKR_LCK10_Pos|macro|GPIO_LCKR_LCK10_Pos
DECL|GPIO_LCKR_LCK10|macro|GPIO_LCKR_LCK10
DECL|GPIO_LCKR_LCK11_Msk|macro|GPIO_LCKR_LCK11_Msk
DECL|GPIO_LCKR_LCK11_Pos|macro|GPIO_LCKR_LCK11_Pos
DECL|GPIO_LCKR_LCK11|macro|GPIO_LCKR_LCK11
DECL|GPIO_LCKR_LCK12_Msk|macro|GPIO_LCKR_LCK12_Msk
DECL|GPIO_LCKR_LCK12_Pos|macro|GPIO_LCKR_LCK12_Pos
DECL|GPIO_LCKR_LCK12|macro|GPIO_LCKR_LCK12
DECL|GPIO_LCKR_LCK13_Msk|macro|GPIO_LCKR_LCK13_Msk
DECL|GPIO_LCKR_LCK13_Pos|macro|GPIO_LCKR_LCK13_Pos
DECL|GPIO_LCKR_LCK13|macro|GPIO_LCKR_LCK13
DECL|GPIO_LCKR_LCK14_Msk|macro|GPIO_LCKR_LCK14_Msk
DECL|GPIO_LCKR_LCK14_Pos|macro|GPIO_LCKR_LCK14_Pos
DECL|GPIO_LCKR_LCK14|macro|GPIO_LCKR_LCK14
DECL|GPIO_LCKR_LCK15_Msk|macro|GPIO_LCKR_LCK15_Msk
DECL|GPIO_LCKR_LCK15_Pos|macro|GPIO_LCKR_LCK15_Pos
DECL|GPIO_LCKR_LCK15|macro|GPIO_LCKR_LCK15
DECL|GPIO_LCKR_LCK1_Msk|macro|GPIO_LCKR_LCK1_Msk
DECL|GPIO_LCKR_LCK1_Pos|macro|GPIO_LCKR_LCK1_Pos
DECL|GPIO_LCKR_LCK1|macro|GPIO_LCKR_LCK1
DECL|GPIO_LCKR_LCK2_Msk|macro|GPIO_LCKR_LCK2_Msk
DECL|GPIO_LCKR_LCK2_Pos|macro|GPIO_LCKR_LCK2_Pos
DECL|GPIO_LCKR_LCK2|macro|GPIO_LCKR_LCK2
DECL|GPIO_LCKR_LCK3_Msk|macro|GPIO_LCKR_LCK3_Msk
DECL|GPIO_LCKR_LCK3_Pos|macro|GPIO_LCKR_LCK3_Pos
DECL|GPIO_LCKR_LCK3|macro|GPIO_LCKR_LCK3
DECL|GPIO_LCKR_LCK4_Msk|macro|GPIO_LCKR_LCK4_Msk
DECL|GPIO_LCKR_LCK4_Pos|macro|GPIO_LCKR_LCK4_Pos
DECL|GPIO_LCKR_LCK4|macro|GPIO_LCKR_LCK4
DECL|GPIO_LCKR_LCK5_Msk|macro|GPIO_LCKR_LCK5_Msk
DECL|GPIO_LCKR_LCK5_Pos|macro|GPIO_LCKR_LCK5_Pos
DECL|GPIO_LCKR_LCK5|macro|GPIO_LCKR_LCK5
DECL|GPIO_LCKR_LCK6_Msk|macro|GPIO_LCKR_LCK6_Msk
DECL|GPIO_LCKR_LCK6_Pos|macro|GPIO_LCKR_LCK6_Pos
DECL|GPIO_LCKR_LCK6|macro|GPIO_LCKR_LCK6
DECL|GPIO_LCKR_LCK7_Msk|macro|GPIO_LCKR_LCK7_Msk
DECL|GPIO_LCKR_LCK7_Pos|macro|GPIO_LCKR_LCK7_Pos
DECL|GPIO_LCKR_LCK7|macro|GPIO_LCKR_LCK7
DECL|GPIO_LCKR_LCK8_Msk|macro|GPIO_LCKR_LCK8_Msk
DECL|GPIO_LCKR_LCK8_Pos|macro|GPIO_LCKR_LCK8_Pos
DECL|GPIO_LCKR_LCK8|macro|GPIO_LCKR_LCK8
DECL|GPIO_LCKR_LCK9_Msk|macro|GPIO_LCKR_LCK9_Msk
DECL|GPIO_LCKR_LCK9_Pos|macro|GPIO_LCKR_LCK9_Pos
DECL|GPIO_LCKR_LCK9|macro|GPIO_LCKR_LCK9
DECL|GPIO_LCKR_LCKK_Msk|macro|GPIO_LCKR_LCKK_Msk
DECL|GPIO_LCKR_LCKK_Pos|macro|GPIO_LCKR_LCKK_Pos
DECL|GPIO_LCKR_LCKK|macro|GPIO_LCKR_LCKK
DECL|GPIO_MODER_MODER0_0|macro|GPIO_MODER_MODER0_0
DECL|GPIO_MODER_MODER0_1|macro|GPIO_MODER_MODER0_1
DECL|GPIO_MODER_MODER0_Msk|macro|GPIO_MODER_MODER0_Msk
DECL|GPIO_MODER_MODER0_Pos|macro|GPIO_MODER_MODER0_Pos
DECL|GPIO_MODER_MODER0|macro|GPIO_MODER_MODER0
DECL|GPIO_MODER_MODER10_0|macro|GPIO_MODER_MODER10_0
DECL|GPIO_MODER_MODER10_1|macro|GPIO_MODER_MODER10_1
DECL|GPIO_MODER_MODER10_Msk|macro|GPIO_MODER_MODER10_Msk
DECL|GPIO_MODER_MODER10_Pos|macro|GPIO_MODER_MODER10_Pos
DECL|GPIO_MODER_MODER10|macro|GPIO_MODER_MODER10
DECL|GPIO_MODER_MODER11_0|macro|GPIO_MODER_MODER11_0
DECL|GPIO_MODER_MODER11_1|macro|GPIO_MODER_MODER11_1
DECL|GPIO_MODER_MODER11_Msk|macro|GPIO_MODER_MODER11_Msk
DECL|GPIO_MODER_MODER11_Pos|macro|GPIO_MODER_MODER11_Pos
DECL|GPIO_MODER_MODER11|macro|GPIO_MODER_MODER11
DECL|GPIO_MODER_MODER12_0|macro|GPIO_MODER_MODER12_0
DECL|GPIO_MODER_MODER12_1|macro|GPIO_MODER_MODER12_1
DECL|GPIO_MODER_MODER12_Msk|macro|GPIO_MODER_MODER12_Msk
DECL|GPIO_MODER_MODER12_Pos|macro|GPIO_MODER_MODER12_Pos
DECL|GPIO_MODER_MODER12|macro|GPIO_MODER_MODER12
DECL|GPIO_MODER_MODER13_0|macro|GPIO_MODER_MODER13_0
DECL|GPIO_MODER_MODER13_1|macro|GPIO_MODER_MODER13_1
DECL|GPIO_MODER_MODER13_Msk|macro|GPIO_MODER_MODER13_Msk
DECL|GPIO_MODER_MODER13_Pos|macro|GPIO_MODER_MODER13_Pos
DECL|GPIO_MODER_MODER13|macro|GPIO_MODER_MODER13
DECL|GPIO_MODER_MODER14_0|macro|GPIO_MODER_MODER14_0
DECL|GPIO_MODER_MODER14_1|macro|GPIO_MODER_MODER14_1
DECL|GPIO_MODER_MODER14_Msk|macro|GPIO_MODER_MODER14_Msk
DECL|GPIO_MODER_MODER14_Pos|macro|GPIO_MODER_MODER14_Pos
DECL|GPIO_MODER_MODER14|macro|GPIO_MODER_MODER14
DECL|GPIO_MODER_MODER15_0|macro|GPIO_MODER_MODER15_0
DECL|GPIO_MODER_MODER15_1|macro|GPIO_MODER_MODER15_1
DECL|GPIO_MODER_MODER15_Msk|macro|GPIO_MODER_MODER15_Msk
DECL|GPIO_MODER_MODER15_Pos|macro|GPIO_MODER_MODER15_Pos
DECL|GPIO_MODER_MODER15|macro|GPIO_MODER_MODER15
DECL|GPIO_MODER_MODER1_0|macro|GPIO_MODER_MODER1_0
DECL|GPIO_MODER_MODER1_1|macro|GPIO_MODER_MODER1_1
DECL|GPIO_MODER_MODER1_Msk|macro|GPIO_MODER_MODER1_Msk
DECL|GPIO_MODER_MODER1_Pos|macro|GPIO_MODER_MODER1_Pos
DECL|GPIO_MODER_MODER1|macro|GPIO_MODER_MODER1
DECL|GPIO_MODER_MODER2_0|macro|GPIO_MODER_MODER2_0
DECL|GPIO_MODER_MODER2_1|macro|GPIO_MODER_MODER2_1
DECL|GPIO_MODER_MODER2_Msk|macro|GPIO_MODER_MODER2_Msk
DECL|GPIO_MODER_MODER2_Pos|macro|GPIO_MODER_MODER2_Pos
DECL|GPIO_MODER_MODER2|macro|GPIO_MODER_MODER2
DECL|GPIO_MODER_MODER3_0|macro|GPIO_MODER_MODER3_0
DECL|GPIO_MODER_MODER3_1|macro|GPIO_MODER_MODER3_1
DECL|GPIO_MODER_MODER3_Msk|macro|GPIO_MODER_MODER3_Msk
DECL|GPIO_MODER_MODER3_Pos|macro|GPIO_MODER_MODER3_Pos
DECL|GPIO_MODER_MODER3|macro|GPIO_MODER_MODER3
DECL|GPIO_MODER_MODER4_0|macro|GPIO_MODER_MODER4_0
DECL|GPIO_MODER_MODER4_1|macro|GPIO_MODER_MODER4_1
DECL|GPIO_MODER_MODER4_Msk|macro|GPIO_MODER_MODER4_Msk
DECL|GPIO_MODER_MODER4_Pos|macro|GPIO_MODER_MODER4_Pos
DECL|GPIO_MODER_MODER4|macro|GPIO_MODER_MODER4
DECL|GPIO_MODER_MODER5_0|macro|GPIO_MODER_MODER5_0
DECL|GPIO_MODER_MODER5_1|macro|GPIO_MODER_MODER5_1
DECL|GPIO_MODER_MODER5_Msk|macro|GPIO_MODER_MODER5_Msk
DECL|GPIO_MODER_MODER5_Pos|macro|GPIO_MODER_MODER5_Pos
DECL|GPIO_MODER_MODER5|macro|GPIO_MODER_MODER5
DECL|GPIO_MODER_MODER6_0|macro|GPIO_MODER_MODER6_0
DECL|GPIO_MODER_MODER6_1|macro|GPIO_MODER_MODER6_1
DECL|GPIO_MODER_MODER6_Msk|macro|GPIO_MODER_MODER6_Msk
DECL|GPIO_MODER_MODER6_Pos|macro|GPIO_MODER_MODER6_Pos
DECL|GPIO_MODER_MODER6|macro|GPIO_MODER_MODER6
DECL|GPIO_MODER_MODER7_0|macro|GPIO_MODER_MODER7_0
DECL|GPIO_MODER_MODER7_1|macro|GPIO_MODER_MODER7_1
DECL|GPIO_MODER_MODER7_Msk|macro|GPIO_MODER_MODER7_Msk
DECL|GPIO_MODER_MODER7_Pos|macro|GPIO_MODER_MODER7_Pos
DECL|GPIO_MODER_MODER7|macro|GPIO_MODER_MODER7
DECL|GPIO_MODER_MODER8_0|macro|GPIO_MODER_MODER8_0
DECL|GPIO_MODER_MODER8_1|macro|GPIO_MODER_MODER8_1
DECL|GPIO_MODER_MODER8_Msk|macro|GPIO_MODER_MODER8_Msk
DECL|GPIO_MODER_MODER8_Pos|macro|GPIO_MODER_MODER8_Pos
DECL|GPIO_MODER_MODER8|macro|GPIO_MODER_MODER8
DECL|GPIO_MODER_MODER9_0|macro|GPIO_MODER_MODER9_0
DECL|GPIO_MODER_MODER9_1|macro|GPIO_MODER_MODER9_1
DECL|GPIO_MODER_MODER9_Msk|macro|GPIO_MODER_MODER9_Msk
DECL|GPIO_MODER_MODER9_Pos|macro|GPIO_MODER_MODER9_Pos
DECL|GPIO_MODER_MODER9|macro|GPIO_MODER_MODER9
DECL|GPIO_ODR_ODR_0|macro|GPIO_ODR_ODR_0
DECL|GPIO_ODR_ODR_10|macro|GPIO_ODR_ODR_10
DECL|GPIO_ODR_ODR_11|macro|GPIO_ODR_ODR_11
DECL|GPIO_ODR_ODR_12|macro|GPIO_ODR_ODR_12
DECL|GPIO_ODR_ODR_13|macro|GPIO_ODR_ODR_13
DECL|GPIO_ODR_ODR_14|macro|GPIO_ODR_ODR_14
DECL|GPIO_ODR_ODR_15|macro|GPIO_ODR_ODR_15
DECL|GPIO_ODR_ODR_1|macro|GPIO_ODR_ODR_1
DECL|GPIO_ODR_ODR_2|macro|GPIO_ODR_ODR_2
DECL|GPIO_ODR_ODR_3|macro|GPIO_ODR_ODR_3
DECL|GPIO_ODR_ODR_4|macro|GPIO_ODR_ODR_4
DECL|GPIO_ODR_ODR_5|macro|GPIO_ODR_ODR_5
DECL|GPIO_ODR_ODR_6|macro|GPIO_ODR_ODR_6
DECL|GPIO_ODR_ODR_7|macro|GPIO_ODR_ODR_7
DECL|GPIO_ODR_ODR_8|macro|GPIO_ODR_ODR_8
DECL|GPIO_ODR_ODR_9|macro|GPIO_ODR_ODR_9
DECL|GPIO_OSPEEDER_OSPEEDR0_0|macro|GPIO_OSPEEDER_OSPEEDR0_0
DECL|GPIO_OSPEEDER_OSPEEDR0_1|macro|GPIO_OSPEEDER_OSPEEDR0_1
DECL|GPIO_OSPEEDER_OSPEEDR0_Msk|macro|GPIO_OSPEEDER_OSPEEDR0_Msk
DECL|GPIO_OSPEEDER_OSPEEDR0_Pos|macro|GPIO_OSPEEDER_OSPEEDR0_Pos
DECL|GPIO_OSPEEDER_OSPEEDR0|macro|GPIO_OSPEEDER_OSPEEDR0
DECL|GPIO_OSPEEDER_OSPEEDR10_0|macro|GPIO_OSPEEDER_OSPEEDR10_0
DECL|GPIO_OSPEEDER_OSPEEDR10_1|macro|GPIO_OSPEEDER_OSPEEDR10_1
DECL|GPIO_OSPEEDER_OSPEEDR10_Msk|macro|GPIO_OSPEEDER_OSPEEDR10_Msk
DECL|GPIO_OSPEEDER_OSPEEDR10_Pos|macro|GPIO_OSPEEDER_OSPEEDR10_Pos
DECL|GPIO_OSPEEDER_OSPEEDR10|macro|GPIO_OSPEEDER_OSPEEDR10
DECL|GPIO_OSPEEDER_OSPEEDR11_0|macro|GPIO_OSPEEDER_OSPEEDR11_0
DECL|GPIO_OSPEEDER_OSPEEDR11_1|macro|GPIO_OSPEEDER_OSPEEDR11_1
DECL|GPIO_OSPEEDER_OSPEEDR11_Msk|macro|GPIO_OSPEEDER_OSPEEDR11_Msk
DECL|GPIO_OSPEEDER_OSPEEDR11_Pos|macro|GPIO_OSPEEDER_OSPEEDR11_Pos
DECL|GPIO_OSPEEDER_OSPEEDR11|macro|GPIO_OSPEEDER_OSPEEDR11
DECL|GPIO_OSPEEDER_OSPEEDR12_0|macro|GPIO_OSPEEDER_OSPEEDR12_0
DECL|GPIO_OSPEEDER_OSPEEDR12_1|macro|GPIO_OSPEEDER_OSPEEDR12_1
DECL|GPIO_OSPEEDER_OSPEEDR12_Msk|macro|GPIO_OSPEEDER_OSPEEDR12_Msk
DECL|GPIO_OSPEEDER_OSPEEDR12_Pos|macro|GPIO_OSPEEDER_OSPEEDR12_Pos
DECL|GPIO_OSPEEDER_OSPEEDR12|macro|GPIO_OSPEEDER_OSPEEDR12
DECL|GPIO_OSPEEDER_OSPEEDR13_0|macro|GPIO_OSPEEDER_OSPEEDR13_0
DECL|GPIO_OSPEEDER_OSPEEDR13_1|macro|GPIO_OSPEEDER_OSPEEDR13_1
DECL|GPIO_OSPEEDER_OSPEEDR13_Msk|macro|GPIO_OSPEEDER_OSPEEDR13_Msk
DECL|GPIO_OSPEEDER_OSPEEDR13_Pos|macro|GPIO_OSPEEDER_OSPEEDR13_Pos
DECL|GPIO_OSPEEDER_OSPEEDR13|macro|GPIO_OSPEEDER_OSPEEDR13
DECL|GPIO_OSPEEDER_OSPEEDR14_0|macro|GPIO_OSPEEDER_OSPEEDR14_0
DECL|GPIO_OSPEEDER_OSPEEDR14_1|macro|GPIO_OSPEEDER_OSPEEDR14_1
DECL|GPIO_OSPEEDER_OSPEEDR14_Msk|macro|GPIO_OSPEEDER_OSPEEDR14_Msk
DECL|GPIO_OSPEEDER_OSPEEDR14_Pos|macro|GPIO_OSPEEDER_OSPEEDR14_Pos
DECL|GPIO_OSPEEDER_OSPEEDR14|macro|GPIO_OSPEEDER_OSPEEDR14
DECL|GPIO_OSPEEDER_OSPEEDR15_0|macro|GPIO_OSPEEDER_OSPEEDR15_0
DECL|GPIO_OSPEEDER_OSPEEDR15_1|macro|GPIO_OSPEEDER_OSPEEDR15_1
DECL|GPIO_OSPEEDER_OSPEEDR15_Msk|macro|GPIO_OSPEEDER_OSPEEDR15_Msk
DECL|GPIO_OSPEEDER_OSPEEDR15_Pos|macro|GPIO_OSPEEDER_OSPEEDR15_Pos
DECL|GPIO_OSPEEDER_OSPEEDR15|macro|GPIO_OSPEEDER_OSPEEDR15
DECL|GPIO_OSPEEDER_OSPEEDR1_0|macro|GPIO_OSPEEDER_OSPEEDR1_0
DECL|GPIO_OSPEEDER_OSPEEDR1_1|macro|GPIO_OSPEEDER_OSPEEDR1_1
DECL|GPIO_OSPEEDER_OSPEEDR1_Msk|macro|GPIO_OSPEEDER_OSPEEDR1_Msk
DECL|GPIO_OSPEEDER_OSPEEDR1_Pos|macro|GPIO_OSPEEDER_OSPEEDR1_Pos
DECL|GPIO_OSPEEDER_OSPEEDR1|macro|GPIO_OSPEEDER_OSPEEDR1
DECL|GPIO_OSPEEDER_OSPEEDR2_0|macro|GPIO_OSPEEDER_OSPEEDR2_0
DECL|GPIO_OSPEEDER_OSPEEDR2_1|macro|GPIO_OSPEEDER_OSPEEDR2_1
DECL|GPIO_OSPEEDER_OSPEEDR2_Msk|macro|GPIO_OSPEEDER_OSPEEDR2_Msk
DECL|GPIO_OSPEEDER_OSPEEDR2_Pos|macro|GPIO_OSPEEDER_OSPEEDR2_Pos
DECL|GPIO_OSPEEDER_OSPEEDR2|macro|GPIO_OSPEEDER_OSPEEDR2
DECL|GPIO_OSPEEDER_OSPEEDR3_0|macro|GPIO_OSPEEDER_OSPEEDR3_0
DECL|GPIO_OSPEEDER_OSPEEDR3_1|macro|GPIO_OSPEEDER_OSPEEDR3_1
DECL|GPIO_OSPEEDER_OSPEEDR3_Msk|macro|GPIO_OSPEEDER_OSPEEDR3_Msk
DECL|GPIO_OSPEEDER_OSPEEDR3_Pos|macro|GPIO_OSPEEDER_OSPEEDR3_Pos
DECL|GPIO_OSPEEDER_OSPEEDR3|macro|GPIO_OSPEEDER_OSPEEDR3
DECL|GPIO_OSPEEDER_OSPEEDR4_0|macro|GPIO_OSPEEDER_OSPEEDR4_0
DECL|GPIO_OSPEEDER_OSPEEDR4_1|macro|GPIO_OSPEEDER_OSPEEDR4_1
DECL|GPIO_OSPEEDER_OSPEEDR4_Msk|macro|GPIO_OSPEEDER_OSPEEDR4_Msk
DECL|GPIO_OSPEEDER_OSPEEDR4_Pos|macro|GPIO_OSPEEDER_OSPEEDR4_Pos
DECL|GPIO_OSPEEDER_OSPEEDR4|macro|GPIO_OSPEEDER_OSPEEDR4
DECL|GPIO_OSPEEDER_OSPEEDR5_0|macro|GPIO_OSPEEDER_OSPEEDR5_0
DECL|GPIO_OSPEEDER_OSPEEDR5_1|macro|GPIO_OSPEEDER_OSPEEDR5_1
DECL|GPIO_OSPEEDER_OSPEEDR5_Msk|macro|GPIO_OSPEEDER_OSPEEDR5_Msk
DECL|GPIO_OSPEEDER_OSPEEDR5_Pos|macro|GPIO_OSPEEDER_OSPEEDR5_Pos
DECL|GPIO_OSPEEDER_OSPEEDR5|macro|GPIO_OSPEEDER_OSPEEDR5
DECL|GPIO_OSPEEDER_OSPEEDR6_0|macro|GPIO_OSPEEDER_OSPEEDR6_0
DECL|GPIO_OSPEEDER_OSPEEDR6_1|macro|GPIO_OSPEEDER_OSPEEDR6_1
DECL|GPIO_OSPEEDER_OSPEEDR6_Msk|macro|GPIO_OSPEEDER_OSPEEDR6_Msk
DECL|GPIO_OSPEEDER_OSPEEDR6_Pos|macro|GPIO_OSPEEDER_OSPEEDR6_Pos
DECL|GPIO_OSPEEDER_OSPEEDR6|macro|GPIO_OSPEEDER_OSPEEDR6
DECL|GPIO_OSPEEDER_OSPEEDR7_0|macro|GPIO_OSPEEDER_OSPEEDR7_0
DECL|GPIO_OSPEEDER_OSPEEDR7_1|macro|GPIO_OSPEEDER_OSPEEDR7_1
DECL|GPIO_OSPEEDER_OSPEEDR7_Msk|macro|GPIO_OSPEEDER_OSPEEDR7_Msk
DECL|GPIO_OSPEEDER_OSPEEDR7_Pos|macro|GPIO_OSPEEDER_OSPEEDR7_Pos
DECL|GPIO_OSPEEDER_OSPEEDR7|macro|GPIO_OSPEEDER_OSPEEDR7
DECL|GPIO_OSPEEDER_OSPEEDR8_0|macro|GPIO_OSPEEDER_OSPEEDR8_0
DECL|GPIO_OSPEEDER_OSPEEDR8_1|macro|GPIO_OSPEEDER_OSPEEDR8_1
DECL|GPIO_OSPEEDER_OSPEEDR8_Msk|macro|GPIO_OSPEEDER_OSPEEDR8_Msk
DECL|GPIO_OSPEEDER_OSPEEDR8_Pos|macro|GPIO_OSPEEDER_OSPEEDR8_Pos
DECL|GPIO_OSPEEDER_OSPEEDR8|macro|GPIO_OSPEEDER_OSPEEDR8
DECL|GPIO_OSPEEDER_OSPEEDR9_0|macro|GPIO_OSPEEDER_OSPEEDR9_0
DECL|GPIO_OSPEEDER_OSPEEDR9_1|macro|GPIO_OSPEEDER_OSPEEDR9_1
DECL|GPIO_OSPEEDER_OSPEEDR9_Msk|macro|GPIO_OSPEEDER_OSPEEDR9_Msk
DECL|GPIO_OSPEEDER_OSPEEDR9_Pos|macro|GPIO_OSPEEDER_OSPEEDR9_Pos
DECL|GPIO_OSPEEDER_OSPEEDR9|macro|GPIO_OSPEEDER_OSPEEDR9
DECL|GPIO_OTYPER_OT_0|macro|GPIO_OTYPER_OT_0
DECL|GPIO_OTYPER_OT_10|macro|GPIO_OTYPER_OT_10
DECL|GPIO_OTYPER_OT_11|macro|GPIO_OTYPER_OT_11
DECL|GPIO_OTYPER_OT_12|macro|GPIO_OTYPER_OT_12
DECL|GPIO_OTYPER_OT_13|macro|GPIO_OTYPER_OT_13
DECL|GPIO_OTYPER_OT_14|macro|GPIO_OTYPER_OT_14
DECL|GPIO_OTYPER_OT_15|macro|GPIO_OTYPER_OT_15
DECL|GPIO_OTYPER_OT_1|macro|GPIO_OTYPER_OT_1
DECL|GPIO_OTYPER_OT_2|macro|GPIO_OTYPER_OT_2
DECL|GPIO_OTYPER_OT_3|macro|GPIO_OTYPER_OT_3
DECL|GPIO_OTYPER_OT_4|macro|GPIO_OTYPER_OT_4
DECL|GPIO_OTYPER_OT_5|macro|GPIO_OTYPER_OT_5
DECL|GPIO_OTYPER_OT_6|macro|GPIO_OTYPER_OT_6
DECL|GPIO_OTYPER_OT_7|macro|GPIO_OTYPER_OT_7
DECL|GPIO_OTYPER_OT_8|macro|GPIO_OTYPER_OT_8
DECL|GPIO_OTYPER_OT_9|macro|GPIO_OTYPER_OT_9
DECL|GPIO_PUPDR_PUPDR0_0|macro|GPIO_PUPDR_PUPDR0_0
DECL|GPIO_PUPDR_PUPDR0_1|macro|GPIO_PUPDR_PUPDR0_1
DECL|GPIO_PUPDR_PUPDR0_Msk|macro|GPIO_PUPDR_PUPDR0_Msk
DECL|GPIO_PUPDR_PUPDR0_Pos|macro|GPIO_PUPDR_PUPDR0_Pos
DECL|GPIO_PUPDR_PUPDR0|macro|GPIO_PUPDR_PUPDR0
DECL|GPIO_PUPDR_PUPDR10_0|macro|GPIO_PUPDR_PUPDR10_0
DECL|GPIO_PUPDR_PUPDR10_1|macro|GPIO_PUPDR_PUPDR10_1
DECL|GPIO_PUPDR_PUPDR10_Msk|macro|GPIO_PUPDR_PUPDR10_Msk
DECL|GPIO_PUPDR_PUPDR10_Pos|macro|GPIO_PUPDR_PUPDR10_Pos
DECL|GPIO_PUPDR_PUPDR10|macro|GPIO_PUPDR_PUPDR10
DECL|GPIO_PUPDR_PUPDR11_0|macro|GPIO_PUPDR_PUPDR11_0
DECL|GPIO_PUPDR_PUPDR11_1|macro|GPIO_PUPDR_PUPDR11_1
DECL|GPIO_PUPDR_PUPDR11_Msk|macro|GPIO_PUPDR_PUPDR11_Msk
DECL|GPIO_PUPDR_PUPDR11_Pos|macro|GPIO_PUPDR_PUPDR11_Pos
DECL|GPIO_PUPDR_PUPDR11|macro|GPIO_PUPDR_PUPDR11
DECL|GPIO_PUPDR_PUPDR12_0|macro|GPIO_PUPDR_PUPDR12_0
DECL|GPIO_PUPDR_PUPDR12_1|macro|GPIO_PUPDR_PUPDR12_1
DECL|GPIO_PUPDR_PUPDR12_Msk|macro|GPIO_PUPDR_PUPDR12_Msk
DECL|GPIO_PUPDR_PUPDR12_Pos|macro|GPIO_PUPDR_PUPDR12_Pos
DECL|GPIO_PUPDR_PUPDR12|macro|GPIO_PUPDR_PUPDR12
DECL|GPIO_PUPDR_PUPDR13_0|macro|GPIO_PUPDR_PUPDR13_0
DECL|GPIO_PUPDR_PUPDR13_1|macro|GPIO_PUPDR_PUPDR13_1
DECL|GPIO_PUPDR_PUPDR13_Msk|macro|GPIO_PUPDR_PUPDR13_Msk
DECL|GPIO_PUPDR_PUPDR13_Pos|macro|GPIO_PUPDR_PUPDR13_Pos
DECL|GPIO_PUPDR_PUPDR13|macro|GPIO_PUPDR_PUPDR13
DECL|GPIO_PUPDR_PUPDR14_0|macro|GPIO_PUPDR_PUPDR14_0
DECL|GPIO_PUPDR_PUPDR14_1|macro|GPIO_PUPDR_PUPDR14_1
DECL|GPIO_PUPDR_PUPDR14_Msk|macro|GPIO_PUPDR_PUPDR14_Msk
DECL|GPIO_PUPDR_PUPDR14_Pos|macro|GPIO_PUPDR_PUPDR14_Pos
DECL|GPIO_PUPDR_PUPDR14|macro|GPIO_PUPDR_PUPDR14
DECL|GPIO_PUPDR_PUPDR15_0|macro|GPIO_PUPDR_PUPDR15_0
DECL|GPIO_PUPDR_PUPDR15_1|macro|GPIO_PUPDR_PUPDR15_1
DECL|GPIO_PUPDR_PUPDR15_Msk|macro|GPIO_PUPDR_PUPDR15_Msk
DECL|GPIO_PUPDR_PUPDR15_Pos|macro|GPIO_PUPDR_PUPDR15_Pos
DECL|GPIO_PUPDR_PUPDR15|macro|GPIO_PUPDR_PUPDR15
DECL|GPIO_PUPDR_PUPDR1_0|macro|GPIO_PUPDR_PUPDR1_0
DECL|GPIO_PUPDR_PUPDR1_1|macro|GPIO_PUPDR_PUPDR1_1
DECL|GPIO_PUPDR_PUPDR1_Msk|macro|GPIO_PUPDR_PUPDR1_Msk
DECL|GPIO_PUPDR_PUPDR1_Pos|macro|GPIO_PUPDR_PUPDR1_Pos
DECL|GPIO_PUPDR_PUPDR1|macro|GPIO_PUPDR_PUPDR1
DECL|GPIO_PUPDR_PUPDR2_0|macro|GPIO_PUPDR_PUPDR2_0
DECL|GPIO_PUPDR_PUPDR2_1|macro|GPIO_PUPDR_PUPDR2_1
DECL|GPIO_PUPDR_PUPDR2_Msk|macro|GPIO_PUPDR_PUPDR2_Msk
DECL|GPIO_PUPDR_PUPDR2_Pos|macro|GPIO_PUPDR_PUPDR2_Pos
DECL|GPIO_PUPDR_PUPDR2|macro|GPIO_PUPDR_PUPDR2
DECL|GPIO_PUPDR_PUPDR3_0|macro|GPIO_PUPDR_PUPDR3_0
DECL|GPIO_PUPDR_PUPDR3_1|macro|GPIO_PUPDR_PUPDR3_1
DECL|GPIO_PUPDR_PUPDR3_Msk|macro|GPIO_PUPDR_PUPDR3_Msk
DECL|GPIO_PUPDR_PUPDR3_Pos|macro|GPIO_PUPDR_PUPDR3_Pos
DECL|GPIO_PUPDR_PUPDR3|macro|GPIO_PUPDR_PUPDR3
DECL|GPIO_PUPDR_PUPDR4_0|macro|GPIO_PUPDR_PUPDR4_0
DECL|GPIO_PUPDR_PUPDR4_1|macro|GPIO_PUPDR_PUPDR4_1
DECL|GPIO_PUPDR_PUPDR4_Msk|macro|GPIO_PUPDR_PUPDR4_Msk
DECL|GPIO_PUPDR_PUPDR4_Pos|macro|GPIO_PUPDR_PUPDR4_Pos
DECL|GPIO_PUPDR_PUPDR4|macro|GPIO_PUPDR_PUPDR4
DECL|GPIO_PUPDR_PUPDR5_0|macro|GPIO_PUPDR_PUPDR5_0
DECL|GPIO_PUPDR_PUPDR5_1|macro|GPIO_PUPDR_PUPDR5_1
DECL|GPIO_PUPDR_PUPDR5_Msk|macro|GPIO_PUPDR_PUPDR5_Msk
DECL|GPIO_PUPDR_PUPDR5_Pos|macro|GPIO_PUPDR_PUPDR5_Pos
DECL|GPIO_PUPDR_PUPDR5|macro|GPIO_PUPDR_PUPDR5
DECL|GPIO_PUPDR_PUPDR6_0|macro|GPIO_PUPDR_PUPDR6_0
DECL|GPIO_PUPDR_PUPDR6_1|macro|GPIO_PUPDR_PUPDR6_1
DECL|GPIO_PUPDR_PUPDR6_Msk|macro|GPIO_PUPDR_PUPDR6_Msk
DECL|GPIO_PUPDR_PUPDR6_Pos|macro|GPIO_PUPDR_PUPDR6_Pos
DECL|GPIO_PUPDR_PUPDR6|macro|GPIO_PUPDR_PUPDR6
DECL|GPIO_PUPDR_PUPDR7_0|macro|GPIO_PUPDR_PUPDR7_0
DECL|GPIO_PUPDR_PUPDR7_1|macro|GPIO_PUPDR_PUPDR7_1
DECL|GPIO_PUPDR_PUPDR7_Msk|macro|GPIO_PUPDR_PUPDR7_Msk
DECL|GPIO_PUPDR_PUPDR7_Pos|macro|GPIO_PUPDR_PUPDR7_Pos
DECL|GPIO_PUPDR_PUPDR7|macro|GPIO_PUPDR_PUPDR7
DECL|GPIO_PUPDR_PUPDR8_0|macro|GPIO_PUPDR_PUPDR8_0
DECL|GPIO_PUPDR_PUPDR8_1|macro|GPIO_PUPDR_PUPDR8_1
DECL|GPIO_PUPDR_PUPDR8_Msk|macro|GPIO_PUPDR_PUPDR8_Msk
DECL|GPIO_PUPDR_PUPDR8_Pos|macro|GPIO_PUPDR_PUPDR8_Pos
DECL|GPIO_PUPDR_PUPDR8|macro|GPIO_PUPDR_PUPDR8
DECL|GPIO_PUPDR_PUPDR9_0|macro|GPIO_PUPDR_PUPDR9_0
DECL|GPIO_PUPDR_PUPDR9_1|macro|GPIO_PUPDR_PUPDR9_1
DECL|GPIO_PUPDR_PUPDR9_Msk|macro|GPIO_PUPDR_PUPDR9_Msk
DECL|GPIO_PUPDR_PUPDR9_Pos|macro|GPIO_PUPDR_PUPDR9_Pos
DECL|GPIO_PUPDR_PUPDR9|macro|GPIO_PUPDR_PUPDR9
DECL|GPIO_TypeDef|typedef|} GPIO_TypeDef;
DECL|GPWRDN|member|__IO uint32_t GPWRDN; /*!< Power Down Register 058h */
DECL|GRSTCTL|member|__IO uint32_t GRSTCTL; /*!< Core Reset Register 010h */
DECL|GRXFSIZ|member|__IO uint32_t GRXFSIZ; /*!< Receive FIFO Size Register 024h */
DECL|GRXSTSP|member|__IO uint32_t GRXSTSP; /*!< Receive Sts Q Read & POP Register 020h */
DECL|GRXSTSR|member|__IO uint32_t GRXSTSR; /*!< Receive Sts Q Read Register 01Ch */
DECL|GTPR|member|__IO uint32_t GTPR; /*!< USART Guard time and prescaler register, Address offset: 0x10 */
DECL|GUSBCFG|member|__IO uint32_t GUSBCFG; /*!< Core USB Configuration Register 00Ch */
DECL|HAINTMSK|member|__IO uint32_t HAINTMSK; /*!< Host All Channels Interrupt Mask 418h */
DECL|HAINT|member|__IO uint32_t HAINT; /*!< Host All Channels Interrupt Register 414h */
DECL|HASH_RNG_IRQHandler|macro|HASH_RNG_IRQHandler
DECL|HASH_RNG_IRQn|macro|HASH_RNG_IRQn
DECL|HCCHAR|member|__IO uint32_t HCCHAR; /*!< Host Channel Characteristics Register 500h */
DECL|HCDMA|member|__IO uint32_t HCDMA; /*!< Host Channel DMA Address Register 514h */
DECL|HCFG|member|__IO uint32_t HCFG; /*!< Host Configuration Register 400h */
DECL|HCINTMSK|member|__IO uint32_t HCINTMSK; /*!< Host Channel Interrupt Mask Register 50Ch */
DECL|HCINT|member|__IO uint32_t HCINT; /*!< Host Channel Interrupt Register 508h */
DECL|HCSPLT|member|__IO uint32_t HCSPLT; /*!< Host Channel Split Control Register 504h */
DECL|HCTSIZ|member|__IO uint32_t HCTSIZ; /*!< Host Channel Transfer Size Register 510h */
DECL|HFIR|member|__IO uint32_t HFIR; /*!< Host Frame Interval Register 404h */
DECL|HFNUM|member|__IO uint32_t HFNUM; /*!< Host Frame Nbr/Frame Remaining 408h */
DECL|HIFCR|member|__IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
DECL|HISR|member|__IO uint32_t HISR; /*!< DMA high interrupt status register, Address offset: 0x04 */
DECL|HNPTXSTS|member|__IO uint32_t HNPTXSTS; /*!< Non Periodic Tx FIFO/Queue Sts reg 02Ch */
DECL|HPTXFSIZ|member|__IO uint32_t HPTXFSIZ; /*!< Host Periodic Tx FIFO Size Reg 100h */
DECL|HPTXSTS|member|__IO uint32_t HPTXSTS; /*!< Host Periodic Tx FIFO/ Queue Status 410h */
DECL|HTR|member|__IO uint32_t HTR; /*!< ADC watchdog higher threshold register, Address offset: 0x24 */
DECL|I2C1_BASE|macro|I2C1_BASE
DECL|I2C1_ER_IRQn|enumerator|I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
DECL|I2C1_EV_IRQn|enumerator|I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
DECL|I2C1|macro|I2C1
DECL|I2C2_BASE|macro|I2C2_BASE
DECL|I2C2_ER_IRQn|enumerator|I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
DECL|I2C2_EV_IRQn|enumerator|I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
DECL|I2C2|macro|I2C2
DECL|I2C3_BASE|macro|I2C3_BASE
DECL|I2C3_ER_IRQn|enumerator|I2C3_ER_IRQn = 73, /*!< I2C3 error interrupt */
DECL|I2C3_EV_IRQn|enumerator|I2C3_EV_IRQn = 72, /*!< I2C3 event interrupt */
DECL|I2C3|macro|I2C3
DECL|I2C_CR1_ADDRIE_Msk|macro|I2C_CR1_ADDRIE_Msk
DECL|I2C_CR1_ADDRIE_Pos|macro|I2C_CR1_ADDRIE_Pos
DECL|I2C_CR1_ADDRIE|macro|I2C_CR1_ADDRIE
DECL|I2C_CR1_ALERTEN_Msk|macro|I2C_CR1_ALERTEN_Msk
DECL|I2C_CR1_ALERTEN_Pos|macro|I2C_CR1_ALERTEN_Pos
DECL|I2C_CR1_ALERTEN|macro|I2C_CR1_ALERTEN
DECL|I2C_CR1_ANFOFF_Msk|macro|I2C_CR1_ANFOFF_Msk
DECL|I2C_CR1_ANFOFF_Pos|macro|I2C_CR1_ANFOFF_Pos
DECL|I2C_CR1_ANFOFF|macro|I2C_CR1_ANFOFF
DECL|I2C_CR1_DNF_Msk|macro|I2C_CR1_DNF_Msk
DECL|I2C_CR1_DNF_Pos|macro|I2C_CR1_DNF_Pos
DECL|I2C_CR1_DNF|macro|I2C_CR1_DNF
DECL|I2C_CR1_ERRIE_Msk|macro|I2C_CR1_ERRIE_Msk
DECL|I2C_CR1_ERRIE_Pos|macro|I2C_CR1_ERRIE_Pos
DECL|I2C_CR1_ERRIE|macro|I2C_CR1_ERRIE
DECL|I2C_CR1_GCEN_Msk|macro|I2C_CR1_GCEN_Msk
DECL|I2C_CR1_GCEN_Pos|macro|I2C_CR1_GCEN_Pos
DECL|I2C_CR1_GCEN|macro|I2C_CR1_GCEN
DECL|I2C_CR1_NACKIE_Msk|macro|I2C_CR1_NACKIE_Msk
DECL|I2C_CR1_NACKIE_Pos|macro|I2C_CR1_NACKIE_Pos
DECL|I2C_CR1_NACKIE|macro|I2C_CR1_NACKIE
DECL|I2C_CR1_NOSTRETCH_Msk|macro|I2C_CR1_NOSTRETCH_Msk
DECL|I2C_CR1_NOSTRETCH_Pos|macro|I2C_CR1_NOSTRETCH_Pos
DECL|I2C_CR1_NOSTRETCH|macro|I2C_CR1_NOSTRETCH
DECL|I2C_CR1_PECEN_Msk|macro|I2C_CR1_PECEN_Msk
DECL|I2C_CR1_PECEN_Pos|macro|I2C_CR1_PECEN_Pos
DECL|I2C_CR1_PECEN|macro|I2C_CR1_PECEN
DECL|I2C_CR1_PE_Msk|macro|I2C_CR1_PE_Msk
DECL|I2C_CR1_PE_Pos|macro|I2C_CR1_PE_Pos
DECL|I2C_CR1_PE|macro|I2C_CR1_PE
DECL|I2C_CR1_RXDMAEN_Msk|macro|I2C_CR1_RXDMAEN_Msk
DECL|I2C_CR1_RXDMAEN_Pos|macro|I2C_CR1_RXDMAEN_Pos
DECL|I2C_CR1_RXDMAEN|macro|I2C_CR1_RXDMAEN
DECL|I2C_CR1_RXIE_Msk|macro|I2C_CR1_RXIE_Msk
DECL|I2C_CR1_RXIE_Pos|macro|I2C_CR1_RXIE_Pos
DECL|I2C_CR1_RXIE|macro|I2C_CR1_RXIE
DECL|I2C_CR1_SBC_Msk|macro|I2C_CR1_SBC_Msk
DECL|I2C_CR1_SBC_Pos|macro|I2C_CR1_SBC_Pos
DECL|I2C_CR1_SBC|macro|I2C_CR1_SBC
DECL|I2C_CR1_SMBDEN_Msk|macro|I2C_CR1_SMBDEN_Msk
DECL|I2C_CR1_SMBDEN_Pos|macro|I2C_CR1_SMBDEN_Pos
DECL|I2C_CR1_SMBDEN|macro|I2C_CR1_SMBDEN
DECL|I2C_CR1_SMBHEN_Msk|macro|I2C_CR1_SMBHEN_Msk
DECL|I2C_CR1_SMBHEN_Pos|macro|I2C_CR1_SMBHEN_Pos
DECL|I2C_CR1_SMBHEN|macro|I2C_CR1_SMBHEN
DECL|I2C_CR1_STOPIE_Msk|macro|I2C_CR1_STOPIE_Msk
DECL|I2C_CR1_STOPIE_Pos|macro|I2C_CR1_STOPIE_Pos
DECL|I2C_CR1_STOPIE|macro|I2C_CR1_STOPIE
DECL|I2C_CR1_TCIE_Msk|macro|I2C_CR1_TCIE_Msk
DECL|I2C_CR1_TCIE_Pos|macro|I2C_CR1_TCIE_Pos
DECL|I2C_CR1_TCIE|macro|I2C_CR1_TCIE
DECL|I2C_CR1_TXDMAEN_Msk|macro|I2C_CR1_TXDMAEN_Msk
DECL|I2C_CR1_TXDMAEN_Pos|macro|I2C_CR1_TXDMAEN_Pos
DECL|I2C_CR1_TXDMAEN|macro|I2C_CR1_TXDMAEN
DECL|I2C_CR1_TXIE_Msk|macro|I2C_CR1_TXIE_Msk
DECL|I2C_CR1_TXIE_Pos|macro|I2C_CR1_TXIE_Pos
DECL|I2C_CR1_TXIE|macro|I2C_CR1_TXIE
DECL|I2C_CR2_ADD10_Msk|macro|I2C_CR2_ADD10_Msk
DECL|I2C_CR2_ADD10_Pos|macro|I2C_CR2_ADD10_Pos
DECL|I2C_CR2_ADD10|macro|I2C_CR2_ADD10
DECL|I2C_CR2_AUTOEND_Msk|macro|I2C_CR2_AUTOEND_Msk
DECL|I2C_CR2_AUTOEND_Pos|macro|I2C_CR2_AUTOEND_Pos
DECL|I2C_CR2_AUTOEND|macro|I2C_CR2_AUTOEND
DECL|I2C_CR2_HEAD10R_Msk|macro|I2C_CR2_HEAD10R_Msk
DECL|I2C_CR2_HEAD10R_Pos|macro|I2C_CR2_HEAD10R_Pos
DECL|I2C_CR2_HEAD10R|macro|I2C_CR2_HEAD10R
DECL|I2C_CR2_NACK_Msk|macro|I2C_CR2_NACK_Msk
DECL|I2C_CR2_NACK_Pos|macro|I2C_CR2_NACK_Pos
DECL|I2C_CR2_NACK|macro|I2C_CR2_NACK
DECL|I2C_CR2_NBYTES_Msk|macro|I2C_CR2_NBYTES_Msk
DECL|I2C_CR2_NBYTES_Pos|macro|I2C_CR2_NBYTES_Pos
DECL|I2C_CR2_NBYTES|macro|I2C_CR2_NBYTES
DECL|I2C_CR2_PECBYTE_Msk|macro|I2C_CR2_PECBYTE_Msk
DECL|I2C_CR2_PECBYTE_Pos|macro|I2C_CR2_PECBYTE_Pos
DECL|I2C_CR2_PECBYTE|macro|I2C_CR2_PECBYTE
DECL|I2C_CR2_RD_WRN_Msk|macro|I2C_CR2_RD_WRN_Msk
DECL|I2C_CR2_RD_WRN_Pos|macro|I2C_CR2_RD_WRN_Pos
DECL|I2C_CR2_RD_WRN|macro|I2C_CR2_RD_WRN
DECL|I2C_CR2_RELOAD_Msk|macro|I2C_CR2_RELOAD_Msk
DECL|I2C_CR2_RELOAD_Pos|macro|I2C_CR2_RELOAD_Pos
DECL|I2C_CR2_RELOAD|macro|I2C_CR2_RELOAD
DECL|I2C_CR2_SADD_Msk|macro|I2C_CR2_SADD_Msk
DECL|I2C_CR2_SADD_Pos|macro|I2C_CR2_SADD_Pos
DECL|I2C_CR2_SADD|macro|I2C_CR2_SADD
DECL|I2C_CR2_START_Msk|macro|I2C_CR2_START_Msk
DECL|I2C_CR2_START_Pos|macro|I2C_CR2_START_Pos
DECL|I2C_CR2_START|macro|I2C_CR2_START
DECL|I2C_CR2_STOP_Msk|macro|I2C_CR2_STOP_Msk
DECL|I2C_CR2_STOP_Pos|macro|I2C_CR2_STOP_Pos
DECL|I2C_CR2_STOP|macro|I2C_CR2_STOP
DECL|I2C_ICR_ADDRCF_Msk|macro|I2C_ICR_ADDRCF_Msk
DECL|I2C_ICR_ADDRCF_Pos|macro|I2C_ICR_ADDRCF_Pos
DECL|I2C_ICR_ADDRCF|macro|I2C_ICR_ADDRCF
DECL|I2C_ICR_ALERTCF_Msk|macro|I2C_ICR_ALERTCF_Msk
DECL|I2C_ICR_ALERTCF_Pos|macro|I2C_ICR_ALERTCF_Pos
DECL|I2C_ICR_ALERTCF|macro|I2C_ICR_ALERTCF
DECL|I2C_ICR_ARLOCF_Msk|macro|I2C_ICR_ARLOCF_Msk
DECL|I2C_ICR_ARLOCF_Pos|macro|I2C_ICR_ARLOCF_Pos
DECL|I2C_ICR_ARLOCF|macro|I2C_ICR_ARLOCF
DECL|I2C_ICR_BERRCF_Msk|macro|I2C_ICR_BERRCF_Msk
DECL|I2C_ICR_BERRCF_Pos|macro|I2C_ICR_BERRCF_Pos
DECL|I2C_ICR_BERRCF|macro|I2C_ICR_BERRCF
DECL|I2C_ICR_NACKCF_Msk|macro|I2C_ICR_NACKCF_Msk
DECL|I2C_ICR_NACKCF_Pos|macro|I2C_ICR_NACKCF_Pos
DECL|I2C_ICR_NACKCF|macro|I2C_ICR_NACKCF
DECL|I2C_ICR_OVRCF_Msk|macro|I2C_ICR_OVRCF_Msk
DECL|I2C_ICR_OVRCF_Pos|macro|I2C_ICR_OVRCF_Pos
DECL|I2C_ICR_OVRCF|macro|I2C_ICR_OVRCF
DECL|I2C_ICR_PECCF_Msk|macro|I2C_ICR_PECCF_Msk
DECL|I2C_ICR_PECCF_Pos|macro|I2C_ICR_PECCF_Pos
DECL|I2C_ICR_PECCF|macro|I2C_ICR_PECCF
DECL|I2C_ICR_STOPCF_Msk|macro|I2C_ICR_STOPCF_Msk
DECL|I2C_ICR_STOPCF_Pos|macro|I2C_ICR_STOPCF_Pos
DECL|I2C_ICR_STOPCF|macro|I2C_ICR_STOPCF
DECL|I2C_ICR_TIMOUTCF_Msk|macro|I2C_ICR_TIMOUTCF_Msk
DECL|I2C_ICR_TIMOUTCF_Pos|macro|I2C_ICR_TIMOUTCF_Pos
DECL|I2C_ICR_TIMOUTCF|macro|I2C_ICR_TIMOUTCF
DECL|I2C_ISR_ADDCODE_Msk|macro|I2C_ISR_ADDCODE_Msk
DECL|I2C_ISR_ADDCODE_Pos|macro|I2C_ISR_ADDCODE_Pos
DECL|I2C_ISR_ADDCODE|macro|I2C_ISR_ADDCODE
DECL|I2C_ISR_ADDR_Msk|macro|I2C_ISR_ADDR_Msk
DECL|I2C_ISR_ADDR_Pos|macro|I2C_ISR_ADDR_Pos
DECL|I2C_ISR_ADDR|macro|I2C_ISR_ADDR
DECL|I2C_ISR_ALERT_Msk|macro|I2C_ISR_ALERT_Msk
DECL|I2C_ISR_ALERT_Pos|macro|I2C_ISR_ALERT_Pos
DECL|I2C_ISR_ALERT|macro|I2C_ISR_ALERT
DECL|I2C_ISR_ARLO_Msk|macro|I2C_ISR_ARLO_Msk
DECL|I2C_ISR_ARLO_Pos|macro|I2C_ISR_ARLO_Pos
DECL|I2C_ISR_ARLO|macro|I2C_ISR_ARLO
DECL|I2C_ISR_BERR_Msk|macro|I2C_ISR_BERR_Msk
DECL|I2C_ISR_BERR_Pos|macro|I2C_ISR_BERR_Pos
DECL|I2C_ISR_BERR|macro|I2C_ISR_BERR
DECL|I2C_ISR_BUSY_Msk|macro|I2C_ISR_BUSY_Msk
DECL|I2C_ISR_BUSY_Pos|macro|I2C_ISR_BUSY_Pos
DECL|I2C_ISR_BUSY|macro|I2C_ISR_BUSY
DECL|I2C_ISR_DIR_Msk|macro|I2C_ISR_DIR_Msk
DECL|I2C_ISR_DIR_Pos|macro|I2C_ISR_DIR_Pos
DECL|I2C_ISR_DIR|macro|I2C_ISR_DIR
DECL|I2C_ISR_NACKF_Msk|macro|I2C_ISR_NACKF_Msk
DECL|I2C_ISR_NACKF_Pos|macro|I2C_ISR_NACKF_Pos
DECL|I2C_ISR_NACKF|macro|I2C_ISR_NACKF
DECL|I2C_ISR_OVR_Msk|macro|I2C_ISR_OVR_Msk
DECL|I2C_ISR_OVR_Pos|macro|I2C_ISR_OVR_Pos
DECL|I2C_ISR_OVR|macro|I2C_ISR_OVR
DECL|I2C_ISR_PECERR_Msk|macro|I2C_ISR_PECERR_Msk
DECL|I2C_ISR_PECERR_Pos|macro|I2C_ISR_PECERR_Pos
DECL|I2C_ISR_PECERR|macro|I2C_ISR_PECERR
DECL|I2C_ISR_RXNE_Msk|macro|I2C_ISR_RXNE_Msk
DECL|I2C_ISR_RXNE_Pos|macro|I2C_ISR_RXNE_Pos
DECL|I2C_ISR_RXNE|macro|I2C_ISR_RXNE
DECL|I2C_ISR_STOPF_Msk|macro|I2C_ISR_STOPF_Msk
DECL|I2C_ISR_STOPF_Pos|macro|I2C_ISR_STOPF_Pos
DECL|I2C_ISR_STOPF|macro|I2C_ISR_STOPF
DECL|I2C_ISR_TCR_Msk|macro|I2C_ISR_TCR_Msk
DECL|I2C_ISR_TCR_Pos|macro|I2C_ISR_TCR_Pos
DECL|I2C_ISR_TCR|macro|I2C_ISR_TCR
DECL|I2C_ISR_TC_Msk|macro|I2C_ISR_TC_Msk
DECL|I2C_ISR_TC_Pos|macro|I2C_ISR_TC_Pos
DECL|I2C_ISR_TC|macro|I2C_ISR_TC
DECL|I2C_ISR_TIMEOUT_Msk|macro|I2C_ISR_TIMEOUT_Msk
DECL|I2C_ISR_TIMEOUT_Pos|macro|I2C_ISR_TIMEOUT_Pos
DECL|I2C_ISR_TIMEOUT|macro|I2C_ISR_TIMEOUT
DECL|I2C_ISR_TXE_Msk|macro|I2C_ISR_TXE_Msk
DECL|I2C_ISR_TXE_Pos|macro|I2C_ISR_TXE_Pos
DECL|I2C_ISR_TXE|macro|I2C_ISR_TXE
DECL|I2C_ISR_TXIS_Msk|macro|I2C_ISR_TXIS_Msk
DECL|I2C_ISR_TXIS_Pos|macro|I2C_ISR_TXIS_Pos
DECL|I2C_ISR_TXIS|macro|I2C_ISR_TXIS
DECL|I2C_OAR1_OA1EN_Msk|macro|I2C_OAR1_OA1EN_Msk
DECL|I2C_OAR1_OA1EN_Pos|macro|I2C_OAR1_OA1EN_Pos
DECL|I2C_OAR1_OA1EN|macro|I2C_OAR1_OA1EN
DECL|I2C_OAR1_OA1MODE_Msk|macro|I2C_OAR1_OA1MODE_Msk
DECL|I2C_OAR1_OA1MODE_Pos|macro|I2C_OAR1_OA1MODE_Pos
DECL|I2C_OAR1_OA1MODE|macro|I2C_OAR1_OA1MODE
DECL|I2C_OAR1_OA1_Msk|macro|I2C_OAR1_OA1_Msk
DECL|I2C_OAR1_OA1_Pos|macro|I2C_OAR1_OA1_Pos
DECL|I2C_OAR1_OA1|macro|I2C_OAR1_OA1
DECL|I2C_OAR2_OA2EN_Msk|macro|I2C_OAR2_OA2EN_Msk
DECL|I2C_OAR2_OA2EN_Pos|macro|I2C_OAR2_OA2EN_Pos
DECL|I2C_OAR2_OA2EN|macro|I2C_OAR2_OA2EN
DECL|I2C_OAR2_OA2MASK01_Msk|macro|I2C_OAR2_OA2MASK01_Msk
DECL|I2C_OAR2_OA2MASK01_Pos|macro|I2C_OAR2_OA2MASK01_Pos
DECL|I2C_OAR2_OA2MASK01|macro|I2C_OAR2_OA2MASK01
DECL|I2C_OAR2_OA2MASK02_Msk|macro|I2C_OAR2_OA2MASK02_Msk
DECL|I2C_OAR2_OA2MASK02_Pos|macro|I2C_OAR2_OA2MASK02_Pos
DECL|I2C_OAR2_OA2MASK02|macro|I2C_OAR2_OA2MASK02
DECL|I2C_OAR2_OA2MASK03_Msk|macro|I2C_OAR2_OA2MASK03_Msk
DECL|I2C_OAR2_OA2MASK03_Pos|macro|I2C_OAR2_OA2MASK03_Pos
DECL|I2C_OAR2_OA2MASK03|macro|I2C_OAR2_OA2MASK03
DECL|I2C_OAR2_OA2MASK04_Msk|macro|I2C_OAR2_OA2MASK04_Msk
DECL|I2C_OAR2_OA2MASK04_Pos|macro|I2C_OAR2_OA2MASK04_Pos
DECL|I2C_OAR2_OA2MASK04|macro|I2C_OAR2_OA2MASK04
DECL|I2C_OAR2_OA2MASK05_Msk|macro|I2C_OAR2_OA2MASK05_Msk
DECL|I2C_OAR2_OA2MASK05_Pos|macro|I2C_OAR2_OA2MASK05_Pos
DECL|I2C_OAR2_OA2MASK05|macro|I2C_OAR2_OA2MASK05
DECL|I2C_OAR2_OA2MASK06_Msk|macro|I2C_OAR2_OA2MASK06_Msk
DECL|I2C_OAR2_OA2MASK06_Pos|macro|I2C_OAR2_OA2MASK06_Pos
DECL|I2C_OAR2_OA2MASK06|macro|I2C_OAR2_OA2MASK06
DECL|I2C_OAR2_OA2MASK07_Msk|macro|I2C_OAR2_OA2MASK07_Msk
DECL|I2C_OAR2_OA2MASK07_Pos|macro|I2C_OAR2_OA2MASK07_Pos
DECL|I2C_OAR2_OA2MASK07|macro|I2C_OAR2_OA2MASK07
DECL|I2C_OAR2_OA2MSK_Msk|macro|I2C_OAR2_OA2MSK_Msk
DECL|I2C_OAR2_OA2MSK_Pos|macro|I2C_OAR2_OA2MSK_Pos
DECL|I2C_OAR2_OA2MSK|macro|I2C_OAR2_OA2MSK
DECL|I2C_OAR2_OA2NOMASK|macro|I2C_OAR2_OA2NOMASK
DECL|I2C_OAR2_OA2_Msk|macro|I2C_OAR2_OA2_Msk
DECL|I2C_OAR2_OA2_Pos|macro|I2C_OAR2_OA2_Pos
DECL|I2C_OAR2_OA2|macro|I2C_OAR2_OA2
DECL|I2C_PECR_PEC_Msk|macro|I2C_PECR_PEC_Msk
DECL|I2C_PECR_PEC_Pos|macro|I2C_PECR_PEC_Pos
DECL|I2C_PECR_PEC|macro|I2C_PECR_PEC
DECL|I2C_RXDR_RXDATA_Msk|macro|I2C_RXDR_RXDATA_Msk
DECL|I2C_RXDR_RXDATA_Pos|macro|I2C_RXDR_RXDATA_Pos
DECL|I2C_RXDR_RXDATA|macro|I2C_RXDR_RXDATA
DECL|I2C_TIMEOUTR_TEXTEN_Msk|macro|I2C_TIMEOUTR_TEXTEN_Msk
DECL|I2C_TIMEOUTR_TEXTEN_Pos|macro|I2C_TIMEOUTR_TEXTEN_Pos
DECL|I2C_TIMEOUTR_TEXTEN|macro|I2C_TIMEOUTR_TEXTEN
DECL|I2C_TIMEOUTR_TIDLE_Msk|macro|I2C_TIMEOUTR_TIDLE_Msk
DECL|I2C_TIMEOUTR_TIDLE_Pos|macro|I2C_TIMEOUTR_TIDLE_Pos
DECL|I2C_TIMEOUTR_TIDLE|macro|I2C_TIMEOUTR_TIDLE
DECL|I2C_TIMEOUTR_TIMEOUTA_Msk|macro|I2C_TIMEOUTR_TIMEOUTA_Msk
DECL|I2C_TIMEOUTR_TIMEOUTA_Pos|macro|I2C_TIMEOUTR_TIMEOUTA_Pos
DECL|I2C_TIMEOUTR_TIMEOUTA|macro|I2C_TIMEOUTR_TIMEOUTA
DECL|I2C_TIMEOUTR_TIMEOUTB_Msk|macro|I2C_TIMEOUTR_TIMEOUTB_Msk
DECL|I2C_TIMEOUTR_TIMEOUTB_Pos|macro|I2C_TIMEOUTR_TIMEOUTB_Pos
DECL|I2C_TIMEOUTR_TIMEOUTB|macro|I2C_TIMEOUTR_TIMEOUTB
DECL|I2C_TIMEOUTR_TIMOUTEN_Msk|macro|I2C_TIMEOUTR_TIMOUTEN_Msk
DECL|I2C_TIMEOUTR_TIMOUTEN_Pos|macro|I2C_TIMEOUTR_TIMOUTEN_Pos
DECL|I2C_TIMEOUTR_TIMOUTEN|macro|I2C_TIMEOUTR_TIMOUTEN
DECL|I2C_TIMINGR_PRESC_Msk|macro|I2C_TIMINGR_PRESC_Msk
DECL|I2C_TIMINGR_PRESC_Pos|macro|I2C_TIMINGR_PRESC_Pos
DECL|I2C_TIMINGR_PRESC|macro|I2C_TIMINGR_PRESC
DECL|I2C_TIMINGR_SCLDEL_Msk|macro|I2C_TIMINGR_SCLDEL_Msk
DECL|I2C_TIMINGR_SCLDEL_Pos|macro|I2C_TIMINGR_SCLDEL_Pos
DECL|I2C_TIMINGR_SCLDEL|macro|I2C_TIMINGR_SCLDEL
DECL|I2C_TIMINGR_SCLH_Msk|macro|I2C_TIMINGR_SCLH_Msk
DECL|I2C_TIMINGR_SCLH_Pos|macro|I2C_TIMINGR_SCLH_Pos
DECL|I2C_TIMINGR_SCLH|macro|I2C_TIMINGR_SCLH
DECL|I2C_TIMINGR_SCLL_Msk|macro|I2C_TIMINGR_SCLL_Msk
DECL|I2C_TIMINGR_SCLL_Pos|macro|I2C_TIMINGR_SCLL_Pos
DECL|I2C_TIMINGR_SCLL|macro|I2C_TIMINGR_SCLL
DECL|I2C_TIMINGR_SDADEL_Msk|macro|I2C_TIMINGR_SDADEL_Msk
DECL|I2C_TIMINGR_SDADEL_Pos|macro|I2C_TIMINGR_SDADEL_Pos
DECL|I2C_TIMINGR_SDADEL|macro|I2C_TIMINGR_SDADEL
DECL|I2C_TXDR_TXDATA_Msk|macro|I2C_TXDR_TXDATA_Msk
DECL|I2C_TXDR_TXDATA_Pos|macro|I2C_TXDR_TXDATA_Pos
DECL|I2C_TXDR_TXDATA|macro|I2C_TXDR_TXDATA
DECL|I2C_TypeDef|typedef|} I2C_TypeDef;
DECL|I2SCFGR|member|__IO uint32_t I2SCFGR; /*!< SPI_I2S configuration register, Address offset: 0x1C */
DECL|I2SPR|member|__IO uint32_t I2SPR; /*!< SPI_I2S prescaler register, Address offset: 0x20 */
DECL|ICR|member|__IO uint32_t ICR; /*!< I2C Interrupt clear register, Address offset: 0x1C */
DECL|ICR|member|__IO uint32_t ICR; /*!< LPTIM Interrupt Clear register, Address offset: 0x04 */
DECL|ICR|member|__IO uint32_t ICR; /*!< SDMMC interrupt clear register, Address offset: 0x38 */
DECL|ICR|member|__IO uint32_t ICR; /*!< USART Interrupt flag Clear register, Address offset: 0x20 */
DECL|IDCODE|member|__IO uint32_t IDCODE; /*!< MCU device ID code, Address offset: 0x00 */
DECL|IDR|member|__IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */
DECL|IDR|member|__IO uint8_t IDR; /*!< CRC Independent data register, Address offset: 0x04 */
DECL|IER|member|__IO uint32_t IER; /*!< CAN interrupt enable register, Address offset: 0x14 */
DECL|IER|member|__IO uint32_t IER; /*!< LPTIM Interrupt Enable register, Address offset: 0x08 */
DECL|IMR|member|__IO uint32_t IMR; /*!< EXTI Interrupt mask register, Address offset: 0x00 */
DECL|IMR|member|__IO uint32_t IMR; /*!< SAI block x interrupt mask register, Address offset: 0x14 */
DECL|INIT|member|__IO uint32_t INIT; /*!< Initial CRC value register, Address offset: 0x10 */
DECL|IRQn_Type|typedef|} IRQn_Type;
DECL|ISR|member|__IO uint32_t ISR; /*!< I2C Interrupt and status register, Address offset: 0x18 */
DECL|ISR|member|__IO uint32_t ISR; /*!< LPTIM Interrupt and Status register, Address offset: 0x00 */
DECL|ISR|member|__IO uint32_t ISR; /*!< RTC initialization and status register, Address offset: 0x0C */
DECL|ISR|member|__IO uint32_t ISR; /*!< USART Interrupt and status register, Address offset: 0x1C */
DECL|IS_ADC_ALL_INSTANCE|macro|IS_ADC_ALL_INSTANCE
DECL|IS_ADC_COMMON_INSTANCE|macro|IS_ADC_COMMON_INSTANCE
DECL|IS_ADC_MULTIMODE_MASTER_INSTANCE|macro|IS_ADC_MULTIMODE_MASTER_INSTANCE
DECL|IS_AES_ALL_INSTANCE|macro|IS_AES_ALL_INSTANCE
DECL|IS_CAN_ALL_INSTANCE|macro|IS_CAN_ALL_INSTANCE
DECL|IS_CRC_ALL_INSTANCE|macro|IS_CRC_ALL_INSTANCE
DECL|IS_DAC_ALL_INSTANCE|macro|IS_DAC_ALL_INSTANCE
DECL|IS_DMA_STREAM_ALL_INSTANCE|macro|IS_DMA_STREAM_ALL_INSTANCE
DECL|IS_GPIO_AF_INSTANCE|macro|IS_GPIO_AF_INSTANCE
DECL|IS_GPIO_ALL_INSTANCE|macro|IS_GPIO_ALL_INSTANCE
DECL|IS_I2C_ALL_INSTANCE|macro|IS_I2C_ALL_INSTANCE
DECL|IS_I2S_ALL_INSTANCE|macro|IS_I2S_ALL_INSTANCE
DECL|IS_IRDA_INSTANCE|macro|IS_IRDA_INSTANCE
DECL|IS_IWDG_ALL_INSTANCE|macro|IS_IWDG_ALL_INSTANCE
DECL|IS_LPTIM_INSTANCE|macro|IS_LPTIM_INSTANCE
DECL|IS_QSPI_ALL_INSTANCE|macro|IS_QSPI_ALL_INSTANCE
DECL|IS_RNG_ALL_INSTANCE|macro|IS_RNG_ALL_INSTANCE
DECL|IS_RTC_ALL_INSTANCE|macro|IS_RTC_ALL_INSTANCE
DECL|IS_SAI_ALL_INSTANCE|macro|IS_SAI_ALL_INSTANCE
DECL|IS_SAI_BLOCK_PERIPH|macro|IS_SAI_BLOCK_PERIPH
DECL|IS_SDMMC_ALL_INSTANCE|macro|IS_SDMMC_ALL_INSTANCE
DECL|IS_SMARTCARD_INSTANCE|macro|IS_SMARTCARD_INSTANCE
DECL|IS_SMBUS_ALL_INSTANCE|macro|IS_SMBUS_ALL_INSTANCE
DECL|IS_SPI_ALL_INSTANCE|macro|IS_SPI_ALL_INSTANCE
DECL|IS_TIM_32B_COUNTER_INSTANCE|macro|IS_TIM_32B_COUNTER_INSTANCE
DECL|IS_TIM_ADVANCED_INSTANCE|macro|IS_TIM_ADVANCED_INSTANCE
DECL|IS_TIM_BKIN2_INSTANCE|macro|IS_TIM_BKIN2_INSTANCE
DECL|IS_TIM_BREAKSOURCE_INSTANCE|macro|IS_TIM_BREAKSOURCE_INSTANCE
DECL|IS_TIM_BREAK_INSTANCE|macro|IS_TIM_BREAK_INSTANCE
DECL|IS_TIM_CC1_INSTANCE|macro|IS_TIM_CC1_INSTANCE
DECL|IS_TIM_CC2_INSTANCE|macro|IS_TIM_CC2_INSTANCE
DECL|IS_TIM_CC3_INSTANCE|macro|IS_TIM_CC3_INSTANCE
DECL|IS_TIM_CC4_INSTANCE|macro|IS_TIM_CC4_INSTANCE
DECL|IS_TIM_CC5_INSTANCE|macro|IS_TIM_CC5_INSTANCE
DECL|IS_TIM_CC6_INSTANCE|macro|IS_TIM_CC6_INSTANCE
DECL|IS_TIM_CCDMA_INSTANCE|macro|IS_TIM_CCDMA_INSTANCE
DECL|IS_TIM_CCXN_INSTANCE|macro|IS_TIM_CCXN_INSTANCE
DECL|IS_TIM_CCX_INSTANCE|macro|IS_TIM_CCX_INSTANCE
DECL|IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE|macro|IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE
DECL|IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE|macro|IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE
DECL|IS_TIM_CLOCKSOURCE_ITRX_INSTANCE|macro|IS_TIM_CLOCKSOURCE_ITRX_INSTANCE
DECL|IS_TIM_CLOCKSOURCE_TIX_INSTANCE|macro|IS_TIM_CLOCKSOURCE_TIX_INSTANCE
DECL|IS_TIM_CLOCK_DIVISION_INSTANCE|macro|IS_TIM_CLOCK_DIVISION_INSTANCE
DECL|IS_TIM_COMBINED3PHASEPWM_INSTANCE|macro|IS_TIM_COMBINED3PHASEPWM_INSTANCE
DECL|IS_TIM_COMMUTATION_EVENT_INSTANCE|macro|IS_TIM_COMMUTATION_EVENT_INSTANCE
DECL|IS_TIM_COUNTER_MODE_SELECT_INSTANCE|macro|IS_TIM_COUNTER_MODE_SELECT_INSTANCE
DECL|IS_TIM_DMABURST_INSTANCE|macro|IS_TIM_DMABURST_INSTANCE
DECL|IS_TIM_DMA_CC_INSTANCE|macro|IS_TIM_DMA_CC_INSTANCE
DECL|IS_TIM_DMA_INSTANCE|macro|IS_TIM_DMA_INSTANCE
DECL|IS_TIM_ENCODER_INTERFACE_INSTANCE|macro|IS_TIM_ENCODER_INTERFACE_INSTANCE
DECL|IS_TIM_ETR_INSTANCE|macro|IS_TIM_ETR_INSTANCE
DECL|IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE|macro|IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE
DECL|IS_TIM_INSTANCE|macro|IS_TIM_INSTANCE
DECL|IS_TIM_MASTER_INSTANCE|macro|IS_TIM_MASTER_INSTANCE
DECL|IS_TIM_OCXREF_CLEAR_INSTANCE|macro|IS_TIM_OCXREF_CLEAR_INSTANCE
DECL|IS_TIM_REMAP_INSTANCE|macro|IS_TIM_REMAP_INSTANCE
DECL|IS_TIM_REPETITION_COUNTER_INSTANCE|macro|IS_TIM_REPETITION_COUNTER_INSTANCE
DECL|IS_TIM_SLAVE_INSTANCE|macro|IS_TIM_SLAVE_INSTANCE
DECL|IS_TIM_SYNCHRO_INSTANCE|macro|IS_TIM_SYNCHRO_INSTANCE
DECL|IS_TIM_TRGO2_INSTANCE|macro|IS_TIM_TRGO2_INSTANCE
DECL|IS_TIM_XOR_INSTANCE|macro|IS_TIM_XOR_INSTANCE
DECL|IS_UART_DRIVER_ENABLE_INSTANCE|macro|IS_UART_DRIVER_ENABLE_INSTANCE
DECL|IS_UART_HALFDUPLEX_INSTANCE|macro|IS_UART_HALFDUPLEX_INSTANCE
DECL|IS_UART_HWFLOW_INSTANCE|macro|IS_UART_HWFLOW_INSTANCE
DECL|IS_UART_INSTANCE|macro|IS_UART_INSTANCE
DECL|IS_UART_LIN_INSTANCE|macro|IS_UART_LIN_INSTANCE
DECL|IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE|macro|IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE
DECL|IS_USART_INSTANCE|macro|IS_USART_INSTANCE
DECL|IS_WWDG_ALL_INSTANCE|macro|IS_WWDG_ALL_INSTANCE
DECL|IVR0|member|__IO uint32_t IVR0; /*!< AES initialization vector register 0, Address offset: 0x20 */
DECL|IVR1|member|__IO uint32_t IVR1; /*!< AES initialization vector register 1, Address offset: 0x24 */
DECL|IVR2|member|__IO uint32_t IVR2; /*!< AES initialization vector register 2, Address offset: 0x28 */
DECL|IVR3|member|__IO uint32_t IVR3; /*!< AES initialization vector register 3, Address offset: 0x2C */
DECL|IWDG_BASE|macro|IWDG_BASE
DECL|IWDG_KR_KEY_Msk|macro|IWDG_KR_KEY_Msk
DECL|IWDG_KR_KEY_Pos|macro|IWDG_KR_KEY_Pos
DECL|IWDG_KR_KEY|macro|IWDG_KR_KEY
DECL|IWDG_PR_PR_0|macro|IWDG_PR_PR_0
DECL|IWDG_PR_PR_1|macro|IWDG_PR_PR_1
DECL|IWDG_PR_PR_2|macro|IWDG_PR_PR_2
DECL|IWDG_PR_PR_Msk|macro|IWDG_PR_PR_Msk
DECL|IWDG_PR_PR_Pos|macro|IWDG_PR_PR_Pos
DECL|IWDG_PR_PR|macro|IWDG_PR_PR
DECL|IWDG_RLR_RL_Msk|macro|IWDG_RLR_RL_Msk
DECL|IWDG_RLR_RL_Pos|macro|IWDG_RLR_RL_Pos
DECL|IWDG_RLR_RL|macro|IWDG_RLR_RL
DECL|IWDG_SR_PVU_Msk|macro|IWDG_SR_PVU_Msk
DECL|IWDG_SR_PVU_Pos|macro|IWDG_SR_PVU_Pos
DECL|IWDG_SR_PVU|macro|IWDG_SR_PVU
DECL|IWDG_SR_RVU_Msk|macro|IWDG_SR_RVU_Msk
DECL|IWDG_SR_RVU_Pos|macro|IWDG_SR_RVU_Pos
DECL|IWDG_SR_RVU|macro|IWDG_SR_RVU
DECL|IWDG_SR_WVU_Msk|macro|IWDG_SR_WVU_Msk
DECL|IWDG_SR_WVU_Pos|macro|IWDG_SR_WVU_Pos
DECL|IWDG_SR_WVU|macro|IWDG_SR_WVU
DECL|IWDG_TypeDef|typedef|} IWDG_TypeDef;
DECL|IWDG_WINR_WIN_Msk|macro|IWDG_WINR_WIN_Msk
DECL|IWDG_WINR_WIN_Pos|macro|IWDG_WINR_WIN_Pos
DECL|IWDG_WINR_WIN|macro|IWDG_WINR_WIN
DECL|IWDG|macro|IWDG
DECL|JDR1|member|__IO uint32_t JDR1; /*!< ADC injected data register 1, Address offset: 0x3C */
DECL|JDR2|member|__IO uint32_t JDR2; /*!< ADC injected data register 2, Address offset: 0x40 */
DECL|JDR3|member|__IO uint32_t JDR3; /*!< ADC injected data register 3, Address offset: 0x44 */
DECL|JDR4|member|__IO uint32_t JDR4; /*!< ADC injected data register 4, Address offset: 0x48 */
DECL|JOFR1|member|__IO uint32_t JOFR1; /*!< ADC injected channel data offset register 1, Address offset: 0x14 */
DECL|JOFR2|member|__IO uint32_t JOFR2; /*!< ADC injected channel data offset register 2, Address offset: 0x18 */
DECL|JOFR3|member|__IO uint32_t JOFR3; /*!< ADC injected channel data offset register 3, Address offset: 0x1C */
DECL|JOFR4|member|__IO uint32_t JOFR4; /*!< ADC injected channel data offset register 4, Address offset: 0x20 */
DECL|JSQR|member|__IO uint32_t JSQR; /*!< ADC injected sequence register, Address offset: 0x38*/
DECL|KEYR0|member|__IO uint32_t KEYR0; /*!< AES key register 0, Address offset: 0x10 */
DECL|KEYR1|member|__IO uint32_t KEYR1; /*!< AES key register 1, Address offset: 0x14 */
DECL|KEYR2|member|__IO uint32_t KEYR2; /*!< AES key register 2, Address offset: 0x18 */
DECL|KEYR3|member|__IO uint32_t KEYR3; /*!< AES key register 3, Address offset: 0x1C */
DECL|KEYR4|member|__IO uint32_t KEYR4; /*!< AES key register 4, Address offset: 0x30 */
DECL|KEYR5|member|__IO uint32_t KEYR5; /*!< AES key register 5, Address offset: 0x34 */
DECL|KEYR6|member|__IO uint32_t KEYR6; /*!< AES key register 6, Address offset: 0x38 */
DECL|KEYR7|member|__IO uint32_t KEYR7; /*!< AES key register 7, Address offset: 0x3C */
DECL|KEYR|member|__IO uint32_t KEYR; /*!< FLASH key register, Address offset: 0x04 */
DECL|KR|member|__IO uint32_t KR; /*!< IWDG Key register, Address offset: 0x00 */
DECL|LCKR|member|__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */
DECL|LIFCR|member|__IO uint32_t LIFCR; /*!< DMA low interrupt flag clear register, Address offset: 0x08 */
DECL|LISR|member|__IO uint32_t LISR; /*!< DMA low interrupt status register, Address offset: 0x00 */
DECL|LPTIM1_BASE|macro|LPTIM1_BASE
DECL|LPTIM1_IRQn|enumerator|LPTIM1_IRQn = 93, /*!< LP TIM1 interrupt */
DECL|LPTIM1|macro|LPTIM1
DECL|LPTIM_ARR_ARR_Msk|macro|LPTIM_ARR_ARR_Msk
DECL|LPTIM_ARR_ARR_Pos|macro|LPTIM_ARR_ARR_Pos
DECL|LPTIM_ARR_ARR|macro|LPTIM_ARR_ARR
DECL|LPTIM_CFGR_CKFLT_0|macro|LPTIM_CFGR_CKFLT_0
DECL|LPTIM_CFGR_CKFLT_1|macro|LPTIM_CFGR_CKFLT_1
DECL|LPTIM_CFGR_CKFLT_Msk|macro|LPTIM_CFGR_CKFLT_Msk
DECL|LPTIM_CFGR_CKFLT_Pos|macro|LPTIM_CFGR_CKFLT_Pos
DECL|LPTIM_CFGR_CKFLT|macro|LPTIM_CFGR_CKFLT
DECL|LPTIM_CFGR_CKPOL_0|macro|LPTIM_CFGR_CKPOL_0
DECL|LPTIM_CFGR_CKPOL_1|macro|LPTIM_CFGR_CKPOL_1
DECL|LPTIM_CFGR_CKPOL_Msk|macro|LPTIM_CFGR_CKPOL_Msk
DECL|LPTIM_CFGR_CKPOL_Pos|macro|LPTIM_CFGR_CKPOL_Pos
DECL|LPTIM_CFGR_CKPOL|macro|LPTIM_CFGR_CKPOL
DECL|LPTIM_CFGR_CKSEL_Msk|macro|LPTIM_CFGR_CKSEL_Msk
DECL|LPTIM_CFGR_CKSEL_Pos|macro|LPTIM_CFGR_CKSEL_Pos
DECL|LPTIM_CFGR_CKSEL|macro|LPTIM_CFGR_CKSEL
DECL|LPTIM_CFGR_COUNTMODE_Msk|macro|LPTIM_CFGR_COUNTMODE_Msk
DECL|LPTIM_CFGR_COUNTMODE_Pos|macro|LPTIM_CFGR_COUNTMODE_Pos
DECL|LPTIM_CFGR_COUNTMODE|macro|LPTIM_CFGR_COUNTMODE
DECL|LPTIM_CFGR_ENC_Msk|macro|LPTIM_CFGR_ENC_Msk
DECL|LPTIM_CFGR_ENC_Pos|macro|LPTIM_CFGR_ENC_Pos
DECL|LPTIM_CFGR_ENC|macro|LPTIM_CFGR_ENC
DECL|LPTIM_CFGR_PRELOAD_Msk|macro|LPTIM_CFGR_PRELOAD_Msk
DECL|LPTIM_CFGR_PRELOAD_Pos|macro|LPTIM_CFGR_PRELOAD_Pos
DECL|LPTIM_CFGR_PRELOAD|macro|LPTIM_CFGR_PRELOAD
DECL|LPTIM_CFGR_PRESC_0|macro|LPTIM_CFGR_PRESC_0
DECL|LPTIM_CFGR_PRESC_1|macro|LPTIM_CFGR_PRESC_1
DECL|LPTIM_CFGR_PRESC_2|macro|LPTIM_CFGR_PRESC_2
DECL|LPTIM_CFGR_PRESC_Msk|macro|LPTIM_CFGR_PRESC_Msk
DECL|LPTIM_CFGR_PRESC_Pos|macro|LPTIM_CFGR_PRESC_Pos
DECL|LPTIM_CFGR_PRESC|macro|LPTIM_CFGR_PRESC
DECL|LPTIM_CFGR_TIMOUT_Msk|macro|LPTIM_CFGR_TIMOUT_Msk
DECL|LPTIM_CFGR_TIMOUT_Pos|macro|LPTIM_CFGR_TIMOUT_Pos
DECL|LPTIM_CFGR_TIMOUT|macro|LPTIM_CFGR_TIMOUT
DECL|LPTIM_CFGR_TRGFLT_0|macro|LPTIM_CFGR_TRGFLT_0
DECL|LPTIM_CFGR_TRGFLT_1|macro|LPTIM_CFGR_TRGFLT_1
DECL|LPTIM_CFGR_TRGFLT_Msk|macro|LPTIM_CFGR_TRGFLT_Msk
DECL|LPTIM_CFGR_TRGFLT_Pos|macro|LPTIM_CFGR_TRGFLT_Pos
DECL|LPTIM_CFGR_TRGFLT|macro|LPTIM_CFGR_TRGFLT
DECL|LPTIM_CFGR_TRIGEN_0|macro|LPTIM_CFGR_TRIGEN_0
DECL|LPTIM_CFGR_TRIGEN_1|macro|LPTIM_CFGR_TRIGEN_1
DECL|LPTIM_CFGR_TRIGEN_Msk|macro|LPTIM_CFGR_TRIGEN_Msk
DECL|LPTIM_CFGR_TRIGEN_Pos|macro|LPTIM_CFGR_TRIGEN_Pos
DECL|LPTIM_CFGR_TRIGEN|macro|LPTIM_CFGR_TRIGEN
DECL|LPTIM_CFGR_TRIGSEL_0|macro|LPTIM_CFGR_TRIGSEL_0
DECL|LPTIM_CFGR_TRIGSEL_1|macro|LPTIM_CFGR_TRIGSEL_1
DECL|LPTIM_CFGR_TRIGSEL_2|macro|LPTIM_CFGR_TRIGSEL_2
DECL|LPTIM_CFGR_TRIGSEL_Msk|macro|LPTIM_CFGR_TRIGSEL_Msk
DECL|LPTIM_CFGR_TRIGSEL_Pos|macro|LPTIM_CFGR_TRIGSEL_Pos
DECL|LPTIM_CFGR_TRIGSEL|macro|LPTIM_CFGR_TRIGSEL
DECL|LPTIM_CFGR_WAVE_Msk|macro|LPTIM_CFGR_WAVE_Msk
DECL|LPTIM_CFGR_WAVE_Pos|macro|LPTIM_CFGR_WAVE_Pos
DECL|LPTIM_CFGR_WAVE|macro|LPTIM_CFGR_WAVE
DECL|LPTIM_CFGR_WAVPOL_Msk|macro|LPTIM_CFGR_WAVPOL_Msk
DECL|LPTIM_CFGR_WAVPOL_Pos|macro|LPTIM_CFGR_WAVPOL_Pos
DECL|LPTIM_CFGR_WAVPOL|macro|LPTIM_CFGR_WAVPOL
DECL|LPTIM_CMP_CMP_Msk|macro|LPTIM_CMP_CMP_Msk
DECL|LPTIM_CMP_CMP_Pos|macro|LPTIM_CMP_CMP_Pos
DECL|LPTIM_CMP_CMP|macro|LPTIM_CMP_CMP
DECL|LPTIM_CNT_CNT_Msk|macro|LPTIM_CNT_CNT_Msk
DECL|LPTIM_CNT_CNT_Pos|macro|LPTIM_CNT_CNT_Pos
DECL|LPTIM_CNT_CNT|macro|LPTIM_CNT_CNT
DECL|LPTIM_CR_CNTSTRT_Msk|macro|LPTIM_CR_CNTSTRT_Msk
DECL|LPTIM_CR_CNTSTRT_Pos|macro|LPTIM_CR_CNTSTRT_Pos
DECL|LPTIM_CR_CNTSTRT|macro|LPTIM_CR_CNTSTRT
DECL|LPTIM_CR_ENABLE_Msk|macro|LPTIM_CR_ENABLE_Msk
DECL|LPTIM_CR_ENABLE_Pos|macro|LPTIM_CR_ENABLE_Pos
DECL|LPTIM_CR_ENABLE|macro|LPTIM_CR_ENABLE
DECL|LPTIM_CR_SNGSTRT_Msk|macro|LPTIM_CR_SNGSTRT_Msk
DECL|LPTIM_CR_SNGSTRT_Pos|macro|LPTIM_CR_SNGSTRT_Pos
DECL|LPTIM_CR_SNGSTRT|macro|LPTIM_CR_SNGSTRT
DECL|LPTIM_ICR_ARRMCF_Msk|macro|LPTIM_ICR_ARRMCF_Msk
DECL|LPTIM_ICR_ARRMCF_Pos|macro|LPTIM_ICR_ARRMCF_Pos
DECL|LPTIM_ICR_ARRMCF|macro|LPTIM_ICR_ARRMCF
DECL|LPTIM_ICR_ARROKCF_Msk|macro|LPTIM_ICR_ARROKCF_Msk
DECL|LPTIM_ICR_ARROKCF_Pos|macro|LPTIM_ICR_ARROKCF_Pos
DECL|LPTIM_ICR_ARROKCF|macro|LPTIM_ICR_ARROKCF
DECL|LPTIM_ICR_CMPMCF_Msk|macro|LPTIM_ICR_CMPMCF_Msk
DECL|LPTIM_ICR_CMPMCF_Pos|macro|LPTIM_ICR_CMPMCF_Pos
DECL|LPTIM_ICR_CMPMCF|macro|LPTIM_ICR_CMPMCF
DECL|LPTIM_ICR_CMPOKCF_Msk|macro|LPTIM_ICR_CMPOKCF_Msk
DECL|LPTIM_ICR_CMPOKCF_Pos|macro|LPTIM_ICR_CMPOKCF_Pos
DECL|LPTIM_ICR_CMPOKCF|macro|LPTIM_ICR_CMPOKCF
DECL|LPTIM_ICR_DOWNCF_Msk|macro|LPTIM_ICR_DOWNCF_Msk
DECL|LPTIM_ICR_DOWNCF_Pos|macro|LPTIM_ICR_DOWNCF_Pos
DECL|LPTIM_ICR_DOWNCF|macro|LPTIM_ICR_DOWNCF
DECL|LPTIM_ICR_EXTTRIGCF_Msk|macro|LPTIM_ICR_EXTTRIGCF_Msk
DECL|LPTIM_ICR_EXTTRIGCF_Pos|macro|LPTIM_ICR_EXTTRIGCF_Pos
DECL|LPTIM_ICR_EXTTRIGCF|macro|LPTIM_ICR_EXTTRIGCF
DECL|LPTIM_ICR_UPCF_Msk|macro|LPTIM_ICR_UPCF_Msk
DECL|LPTIM_ICR_UPCF_Pos|macro|LPTIM_ICR_UPCF_Pos
DECL|LPTIM_ICR_UPCF|macro|LPTIM_ICR_UPCF
DECL|LPTIM_IER_ARRMIE_Msk|macro|LPTIM_IER_ARRMIE_Msk
DECL|LPTIM_IER_ARRMIE_Pos|macro|LPTIM_IER_ARRMIE_Pos
DECL|LPTIM_IER_ARRMIE|macro|LPTIM_IER_ARRMIE
DECL|LPTIM_IER_ARROKIE_Msk|macro|LPTIM_IER_ARROKIE_Msk
DECL|LPTIM_IER_ARROKIE_Pos|macro|LPTIM_IER_ARROKIE_Pos
DECL|LPTIM_IER_ARROKIE|macro|LPTIM_IER_ARROKIE
DECL|LPTIM_IER_CMPMIE_Msk|macro|LPTIM_IER_CMPMIE_Msk
DECL|LPTIM_IER_CMPMIE_Pos|macro|LPTIM_IER_CMPMIE_Pos
DECL|LPTIM_IER_CMPMIE|macro|LPTIM_IER_CMPMIE
DECL|LPTIM_IER_CMPOKIE_Msk|macro|LPTIM_IER_CMPOKIE_Msk
DECL|LPTIM_IER_CMPOKIE_Pos|macro|LPTIM_IER_CMPOKIE_Pos
DECL|LPTIM_IER_CMPOKIE|macro|LPTIM_IER_CMPOKIE
DECL|LPTIM_IER_DOWNIE_Msk|macro|LPTIM_IER_DOWNIE_Msk
DECL|LPTIM_IER_DOWNIE_Pos|macro|LPTIM_IER_DOWNIE_Pos
DECL|LPTIM_IER_DOWNIE|macro|LPTIM_IER_DOWNIE
DECL|LPTIM_IER_EXTTRIGIE_Msk|macro|LPTIM_IER_EXTTRIGIE_Msk
DECL|LPTIM_IER_EXTTRIGIE_Pos|macro|LPTIM_IER_EXTTRIGIE_Pos
DECL|LPTIM_IER_EXTTRIGIE|macro|LPTIM_IER_EXTTRIGIE
DECL|LPTIM_IER_UPIE_Msk|macro|LPTIM_IER_UPIE_Msk
DECL|LPTIM_IER_UPIE_Pos|macro|LPTIM_IER_UPIE_Pos
DECL|LPTIM_IER_UPIE|macro|LPTIM_IER_UPIE
DECL|LPTIM_ISR_ARRM_Msk|macro|LPTIM_ISR_ARRM_Msk
DECL|LPTIM_ISR_ARRM_Pos|macro|LPTIM_ISR_ARRM_Pos
DECL|LPTIM_ISR_ARRM|macro|LPTIM_ISR_ARRM
DECL|LPTIM_ISR_ARROK_Msk|macro|LPTIM_ISR_ARROK_Msk
DECL|LPTIM_ISR_ARROK_Pos|macro|LPTIM_ISR_ARROK_Pos
DECL|LPTIM_ISR_ARROK|macro|LPTIM_ISR_ARROK
DECL|LPTIM_ISR_CMPM_Msk|macro|LPTIM_ISR_CMPM_Msk
DECL|LPTIM_ISR_CMPM_Pos|macro|LPTIM_ISR_CMPM_Pos
DECL|LPTIM_ISR_CMPM|macro|LPTIM_ISR_CMPM
DECL|LPTIM_ISR_CMPOK_Msk|macro|LPTIM_ISR_CMPOK_Msk
DECL|LPTIM_ISR_CMPOK_Pos|macro|LPTIM_ISR_CMPOK_Pos
DECL|LPTIM_ISR_CMPOK|macro|LPTIM_ISR_CMPOK
DECL|LPTIM_ISR_DOWN_Msk|macro|LPTIM_ISR_DOWN_Msk
DECL|LPTIM_ISR_DOWN_Pos|macro|LPTIM_ISR_DOWN_Pos
DECL|LPTIM_ISR_DOWN|macro|LPTIM_ISR_DOWN
DECL|LPTIM_ISR_EXTTRIG_Msk|macro|LPTIM_ISR_EXTTRIG_Msk
DECL|LPTIM_ISR_EXTTRIG_Pos|macro|LPTIM_ISR_EXTTRIG_Pos
DECL|LPTIM_ISR_EXTTRIG|macro|LPTIM_ISR_EXTTRIG
DECL|LPTIM_ISR_UP_Msk|macro|LPTIM_ISR_UP_Msk
DECL|LPTIM_ISR_UP_Pos|macro|LPTIM_ISR_UP_Pos
DECL|LPTIM_ISR_UP|macro|LPTIM_ISR_UP
DECL|LPTIM_TypeDef|typedef|} LPTIM_TypeDef;
DECL|LPTR|member|__IO uint32_t LPTR; /*!< QUADSPI Low Power Timeout register, Address offset: 0x30 */
DECL|LTR|member|__IO uint32_t LTR; /*!< ADC watchdog lower threshold register, Address offset: 0x28 */
DECL|M0AR|member|__IO uint32_t M0AR; /*!< DMA stream x memory 0 address register */
DECL|M1AR|member|__IO uint32_t M1AR; /*!< DMA stream x memory 1 address register */
DECL|MASK|member|__IO uint32_t MASK; /*!< SDMMC mask register, Address offset: 0x3C */
DECL|MCR|member|__IO uint32_t MCR; /*!< CAN master control register, Address offset: 0x00 */
DECL|MEMRMP|member|__IO uint32_t MEMRMP; /*!< SYSCFG memory remap register, Address offset: 0x00 */
DECL|MODER|member|__IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */
DECL|MSR|member|__IO uint32_t MSR; /*!< CAN master status register, Address offset: 0x04 */
DECL|MemoryManagement_IRQn|enumerator|MemoryManagement_IRQn = -12, /*!< 4 Cortex-M7 Memory Management Interrupt */
DECL|NDTR|member|__IO uint32_t NDTR; /*!< DMA stream x number of data register */
DECL|NonMaskableInt_IRQn|enumerator|NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
DECL|OAR1|member|__IO uint32_t OAR1; /*!< I2C Own address 1 register, Address offset: 0x08 */
DECL|OAR2|member|__IO uint32_t OAR2; /*!< I2C Own address 2 register, Address offset: 0x0C */
DECL|ODR|member|__IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */
DECL|OPTCR1|member|__IO uint32_t OPTCR1; /*!< FLASH option control register 1 , Address offset: 0x18 */
DECL|OPTCR2|member|__IO uint32_t OPTCR2; /*!< FLASH option control register 2 , Address offset: 0x1C */
DECL|OPTCR|member|__IO uint32_t OPTCR; /*!< FLASH option control register , Address offset: 0x14 */
DECL|OPTKEYR|member|__IO uint32_t OPTKEYR; /*!< FLASH option key register, Address offset: 0x08 */
DECL|OR|member|__IO uint32_t OR; /*!< RTC option register, Address offset: 0x4C */
DECL|OR|member|__IO uint32_t OR; /*!< TIM option register, Address offset: 0x50 */
DECL|OSPEEDR|member|__IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08 */
DECL|OTG_FS_IRQn|enumerator|OTG_FS_IRQn = 67, /*!< USB OTG FS global Interrupt */
DECL|OTG_FS_WKUP_IRQn|enumerator|OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS Wakeup through EXTI line interrupt */
DECL|OTG_HS_EP1_IN_IRQn|enumerator|OTG_HS_EP1_IN_IRQn = 75, /*!< USB OTG HS End Point 1 In global interrupt */
DECL|OTG_HS_EP1_OUT_IRQn|enumerator|OTG_HS_EP1_OUT_IRQn = 74, /*!< USB OTG HS End Point 1 Out global interrupt */
DECL|OTG_HS_IRQn|enumerator|OTG_HS_IRQn = 77, /*!< USB OTG HS global interrupt */
DECL|OTG_HS_WKUP_IRQn|enumerator|OTG_HS_WKUP_IRQn = 76, /*!< USB OTG HS Wakeup through EXTI interrupt */
DECL|OTYPER|member|__IO uint32_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */
DECL|PACKAGESIZE_BASE|macro|PACKAGESIZE_BASE
DECL|PACKAGE_BASE|macro|PACKAGE_BASE
DECL|PAR|member|__IO uint32_t PAR; /*!< DMA stream x peripheral address register */
DECL|PATT|member|__IO uint32_t PATT; /*!< NAND Flash Attribute memory space timing register, Address offset: 0x8C */
DECL|PCR|member|__IO uint32_t PCR; /*!< NAND Flash control register, Address offset: 0x80 */
DECL|PECR|member|__IO uint32_t PECR; /*!< I2C PEC register, Address offset: 0x20 */
DECL|PERIPH_BASE|macro|PERIPH_BASE
DECL|PIR|member|__IO uint32_t PIR; /*!< QUADSPI Polling Interval register, Address offset: 0x2C */
DECL|PLLCFGR|member|__IO uint32_t PLLCFGR; /*!< RCC PLL configuration register, Address offset: 0x04 */
DECL|PLLI2SCFGR|member|__IO uint32_t PLLI2SCFGR; /*!< RCC PLLI2S configuration register, Address offset: 0x84 */
DECL|PLLSAICFGR|member|__IO uint32_t PLLSAICFGR; /*!< RCC PLLSAI configuration register, Address offset: 0x88 */
DECL|PMC|member|__IO uint32_t PMC; /*!< SYSCFG peripheral mode configuration register, Address offset: 0x04 */
DECL|PMEM|member|__IO uint32_t PMEM; /*!< NAND Flash Common memory space timing register, Address offset: 0x88 */
DECL|POL|member|__IO uint32_t POL; /*!< CRC polynomial register, Address offset: 0x14 */
DECL|POWER|member|__IO uint32_t POWER; /*!< SDMMC power control register, Address offset: 0x00 */
DECL|PRER|member|__IO uint32_t PRER; /*!< RTC prescaler register, Address offset: 0x10 */
DECL|PR|member|__IO uint32_t PR; /*!< EXTI Pending register, Address offset: 0x14 */
DECL|PR|member|__IO uint32_t PR; /*!< IWDG Prescaler register, Address offset: 0x04 */
DECL|PSC|member|__IO uint32_t PSC; /*!< TIM prescaler, Address offset: 0x28 */
DECL|PSMAR|member|__IO uint32_t PSMAR; /*!< QUADSPI Polling Status Match register, Address offset: 0x28 */
DECL|PSMKR|member|__IO uint32_t PSMKR; /*!< QUADSPI Polling Status Mask register, Address offset: 0x24 */
DECL|PUPDR|member|__IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */
DECL|PVD_IRQn|enumerator|PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */
DECL|PWR_BASE|macro|PWR_BASE
DECL|PWR_CR1_ADCDC1_Msk|macro|PWR_CR1_ADCDC1_Msk
DECL|PWR_CR1_ADCDC1_Pos|macro|PWR_CR1_ADCDC1_Pos
DECL|PWR_CR1_ADCDC1|macro|PWR_CR1_ADCDC1
DECL|PWR_CR1_CSBF_Msk|macro|PWR_CR1_CSBF_Msk
DECL|PWR_CR1_CSBF_Pos|macro|PWR_CR1_CSBF_Pos
DECL|PWR_CR1_CSBF|macro|PWR_CR1_CSBF
DECL|PWR_CR1_DBP_Msk|macro|PWR_CR1_DBP_Msk
DECL|PWR_CR1_DBP_Pos|macro|PWR_CR1_DBP_Pos
DECL|PWR_CR1_DBP|macro|PWR_CR1_DBP
DECL|PWR_CR1_FPDS_Msk|macro|PWR_CR1_FPDS_Msk
DECL|PWR_CR1_FPDS_Pos|macro|PWR_CR1_FPDS_Pos
DECL|PWR_CR1_FPDS|macro|PWR_CR1_FPDS
DECL|PWR_CR1_LPDS_Msk|macro|PWR_CR1_LPDS_Msk
DECL|PWR_CR1_LPDS_Pos|macro|PWR_CR1_LPDS_Pos
DECL|PWR_CR1_LPDS|macro|PWR_CR1_LPDS
DECL|PWR_CR1_LPUDS_Msk|macro|PWR_CR1_LPUDS_Msk
DECL|PWR_CR1_LPUDS_Pos|macro|PWR_CR1_LPUDS_Pos
DECL|PWR_CR1_LPUDS|macro|PWR_CR1_LPUDS
DECL|PWR_CR1_MRUDS_Msk|macro|PWR_CR1_MRUDS_Msk
DECL|PWR_CR1_MRUDS_Pos|macro|PWR_CR1_MRUDS_Pos
DECL|PWR_CR1_MRUDS|macro|PWR_CR1_MRUDS
DECL|PWR_CR1_ODEN_Msk|macro|PWR_CR1_ODEN_Msk
DECL|PWR_CR1_ODEN_Pos|macro|PWR_CR1_ODEN_Pos
DECL|PWR_CR1_ODEN|macro|PWR_CR1_ODEN
DECL|PWR_CR1_ODSWEN_Msk|macro|PWR_CR1_ODSWEN_Msk
DECL|PWR_CR1_ODSWEN_Pos|macro|PWR_CR1_ODSWEN_Pos
DECL|PWR_CR1_ODSWEN|macro|PWR_CR1_ODSWEN
DECL|PWR_CR1_PDDS_Msk|macro|PWR_CR1_PDDS_Msk
DECL|PWR_CR1_PDDS_Pos|macro|PWR_CR1_PDDS_Pos
DECL|PWR_CR1_PDDS|macro|PWR_CR1_PDDS
DECL|PWR_CR1_PLS_0|macro|PWR_CR1_PLS_0
DECL|PWR_CR1_PLS_1|macro|PWR_CR1_PLS_1
DECL|PWR_CR1_PLS_2|macro|PWR_CR1_PLS_2
DECL|PWR_CR1_PLS_LEV0|macro|PWR_CR1_PLS_LEV0
DECL|PWR_CR1_PLS_LEV1_Msk|macro|PWR_CR1_PLS_LEV1_Msk
DECL|PWR_CR1_PLS_LEV1_Pos|macro|PWR_CR1_PLS_LEV1_Pos
DECL|PWR_CR1_PLS_LEV1|macro|PWR_CR1_PLS_LEV1
DECL|PWR_CR1_PLS_LEV2_Msk|macro|PWR_CR1_PLS_LEV2_Msk
DECL|PWR_CR1_PLS_LEV2_Pos|macro|PWR_CR1_PLS_LEV2_Pos
DECL|PWR_CR1_PLS_LEV2|macro|PWR_CR1_PLS_LEV2
DECL|PWR_CR1_PLS_LEV3_Msk|macro|PWR_CR1_PLS_LEV3_Msk
DECL|PWR_CR1_PLS_LEV3_Pos|macro|PWR_CR1_PLS_LEV3_Pos
DECL|PWR_CR1_PLS_LEV3|macro|PWR_CR1_PLS_LEV3
DECL|PWR_CR1_PLS_LEV4_Msk|macro|PWR_CR1_PLS_LEV4_Msk
DECL|PWR_CR1_PLS_LEV4_Pos|macro|PWR_CR1_PLS_LEV4_Pos
DECL|PWR_CR1_PLS_LEV4|macro|PWR_CR1_PLS_LEV4
DECL|PWR_CR1_PLS_LEV5_Msk|macro|PWR_CR1_PLS_LEV5_Msk
DECL|PWR_CR1_PLS_LEV5_Pos|macro|PWR_CR1_PLS_LEV5_Pos
DECL|PWR_CR1_PLS_LEV5|macro|PWR_CR1_PLS_LEV5
DECL|PWR_CR1_PLS_LEV6_Msk|macro|PWR_CR1_PLS_LEV6_Msk
DECL|PWR_CR1_PLS_LEV6_Pos|macro|PWR_CR1_PLS_LEV6_Pos
DECL|PWR_CR1_PLS_LEV6|macro|PWR_CR1_PLS_LEV6
DECL|PWR_CR1_PLS_LEV7_Msk|macro|PWR_CR1_PLS_LEV7_Msk
DECL|PWR_CR1_PLS_LEV7_Pos|macro|PWR_CR1_PLS_LEV7_Pos
DECL|PWR_CR1_PLS_LEV7|macro|PWR_CR1_PLS_LEV7
DECL|PWR_CR1_PLS_Msk|macro|PWR_CR1_PLS_Msk
DECL|PWR_CR1_PLS_Pos|macro|PWR_CR1_PLS_Pos
DECL|PWR_CR1_PLS|macro|PWR_CR1_PLS
DECL|PWR_CR1_PVDE_Msk|macro|PWR_CR1_PVDE_Msk
DECL|PWR_CR1_PVDE_Pos|macro|PWR_CR1_PVDE_Pos
DECL|PWR_CR1_PVDE|macro|PWR_CR1_PVDE
DECL|PWR_CR1_UDEN_0|macro|PWR_CR1_UDEN_0
DECL|PWR_CR1_UDEN_1|macro|PWR_CR1_UDEN_1
DECL|PWR_CR1_UDEN_Msk|macro|PWR_CR1_UDEN_Msk
DECL|PWR_CR1_UDEN_Pos|macro|PWR_CR1_UDEN_Pos
DECL|PWR_CR1_UDEN|macro|PWR_CR1_UDEN
DECL|PWR_CR1_VOS_0|macro|PWR_CR1_VOS_0
DECL|PWR_CR1_VOS_1|macro|PWR_CR1_VOS_1
DECL|PWR_CR1_VOS_Msk|macro|PWR_CR1_VOS_Msk
DECL|PWR_CR1_VOS_Pos|macro|PWR_CR1_VOS_Pos
DECL|PWR_CR1_VOS|macro|PWR_CR1_VOS
DECL|PWR_CR2_CWUPF1_Msk|macro|PWR_CR2_CWUPF1_Msk
DECL|PWR_CR2_CWUPF1_Pos|macro|PWR_CR2_CWUPF1_Pos
DECL|PWR_CR2_CWUPF1|macro|PWR_CR2_CWUPF1
DECL|PWR_CR2_CWUPF2_Msk|macro|PWR_CR2_CWUPF2_Msk
DECL|PWR_CR2_CWUPF2_Pos|macro|PWR_CR2_CWUPF2_Pos
DECL|PWR_CR2_CWUPF2|macro|PWR_CR2_CWUPF2
DECL|PWR_CR2_CWUPF3_Msk|macro|PWR_CR2_CWUPF3_Msk
DECL|PWR_CR2_CWUPF3_Pos|macro|PWR_CR2_CWUPF3_Pos
DECL|PWR_CR2_CWUPF3|macro|PWR_CR2_CWUPF3
DECL|PWR_CR2_CWUPF4_Msk|macro|PWR_CR2_CWUPF4_Msk
DECL|PWR_CR2_CWUPF4_Pos|macro|PWR_CR2_CWUPF4_Pos
DECL|PWR_CR2_CWUPF4|macro|PWR_CR2_CWUPF4
DECL|PWR_CR2_CWUPF5_Msk|macro|PWR_CR2_CWUPF5_Msk
DECL|PWR_CR2_CWUPF5_Pos|macro|PWR_CR2_CWUPF5_Pos
DECL|PWR_CR2_CWUPF5|macro|PWR_CR2_CWUPF5
DECL|PWR_CR2_CWUPF6_Msk|macro|PWR_CR2_CWUPF6_Msk
DECL|PWR_CR2_CWUPF6_Pos|macro|PWR_CR2_CWUPF6_Pos
DECL|PWR_CR2_CWUPF6|macro|PWR_CR2_CWUPF6
DECL|PWR_CR2_WUPP1_Msk|macro|PWR_CR2_WUPP1_Msk
DECL|PWR_CR2_WUPP1_Pos|macro|PWR_CR2_WUPP1_Pos
DECL|PWR_CR2_WUPP1|macro|PWR_CR2_WUPP1
DECL|PWR_CR2_WUPP2_Msk|macro|PWR_CR2_WUPP2_Msk
DECL|PWR_CR2_WUPP2_Pos|macro|PWR_CR2_WUPP2_Pos
DECL|PWR_CR2_WUPP2|macro|PWR_CR2_WUPP2
DECL|PWR_CR2_WUPP3_Msk|macro|PWR_CR2_WUPP3_Msk
DECL|PWR_CR2_WUPP3_Pos|macro|PWR_CR2_WUPP3_Pos
DECL|PWR_CR2_WUPP3|macro|PWR_CR2_WUPP3
DECL|PWR_CR2_WUPP4_Msk|macro|PWR_CR2_WUPP4_Msk
DECL|PWR_CR2_WUPP4_Pos|macro|PWR_CR2_WUPP4_Pos
DECL|PWR_CR2_WUPP4|macro|PWR_CR2_WUPP4
DECL|PWR_CR2_WUPP5_Msk|macro|PWR_CR2_WUPP5_Msk
DECL|PWR_CR2_WUPP5_Pos|macro|PWR_CR2_WUPP5_Pos
DECL|PWR_CR2_WUPP5|macro|PWR_CR2_WUPP5
DECL|PWR_CR2_WUPP6_Msk|macro|PWR_CR2_WUPP6_Msk
DECL|PWR_CR2_WUPP6_Pos|macro|PWR_CR2_WUPP6_Pos
DECL|PWR_CR2_WUPP6|macro|PWR_CR2_WUPP6
DECL|PWR_CSR1_BRE_Msk|macro|PWR_CSR1_BRE_Msk
DECL|PWR_CSR1_BRE_Pos|macro|PWR_CSR1_BRE_Pos
DECL|PWR_CSR1_BRE|macro|PWR_CSR1_BRE
DECL|PWR_CSR1_BRR_Msk|macro|PWR_CSR1_BRR_Msk
DECL|PWR_CSR1_BRR_Pos|macro|PWR_CSR1_BRR_Pos
DECL|PWR_CSR1_BRR|macro|PWR_CSR1_BRR
DECL|PWR_CSR1_EIWUP_Msk|macro|PWR_CSR1_EIWUP_Msk
DECL|PWR_CSR1_EIWUP_Pos|macro|PWR_CSR1_EIWUP_Pos
DECL|PWR_CSR1_EIWUP|macro|PWR_CSR1_EIWUP
DECL|PWR_CSR1_ODRDY_Msk|macro|PWR_CSR1_ODRDY_Msk
DECL|PWR_CSR1_ODRDY_Pos|macro|PWR_CSR1_ODRDY_Pos
DECL|PWR_CSR1_ODRDY|macro|PWR_CSR1_ODRDY
DECL|PWR_CSR1_ODSWRDY_Msk|macro|PWR_CSR1_ODSWRDY_Msk
DECL|PWR_CSR1_ODSWRDY_Pos|macro|PWR_CSR1_ODSWRDY_Pos
DECL|PWR_CSR1_ODSWRDY|macro|PWR_CSR1_ODSWRDY
DECL|PWR_CSR1_PVDO_Msk|macro|PWR_CSR1_PVDO_Msk
DECL|PWR_CSR1_PVDO_Pos|macro|PWR_CSR1_PVDO_Pos
DECL|PWR_CSR1_PVDO|macro|PWR_CSR1_PVDO
DECL|PWR_CSR1_SBF_Msk|macro|PWR_CSR1_SBF_Msk
DECL|PWR_CSR1_SBF_Pos|macro|PWR_CSR1_SBF_Pos
DECL|PWR_CSR1_SBF|macro|PWR_CSR1_SBF
DECL|PWR_CSR1_UDRDY_Msk|macro|PWR_CSR1_UDRDY_Msk
DECL|PWR_CSR1_UDRDY_Pos|macro|PWR_CSR1_UDRDY_Pos
DECL|PWR_CSR1_UDRDY|macro|PWR_CSR1_UDRDY
DECL|PWR_CSR1_VOSRDY_Msk|macro|PWR_CSR1_VOSRDY_Msk
DECL|PWR_CSR1_VOSRDY_Pos|macro|PWR_CSR1_VOSRDY_Pos
DECL|PWR_CSR1_VOSRDY|macro|PWR_CSR1_VOSRDY
DECL|PWR_CSR1_WUIF_Msk|macro|PWR_CSR1_WUIF_Msk
DECL|PWR_CSR1_WUIF_Pos|macro|PWR_CSR1_WUIF_Pos
DECL|PWR_CSR1_WUIF|macro|PWR_CSR1_WUIF
DECL|PWR_CSR2_EWUP1_Msk|macro|PWR_CSR2_EWUP1_Msk
DECL|PWR_CSR2_EWUP1_Pos|macro|PWR_CSR2_EWUP1_Pos
DECL|PWR_CSR2_EWUP1|macro|PWR_CSR2_EWUP1
DECL|PWR_CSR2_EWUP2_Msk|macro|PWR_CSR2_EWUP2_Msk
DECL|PWR_CSR2_EWUP2_Pos|macro|PWR_CSR2_EWUP2_Pos
DECL|PWR_CSR2_EWUP2|macro|PWR_CSR2_EWUP2
DECL|PWR_CSR2_EWUP3_Msk|macro|PWR_CSR2_EWUP3_Msk
DECL|PWR_CSR2_EWUP3_Pos|macro|PWR_CSR2_EWUP3_Pos
DECL|PWR_CSR2_EWUP3|macro|PWR_CSR2_EWUP3
DECL|PWR_CSR2_EWUP4_Msk|macro|PWR_CSR2_EWUP4_Msk
DECL|PWR_CSR2_EWUP4_Pos|macro|PWR_CSR2_EWUP4_Pos
DECL|PWR_CSR2_EWUP4|macro|PWR_CSR2_EWUP4
DECL|PWR_CSR2_EWUP5_Msk|macro|PWR_CSR2_EWUP5_Msk
DECL|PWR_CSR2_EWUP5_Pos|macro|PWR_CSR2_EWUP5_Pos
DECL|PWR_CSR2_EWUP5|macro|PWR_CSR2_EWUP5
DECL|PWR_CSR2_EWUP6_Msk|macro|PWR_CSR2_EWUP6_Msk
DECL|PWR_CSR2_EWUP6_Pos|macro|PWR_CSR2_EWUP6_Pos
DECL|PWR_CSR2_EWUP6|macro|PWR_CSR2_EWUP6
DECL|PWR_CSR2_WUPF1_Msk|macro|PWR_CSR2_WUPF1_Msk
DECL|PWR_CSR2_WUPF1_Pos|macro|PWR_CSR2_WUPF1_Pos
DECL|PWR_CSR2_WUPF1|macro|PWR_CSR2_WUPF1
DECL|PWR_CSR2_WUPF2_Msk|macro|PWR_CSR2_WUPF2_Msk
DECL|PWR_CSR2_WUPF2_Pos|macro|PWR_CSR2_WUPF2_Pos
DECL|PWR_CSR2_WUPF2|macro|PWR_CSR2_WUPF2
DECL|PWR_CSR2_WUPF3_Msk|macro|PWR_CSR2_WUPF3_Msk
DECL|PWR_CSR2_WUPF3_Pos|macro|PWR_CSR2_WUPF3_Pos
DECL|PWR_CSR2_WUPF3|macro|PWR_CSR2_WUPF3
DECL|PWR_CSR2_WUPF4_Msk|macro|PWR_CSR2_WUPF4_Msk
DECL|PWR_CSR2_WUPF4_Pos|macro|PWR_CSR2_WUPF4_Pos
DECL|PWR_CSR2_WUPF4|macro|PWR_CSR2_WUPF4
DECL|PWR_CSR2_WUPF5_Msk|macro|PWR_CSR2_WUPF5_Msk
DECL|PWR_CSR2_WUPF5_Pos|macro|PWR_CSR2_WUPF5_Pos
DECL|PWR_CSR2_WUPF5|macro|PWR_CSR2_WUPF5
DECL|PWR_CSR2_WUPF6_Msk|macro|PWR_CSR2_WUPF6_Msk
DECL|PWR_CSR2_WUPF6_Pos|macro|PWR_CSR2_WUPF6_Pos
DECL|PWR_CSR2_WUPF6|macro|PWR_CSR2_WUPF6
DECL|PWR_TypeDef|typedef|} PWR_TypeDef;
DECL|PWR|macro|PWR
DECL|PendSV_IRQn|enumerator|PendSV_IRQn = -2, /*!< 14 Cortex-M7 Pend SV Interrupt */
DECL|QSPI_BASE|macro|QSPI_BASE
DECL|QSPI_R_BASE|macro|QSPI_R_BASE
DECL|QUADSPI_ABR_ALTERNATE_Msk|macro|QUADSPI_ABR_ALTERNATE_Msk
DECL|QUADSPI_ABR_ALTERNATE_Pos|macro|QUADSPI_ABR_ALTERNATE_Pos
DECL|QUADSPI_ABR_ALTERNATE|macro|QUADSPI_ABR_ALTERNATE
DECL|QUADSPI_AR_ADDRESS_Msk|macro|QUADSPI_AR_ADDRESS_Msk
DECL|QUADSPI_AR_ADDRESS_Pos|macro|QUADSPI_AR_ADDRESS_Pos
DECL|QUADSPI_AR_ADDRESS|macro|QUADSPI_AR_ADDRESS
DECL|QUADSPI_CCR_ABMODE_0|macro|QUADSPI_CCR_ABMODE_0
DECL|QUADSPI_CCR_ABMODE_1|macro|QUADSPI_CCR_ABMODE_1
DECL|QUADSPI_CCR_ABMODE_Msk|macro|QUADSPI_CCR_ABMODE_Msk
DECL|QUADSPI_CCR_ABMODE_Pos|macro|QUADSPI_CCR_ABMODE_Pos
DECL|QUADSPI_CCR_ABMODE|macro|QUADSPI_CCR_ABMODE
DECL|QUADSPI_CCR_ABSIZE_0|macro|QUADSPI_CCR_ABSIZE_0
DECL|QUADSPI_CCR_ABSIZE_1|macro|QUADSPI_CCR_ABSIZE_1
DECL|QUADSPI_CCR_ABSIZE_Msk|macro|QUADSPI_CCR_ABSIZE_Msk
DECL|QUADSPI_CCR_ABSIZE_Pos|macro|QUADSPI_CCR_ABSIZE_Pos
DECL|QUADSPI_CCR_ABSIZE|macro|QUADSPI_CCR_ABSIZE
DECL|QUADSPI_CCR_ADMODE_0|macro|QUADSPI_CCR_ADMODE_0
DECL|QUADSPI_CCR_ADMODE_1|macro|QUADSPI_CCR_ADMODE_1
DECL|QUADSPI_CCR_ADMODE_Msk|macro|QUADSPI_CCR_ADMODE_Msk
DECL|QUADSPI_CCR_ADMODE_Pos|macro|QUADSPI_CCR_ADMODE_Pos
DECL|QUADSPI_CCR_ADMODE|macro|QUADSPI_CCR_ADMODE
DECL|QUADSPI_CCR_ADSIZE_0|macro|QUADSPI_CCR_ADSIZE_0
DECL|QUADSPI_CCR_ADSIZE_1|macro|QUADSPI_CCR_ADSIZE_1
DECL|QUADSPI_CCR_ADSIZE_Msk|macro|QUADSPI_CCR_ADSIZE_Msk
DECL|QUADSPI_CCR_ADSIZE_Pos|macro|QUADSPI_CCR_ADSIZE_Pos
DECL|QUADSPI_CCR_ADSIZE|macro|QUADSPI_CCR_ADSIZE
DECL|QUADSPI_CCR_DCYC_0|macro|QUADSPI_CCR_DCYC_0
DECL|QUADSPI_CCR_DCYC_1|macro|QUADSPI_CCR_DCYC_1
DECL|QUADSPI_CCR_DCYC_2|macro|QUADSPI_CCR_DCYC_2
DECL|QUADSPI_CCR_DCYC_3|macro|QUADSPI_CCR_DCYC_3
DECL|QUADSPI_CCR_DCYC_4|macro|QUADSPI_CCR_DCYC_4
DECL|QUADSPI_CCR_DCYC_Msk|macro|QUADSPI_CCR_DCYC_Msk
DECL|QUADSPI_CCR_DCYC_Pos|macro|QUADSPI_CCR_DCYC_Pos
DECL|QUADSPI_CCR_DCYC|macro|QUADSPI_CCR_DCYC
DECL|QUADSPI_CCR_DDRM_Msk|macro|QUADSPI_CCR_DDRM_Msk
DECL|QUADSPI_CCR_DDRM_Pos|macro|QUADSPI_CCR_DDRM_Pos
DECL|QUADSPI_CCR_DDRM|macro|QUADSPI_CCR_DDRM
DECL|QUADSPI_CCR_DHHC_Msk|macro|QUADSPI_CCR_DHHC_Msk
DECL|QUADSPI_CCR_DHHC_Pos|macro|QUADSPI_CCR_DHHC_Pos
DECL|QUADSPI_CCR_DHHC|macro|QUADSPI_CCR_DHHC
DECL|QUADSPI_CCR_DMODE_0|macro|QUADSPI_CCR_DMODE_0
DECL|QUADSPI_CCR_DMODE_1|macro|QUADSPI_CCR_DMODE_1
DECL|QUADSPI_CCR_DMODE_Msk|macro|QUADSPI_CCR_DMODE_Msk
DECL|QUADSPI_CCR_DMODE_Pos|macro|QUADSPI_CCR_DMODE_Pos
DECL|QUADSPI_CCR_DMODE|macro|QUADSPI_CCR_DMODE
DECL|QUADSPI_CCR_FMODE_0|macro|QUADSPI_CCR_FMODE_0
DECL|QUADSPI_CCR_FMODE_1|macro|QUADSPI_CCR_FMODE_1
DECL|QUADSPI_CCR_FMODE_Msk|macro|QUADSPI_CCR_FMODE_Msk
DECL|QUADSPI_CCR_FMODE_Pos|macro|QUADSPI_CCR_FMODE_Pos
DECL|QUADSPI_CCR_FMODE|macro|QUADSPI_CCR_FMODE
DECL|QUADSPI_CCR_IMODE_0|macro|QUADSPI_CCR_IMODE_0
DECL|QUADSPI_CCR_IMODE_1|macro|QUADSPI_CCR_IMODE_1
DECL|QUADSPI_CCR_IMODE_Msk|macro|QUADSPI_CCR_IMODE_Msk
DECL|QUADSPI_CCR_IMODE_Pos|macro|QUADSPI_CCR_IMODE_Pos
DECL|QUADSPI_CCR_IMODE|macro|QUADSPI_CCR_IMODE
DECL|QUADSPI_CCR_INSTRUCTION_0|macro|QUADSPI_CCR_INSTRUCTION_0
DECL|QUADSPI_CCR_INSTRUCTION_1|macro|QUADSPI_CCR_INSTRUCTION_1
DECL|QUADSPI_CCR_INSTRUCTION_2|macro|QUADSPI_CCR_INSTRUCTION_2
DECL|QUADSPI_CCR_INSTRUCTION_3|macro|QUADSPI_CCR_INSTRUCTION_3
DECL|QUADSPI_CCR_INSTRUCTION_4|macro|QUADSPI_CCR_INSTRUCTION_4
DECL|QUADSPI_CCR_INSTRUCTION_5|macro|QUADSPI_CCR_INSTRUCTION_5
DECL|QUADSPI_CCR_INSTRUCTION_6|macro|QUADSPI_CCR_INSTRUCTION_6
DECL|QUADSPI_CCR_INSTRUCTION_7|macro|QUADSPI_CCR_INSTRUCTION_7
DECL|QUADSPI_CCR_INSTRUCTION_Msk|macro|QUADSPI_CCR_INSTRUCTION_Msk
DECL|QUADSPI_CCR_INSTRUCTION_Pos|macro|QUADSPI_CCR_INSTRUCTION_Pos
DECL|QUADSPI_CCR_INSTRUCTION|macro|QUADSPI_CCR_INSTRUCTION
DECL|QUADSPI_CCR_SIOO_Msk|macro|QUADSPI_CCR_SIOO_Msk
DECL|QUADSPI_CCR_SIOO_Pos|macro|QUADSPI_CCR_SIOO_Pos
DECL|QUADSPI_CCR_SIOO|macro|QUADSPI_CCR_SIOO
DECL|QUADSPI_CR_ABORT_Msk|macro|QUADSPI_CR_ABORT_Msk
DECL|QUADSPI_CR_ABORT_Pos|macro|QUADSPI_CR_ABORT_Pos
DECL|QUADSPI_CR_ABORT|macro|QUADSPI_CR_ABORT
DECL|QUADSPI_CR_APMS_Msk|macro|QUADSPI_CR_APMS_Msk
DECL|QUADSPI_CR_APMS_Pos|macro|QUADSPI_CR_APMS_Pos
DECL|QUADSPI_CR_APMS|macro|QUADSPI_CR_APMS
DECL|QUADSPI_CR_DFM_Msk|macro|QUADSPI_CR_DFM_Msk
DECL|QUADSPI_CR_DFM_Pos|macro|QUADSPI_CR_DFM_Pos
DECL|QUADSPI_CR_DFM|macro|QUADSPI_CR_DFM
DECL|QUADSPI_CR_DMAEN_Msk|macro|QUADSPI_CR_DMAEN_Msk
DECL|QUADSPI_CR_DMAEN_Pos|macro|QUADSPI_CR_DMAEN_Pos
DECL|QUADSPI_CR_DMAEN|macro|QUADSPI_CR_DMAEN
DECL|QUADSPI_CR_EN_Msk|macro|QUADSPI_CR_EN_Msk
DECL|QUADSPI_CR_EN_Pos|macro|QUADSPI_CR_EN_Pos
DECL|QUADSPI_CR_EN|macro|QUADSPI_CR_EN
DECL|QUADSPI_CR_FSEL_Msk|macro|QUADSPI_CR_FSEL_Msk
DECL|QUADSPI_CR_FSEL_Pos|macro|QUADSPI_CR_FSEL_Pos
DECL|QUADSPI_CR_FSEL|macro|QUADSPI_CR_FSEL
DECL|QUADSPI_CR_FTHRES_0|macro|QUADSPI_CR_FTHRES_0
DECL|QUADSPI_CR_FTHRES_1|macro|QUADSPI_CR_FTHRES_1
DECL|QUADSPI_CR_FTHRES_2|macro|QUADSPI_CR_FTHRES_2
DECL|QUADSPI_CR_FTHRES_3|macro|QUADSPI_CR_FTHRES_3
DECL|QUADSPI_CR_FTHRES_4|macro|QUADSPI_CR_FTHRES_4
DECL|QUADSPI_CR_FTHRES_Msk|macro|QUADSPI_CR_FTHRES_Msk
DECL|QUADSPI_CR_FTHRES_Pos|macro|QUADSPI_CR_FTHRES_Pos
DECL|QUADSPI_CR_FTHRES|macro|QUADSPI_CR_FTHRES
DECL|QUADSPI_CR_FTIE_Msk|macro|QUADSPI_CR_FTIE_Msk
DECL|QUADSPI_CR_FTIE_Pos|macro|QUADSPI_CR_FTIE_Pos
DECL|QUADSPI_CR_FTIE|macro|QUADSPI_CR_FTIE
DECL|QUADSPI_CR_PMM_Msk|macro|QUADSPI_CR_PMM_Msk
DECL|QUADSPI_CR_PMM_Pos|macro|QUADSPI_CR_PMM_Pos
DECL|QUADSPI_CR_PMM|macro|QUADSPI_CR_PMM
DECL|QUADSPI_CR_PRESCALER_0|macro|QUADSPI_CR_PRESCALER_0
DECL|QUADSPI_CR_PRESCALER_1|macro|QUADSPI_CR_PRESCALER_1
DECL|QUADSPI_CR_PRESCALER_2|macro|QUADSPI_CR_PRESCALER_2
DECL|QUADSPI_CR_PRESCALER_3|macro|QUADSPI_CR_PRESCALER_3
DECL|QUADSPI_CR_PRESCALER_4|macro|QUADSPI_CR_PRESCALER_4
DECL|QUADSPI_CR_PRESCALER_5|macro|QUADSPI_CR_PRESCALER_5
DECL|QUADSPI_CR_PRESCALER_6|macro|QUADSPI_CR_PRESCALER_6
DECL|QUADSPI_CR_PRESCALER_7|macro|QUADSPI_CR_PRESCALER_7
DECL|QUADSPI_CR_PRESCALER_Msk|macro|QUADSPI_CR_PRESCALER_Msk
DECL|QUADSPI_CR_PRESCALER_Pos|macro|QUADSPI_CR_PRESCALER_Pos
DECL|QUADSPI_CR_PRESCALER|macro|QUADSPI_CR_PRESCALER
DECL|QUADSPI_CR_SMIE_Msk|macro|QUADSPI_CR_SMIE_Msk
DECL|QUADSPI_CR_SMIE_Pos|macro|QUADSPI_CR_SMIE_Pos
DECL|QUADSPI_CR_SMIE|macro|QUADSPI_CR_SMIE
DECL|QUADSPI_CR_SSHIFT_Msk|macro|QUADSPI_CR_SSHIFT_Msk
DECL|QUADSPI_CR_SSHIFT_Pos|macro|QUADSPI_CR_SSHIFT_Pos
DECL|QUADSPI_CR_SSHIFT|macro|QUADSPI_CR_SSHIFT
DECL|QUADSPI_CR_TCEN_Msk|macro|QUADSPI_CR_TCEN_Msk
DECL|QUADSPI_CR_TCEN_Pos|macro|QUADSPI_CR_TCEN_Pos
DECL|QUADSPI_CR_TCEN|macro|QUADSPI_CR_TCEN
DECL|QUADSPI_CR_TCIE_Msk|macro|QUADSPI_CR_TCIE_Msk
DECL|QUADSPI_CR_TCIE_Pos|macro|QUADSPI_CR_TCIE_Pos
DECL|QUADSPI_CR_TCIE|macro|QUADSPI_CR_TCIE
DECL|QUADSPI_CR_TEIE_Msk|macro|QUADSPI_CR_TEIE_Msk
DECL|QUADSPI_CR_TEIE_Pos|macro|QUADSPI_CR_TEIE_Pos
DECL|QUADSPI_CR_TEIE|macro|QUADSPI_CR_TEIE
DECL|QUADSPI_CR_TOIE_Msk|macro|QUADSPI_CR_TOIE_Msk
DECL|QUADSPI_CR_TOIE_Pos|macro|QUADSPI_CR_TOIE_Pos
DECL|QUADSPI_CR_TOIE|macro|QUADSPI_CR_TOIE
DECL|QUADSPI_DCR_CKMODE_Msk|macro|QUADSPI_DCR_CKMODE_Msk
DECL|QUADSPI_DCR_CKMODE_Pos|macro|QUADSPI_DCR_CKMODE_Pos
DECL|QUADSPI_DCR_CKMODE|macro|QUADSPI_DCR_CKMODE
DECL|QUADSPI_DCR_CSHT_0|macro|QUADSPI_DCR_CSHT_0
DECL|QUADSPI_DCR_CSHT_1|macro|QUADSPI_DCR_CSHT_1
DECL|QUADSPI_DCR_CSHT_2|macro|QUADSPI_DCR_CSHT_2
DECL|QUADSPI_DCR_CSHT_Msk|macro|QUADSPI_DCR_CSHT_Msk
DECL|QUADSPI_DCR_CSHT_Pos|macro|QUADSPI_DCR_CSHT_Pos
DECL|QUADSPI_DCR_CSHT|macro|QUADSPI_DCR_CSHT
DECL|QUADSPI_DCR_FSIZE_0|macro|QUADSPI_DCR_FSIZE_0
DECL|QUADSPI_DCR_FSIZE_1|macro|QUADSPI_DCR_FSIZE_1
DECL|QUADSPI_DCR_FSIZE_2|macro|QUADSPI_DCR_FSIZE_2
DECL|QUADSPI_DCR_FSIZE_3|macro|QUADSPI_DCR_FSIZE_3
DECL|QUADSPI_DCR_FSIZE_4|macro|QUADSPI_DCR_FSIZE_4
DECL|QUADSPI_DCR_FSIZE_Msk|macro|QUADSPI_DCR_FSIZE_Msk
DECL|QUADSPI_DCR_FSIZE_Pos|macro|QUADSPI_DCR_FSIZE_Pos
DECL|QUADSPI_DCR_FSIZE|macro|QUADSPI_DCR_FSIZE
DECL|QUADSPI_DLR_DL_Msk|macro|QUADSPI_DLR_DL_Msk
DECL|QUADSPI_DLR_DL_Pos|macro|QUADSPI_DLR_DL_Pos
DECL|QUADSPI_DLR_DL|macro|QUADSPI_DLR_DL
DECL|QUADSPI_DR_DATA_Msk|macro|QUADSPI_DR_DATA_Msk
DECL|QUADSPI_DR_DATA_Pos|macro|QUADSPI_DR_DATA_Pos
DECL|QUADSPI_DR_DATA|macro|QUADSPI_DR_DATA
DECL|QUADSPI_FCR_CSMF_Msk|macro|QUADSPI_FCR_CSMF_Msk
DECL|QUADSPI_FCR_CSMF_Pos|macro|QUADSPI_FCR_CSMF_Pos
DECL|QUADSPI_FCR_CSMF|macro|QUADSPI_FCR_CSMF
DECL|QUADSPI_FCR_CTCF_Msk|macro|QUADSPI_FCR_CTCF_Msk
DECL|QUADSPI_FCR_CTCF_Pos|macro|QUADSPI_FCR_CTCF_Pos
DECL|QUADSPI_FCR_CTCF|macro|QUADSPI_FCR_CTCF
DECL|QUADSPI_FCR_CTEF_Msk|macro|QUADSPI_FCR_CTEF_Msk
DECL|QUADSPI_FCR_CTEF_Pos|macro|QUADSPI_FCR_CTEF_Pos
DECL|QUADSPI_FCR_CTEF|macro|QUADSPI_FCR_CTEF
DECL|QUADSPI_FCR_CTOF_Msk|macro|QUADSPI_FCR_CTOF_Msk
DECL|QUADSPI_FCR_CTOF_Pos|macro|QUADSPI_FCR_CTOF_Pos
DECL|QUADSPI_FCR_CTOF|macro|QUADSPI_FCR_CTOF
DECL|QUADSPI_IRQn|enumerator|QUADSPI_IRQn = 92, /*!< Quad SPI global interrupt */
DECL|QUADSPI_LPTR_TIMEOUT_Msk|macro|QUADSPI_LPTR_TIMEOUT_Msk
DECL|QUADSPI_LPTR_TIMEOUT_Pos|macro|QUADSPI_LPTR_TIMEOUT_Pos
DECL|QUADSPI_LPTR_TIMEOUT|macro|QUADSPI_LPTR_TIMEOUT
DECL|QUADSPI_PIR_INTERVAL_Msk|macro|QUADSPI_PIR_INTERVAL_Msk
DECL|QUADSPI_PIR_INTERVAL_Pos|macro|QUADSPI_PIR_INTERVAL_Pos
DECL|QUADSPI_PIR_INTERVAL|macro|QUADSPI_PIR_INTERVAL
DECL|QUADSPI_PSMAR_MATCH_Msk|macro|QUADSPI_PSMAR_MATCH_Msk
DECL|QUADSPI_PSMAR_MATCH_Pos|macro|QUADSPI_PSMAR_MATCH_Pos
DECL|QUADSPI_PSMAR_MATCH|macro|QUADSPI_PSMAR_MATCH
DECL|QUADSPI_PSMKR_MASK_Msk|macro|QUADSPI_PSMKR_MASK_Msk
DECL|QUADSPI_PSMKR_MASK_Pos|macro|QUADSPI_PSMKR_MASK_Pos
DECL|QUADSPI_PSMKR_MASK|macro|QUADSPI_PSMKR_MASK
DECL|QUADSPI_SR_BUSY_Msk|macro|QUADSPI_SR_BUSY_Msk
DECL|QUADSPI_SR_BUSY_Pos|macro|QUADSPI_SR_BUSY_Pos
DECL|QUADSPI_SR_BUSY|macro|QUADSPI_SR_BUSY
DECL|QUADSPI_SR_FLEVEL_0|macro|QUADSPI_SR_FLEVEL_0
DECL|QUADSPI_SR_FLEVEL_1|macro|QUADSPI_SR_FLEVEL_1
DECL|QUADSPI_SR_FLEVEL_2|macro|QUADSPI_SR_FLEVEL_2
DECL|QUADSPI_SR_FLEVEL_3|macro|QUADSPI_SR_FLEVEL_3
DECL|QUADSPI_SR_FLEVEL_4|macro|QUADSPI_SR_FLEVEL_4
DECL|QUADSPI_SR_FLEVEL_Msk|macro|QUADSPI_SR_FLEVEL_Msk
DECL|QUADSPI_SR_FLEVEL_Pos|macro|QUADSPI_SR_FLEVEL_Pos
DECL|QUADSPI_SR_FLEVEL|macro|QUADSPI_SR_FLEVEL
DECL|QUADSPI_SR_FTF_Msk|macro|QUADSPI_SR_FTF_Msk
DECL|QUADSPI_SR_FTF_Pos|macro|QUADSPI_SR_FTF_Pos
DECL|QUADSPI_SR_FTF|macro|QUADSPI_SR_FTF
DECL|QUADSPI_SR_SMF_Msk|macro|QUADSPI_SR_SMF_Msk
DECL|QUADSPI_SR_SMF_Pos|macro|QUADSPI_SR_SMF_Pos
DECL|QUADSPI_SR_SMF|macro|QUADSPI_SR_SMF
DECL|QUADSPI_SR_TCF_Msk|macro|QUADSPI_SR_TCF_Msk
DECL|QUADSPI_SR_TCF_Pos|macro|QUADSPI_SR_TCF_Pos
DECL|QUADSPI_SR_TCF|macro|QUADSPI_SR_TCF
DECL|QUADSPI_SR_TEF_Msk|macro|QUADSPI_SR_TEF_Msk
DECL|QUADSPI_SR_TEF_Pos|macro|QUADSPI_SR_TEF_Pos
DECL|QUADSPI_SR_TEF|macro|QUADSPI_SR_TEF
DECL|QUADSPI_SR_TOF_Msk|macro|QUADSPI_SR_TOF_Msk
DECL|QUADSPI_SR_TOF_Pos|macro|QUADSPI_SR_TOF_Pos
DECL|QUADSPI_SR_TOF|macro|QUADSPI_SR_TOF
DECL|QUADSPI_TypeDef|typedef|} QUADSPI_TypeDef;
DECL|QUADSPI|macro|QUADSPI
DECL|RAMDTCM_BASE|macro|RAMDTCM_BASE
DECL|RAMITCM_BASE|macro|RAMITCM_BASE
DECL|RCC_AHB1ENR_BKPSRAMEN_Msk|macro|RCC_AHB1ENR_BKPSRAMEN_Msk
DECL|RCC_AHB1ENR_BKPSRAMEN_Pos|macro|RCC_AHB1ENR_BKPSRAMEN_Pos
DECL|RCC_AHB1ENR_BKPSRAMEN|macro|RCC_AHB1ENR_BKPSRAMEN
DECL|RCC_AHB1ENR_CRCEN_Msk|macro|RCC_AHB1ENR_CRCEN_Msk
DECL|RCC_AHB1ENR_CRCEN_Pos|macro|RCC_AHB1ENR_CRCEN_Pos
DECL|RCC_AHB1ENR_CRCEN|macro|RCC_AHB1ENR_CRCEN
DECL|RCC_AHB1ENR_DMA1EN_Msk|macro|RCC_AHB1ENR_DMA1EN_Msk
DECL|RCC_AHB1ENR_DMA1EN_Pos|macro|RCC_AHB1ENR_DMA1EN_Pos
DECL|RCC_AHB1ENR_DMA1EN|macro|RCC_AHB1ENR_DMA1EN
DECL|RCC_AHB1ENR_DMA2EN_Msk|macro|RCC_AHB1ENR_DMA2EN_Msk
DECL|RCC_AHB1ENR_DMA2EN_Pos|macro|RCC_AHB1ENR_DMA2EN_Pos
DECL|RCC_AHB1ENR_DMA2EN|macro|RCC_AHB1ENR_DMA2EN
DECL|RCC_AHB1ENR_DTCMRAMEN_Msk|macro|RCC_AHB1ENR_DTCMRAMEN_Msk
DECL|RCC_AHB1ENR_DTCMRAMEN_Pos|macro|RCC_AHB1ENR_DTCMRAMEN_Pos
DECL|RCC_AHB1ENR_DTCMRAMEN|macro|RCC_AHB1ENR_DTCMRAMEN
DECL|RCC_AHB1ENR_GPIOAEN_Msk|macro|RCC_AHB1ENR_GPIOAEN_Msk
DECL|RCC_AHB1ENR_GPIOAEN_Pos|macro|RCC_AHB1ENR_GPIOAEN_Pos
DECL|RCC_AHB1ENR_GPIOAEN|macro|RCC_AHB1ENR_GPIOAEN
DECL|RCC_AHB1ENR_GPIOBEN_Msk|macro|RCC_AHB1ENR_GPIOBEN_Msk
DECL|RCC_AHB1ENR_GPIOBEN_Pos|macro|RCC_AHB1ENR_GPIOBEN_Pos
DECL|RCC_AHB1ENR_GPIOBEN|macro|RCC_AHB1ENR_GPIOBEN
DECL|RCC_AHB1ENR_GPIOCEN_Msk|macro|RCC_AHB1ENR_GPIOCEN_Msk
DECL|RCC_AHB1ENR_GPIOCEN_Pos|macro|RCC_AHB1ENR_GPIOCEN_Pos
DECL|RCC_AHB1ENR_GPIOCEN|macro|RCC_AHB1ENR_GPIOCEN
DECL|RCC_AHB1ENR_GPIODEN_Msk|macro|RCC_AHB1ENR_GPIODEN_Msk
DECL|RCC_AHB1ENR_GPIODEN_Pos|macro|RCC_AHB1ENR_GPIODEN_Pos
DECL|RCC_AHB1ENR_GPIODEN|macro|RCC_AHB1ENR_GPIODEN
DECL|RCC_AHB1ENR_GPIOEEN_Msk|macro|RCC_AHB1ENR_GPIOEEN_Msk
DECL|RCC_AHB1ENR_GPIOEEN_Pos|macro|RCC_AHB1ENR_GPIOEEN_Pos
DECL|RCC_AHB1ENR_GPIOEEN|macro|RCC_AHB1ENR_GPIOEEN
DECL|RCC_AHB1ENR_GPIOFEN_Msk|macro|RCC_AHB1ENR_GPIOFEN_Msk
DECL|RCC_AHB1ENR_GPIOFEN_Pos|macro|RCC_AHB1ENR_GPIOFEN_Pos
DECL|RCC_AHB1ENR_GPIOFEN|macro|RCC_AHB1ENR_GPIOFEN
DECL|RCC_AHB1ENR_GPIOGEN_Msk|macro|RCC_AHB1ENR_GPIOGEN_Msk
DECL|RCC_AHB1ENR_GPIOGEN_Pos|macro|RCC_AHB1ENR_GPIOGEN_Pos
DECL|RCC_AHB1ENR_GPIOGEN|macro|RCC_AHB1ENR_GPIOGEN
DECL|RCC_AHB1ENR_GPIOHEN_Msk|macro|RCC_AHB1ENR_GPIOHEN_Msk
DECL|RCC_AHB1ENR_GPIOHEN_Pos|macro|RCC_AHB1ENR_GPIOHEN_Pos
DECL|RCC_AHB1ENR_GPIOHEN|macro|RCC_AHB1ENR_GPIOHEN
DECL|RCC_AHB1ENR_GPIOIEN_Msk|macro|RCC_AHB1ENR_GPIOIEN_Msk
DECL|RCC_AHB1ENR_GPIOIEN_Pos|macro|RCC_AHB1ENR_GPIOIEN_Pos
DECL|RCC_AHB1ENR_GPIOIEN|macro|RCC_AHB1ENR_GPIOIEN
DECL|RCC_AHB1ENR_OTGHSEN_Msk|macro|RCC_AHB1ENR_OTGHSEN_Msk
DECL|RCC_AHB1ENR_OTGHSEN_Pos|macro|RCC_AHB1ENR_OTGHSEN_Pos
DECL|RCC_AHB1ENR_OTGHSEN|macro|RCC_AHB1ENR_OTGHSEN
DECL|RCC_AHB1ENR_OTGHSULPIEN_Msk|macro|RCC_AHB1ENR_OTGHSULPIEN_Msk
DECL|RCC_AHB1ENR_OTGHSULPIEN_Pos|macro|RCC_AHB1ENR_OTGHSULPIEN_Pos
DECL|RCC_AHB1ENR_OTGHSULPIEN|macro|RCC_AHB1ENR_OTGHSULPIEN
DECL|RCC_AHB1LPENR_AXILPEN_Msk|macro|RCC_AHB1LPENR_AXILPEN_Msk
DECL|RCC_AHB1LPENR_AXILPEN_Pos|macro|RCC_AHB1LPENR_AXILPEN_Pos
DECL|RCC_AHB1LPENR_AXILPEN|macro|RCC_AHB1LPENR_AXILPEN
DECL|RCC_AHB1LPENR_BKPSRAMLPEN_Msk|macro|RCC_AHB1LPENR_BKPSRAMLPEN_Msk
DECL|RCC_AHB1LPENR_BKPSRAMLPEN_Pos|macro|RCC_AHB1LPENR_BKPSRAMLPEN_Pos
DECL|RCC_AHB1LPENR_BKPSRAMLPEN|macro|RCC_AHB1LPENR_BKPSRAMLPEN
DECL|RCC_AHB1LPENR_CRCLPEN_Msk|macro|RCC_AHB1LPENR_CRCLPEN_Msk
DECL|RCC_AHB1LPENR_CRCLPEN_Pos|macro|RCC_AHB1LPENR_CRCLPEN_Pos
DECL|RCC_AHB1LPENR_CRCLPEN|macro|RCC_AHB1LPENR_CRCLPEN
DECL|RCC_AHB1LPENR_DMA1LPEN_Msk|macro|RCC_AHB1LPENR_DMA1LPEN_Msk
DECL|RCC_AHB1LPENR_DMA1LPEN_Pos|macro|RCC_AHB1LPENR_DMA1LPEN_Pos
DECL|RCC_AHB1LPENR_DMA1LPEN|macro|RCC_AHB1LPENR_DMA1LPEN
DECL|RCC_AHB1LPENR_DMA2LPEN_Msk|macro|RCC_AHB1LPENR_DMA2LPEN_Msk
DECL|RCC_AHB1LPENR_DMA2LPEN_Pos|macro|RCC_AHB1LPENR_DMA2LPEN_Pos
DECL|RCC_AHB1LPENR_DMA2LPEN|macro|RCC_AHB1LPENR_DMA2LPEN
DECL|RCC_AHB1LPENR_DTCMLPEN_Msk|macro|RCC_AHB1LPENR_DTCMLPEN_Msk
DECL|RCC_AHB1LPENR_DTCMLPEN_Pos|macro|RCC_AHB1LPENR_DTCMLPEN_Pos
DECL|RCC_AHB1LPENR_DTCMLPEN|macro|RCC_AHB1LPENR_DTCMLPEN
DECL|RCC_AHB1LPENR_FLITFLPEN_Msk|macro|RCC_AHB1LPENR_FLITFLPEN_Msk
DECL|RCC_AHB1LPENR_FLITFLPEN_Pos|macro|RCC_AHB1LPENR_FLITFLPEN_Pos
DECL|RCC_AHB1LPENR_FLITFLPEN|macro|RCC_AHB1LPENR_FLITFLPEN
DECL|RCC_AHB1LPENR_GPIOALPEN_Msk|macro|RCC_AHB1LPENR_GPIOALPEN_Msk
DECL|RCC_AHB1LPENR_GPIOALPEN_Pos|macro|RCC_AHB1LPENR_GPIOALPEN_Pos
DECL|RCC_AHB1LPENR_GPIOALPEN|macro|RCC_AHB1LPENR_GPIOALPEN
DECL|RCC_AHB1LPENR_GPIOBLPEN_Msk|macro|RCC_AHB1LPENR_GPIOBLPEN_Msk
DECL|RCC_AHB1LPENR_GPIOBLPEN_Pos|macro|RCC_AHB1LPENR_GPIOBLPEN_Pos
DECL|RCC_AHB1LPENR_GPIOBLPEN|macro|RCC_AHB1LPENR_GPIOBLPEN
DECL|RCC_AHB1LPENR_GPIOCLPEN_Msk|macro|RCC_AHB1LPENR_GPIOCLPEN_Msk
DECL|RCC_AHB1LPENR_GPIOCLPEN_Pos|macro|RCC_AHB1LPENR_GPIOCLPEN_Pos
DECL|RCC_AHB1LPENR_GPIOCLPEN|macro|RCC_AHB1LPENR_GPIOCLPEN
DECL|RCC_AHB1LPENR_GPIODLPEN_Msk|macro|RCC_AHB1LPENR_GPIODLPEN_Msk
DECL|RCC_AHB1LPENR_GPIODLPEN_Pos|macro|RCC_AHB1LPENR_GPIODLPEN_Pos
DECL|RCC_AHB1LPENR_GPIODLPEN|macro|RCC_AHB1LPENR_GPIODLPEN
DECL|RCC_AHB1LPENR_GPIOELPEN_Msk|macro|RCC_AHB1LPENR_GPIOELPEN_Msk
DECL|RCC_AHB1LPENR_GPIOELPEN_Pos|macro|RCC_AHB1LPENR_GPIOELPEN_Pos
DECL|RCC_AHB1LPENR_GPIOELPEN|macro|RCC_AHB1LPENR_GPIOELPEN
DECL|RCC_AHB1LPENR_GPIOFLPEN_Msk|macro|RCC_AHB1LPENR_GPIOFLPEN_Msk
DECL|RCC_AHB1LPENR_GPIOFLPEN_Pos|macro|RCC_AHB1LPENR_GPIOFLPEN_Pos
DECL|RCC_AHB1LPENR_GPIOFLPEN|macro|RCC_AHB1LPENR_GPIOFLPEN
DECL|RCC_AHB1LPENR_GPIOGLPEN_Msk|macro|RCC_AHB1LPENR_GPIOGLPEN_Msk
DECL|RCC_AHB1LPENR_GPIOGLPEN_Pos|macro|RCC_AHB1LPENR_GPIOGLPEN_Pos
DECL|RCC_AHB1LPENR_GPIOGLPEN|macro|RCC_AHB1LPENR_GPIOGLPEN
DECL|RCC_AHB1LPENR_GPIOHLPEN_Msk|macro|RCC_AHB1LPENR_GPIOHLPEN_Msk
DECL|RCC_AHB1LPENR_GPIOHLPEN_Pos|macro|RCC_AHB1LPENR_GPIOHLPEN_Pos
DECL|RCC_AHB1LPENR_GPIOHLPEN|macro|RCC_AHB1LPENR_GPIOHLPEN
DECL|RCC_AHB1LPENR_GPIOILPEN_Msk|macro|RCC_AHB1LPENR_GPIOILPEN_Msk
DECL|RCC_AHB1LPENR_GPIOILPEN_Pos|macro|RCC_AHB1LPENR_GPIOILPEN_Pos
DECL|RCC_AHB1LPENR_GPIOILPEN|macro|RCC_AHB1LPENR_GPIOILPEN
DECL|RCC_AHB1LPENR_OTGHSLPEN_Msk|macro|RCC_AHB1LPENR_OTGHSLPEN_Msk
DECL|RCC_AHB1LPENR_OTGHSLPEN_Pos|macro|RCC_AHB1LPENR_OTGHSLPEN_Pos
DECL|RCC_AHB1LPENR_OTGHSLPEN|macro|RCC_AHB1LPENR_OTGHSLPEN
DECL|RCC_AHB1LPENR_OTGHSULPILPEN_Msk|macro|RCC_AHB1LPENR_OTGHSULPILPEN_Msk
DECL|RCC_AHB1LPENR_OTGHSULPILPEN_Pos|macro|RCC_AHB1LPENR_OTGHSULPILPEN_Pos
DECL|RCC_AHB1LPENR_OTGHSULPILPEN|macro|RCC_AHB1LPENR_OTGHSULPILPEN
DECL|RCC_AHB1LPENR_SRAM1LPEN_Msk|macro|RCC_AHB1LPENR_SRAM1LPEN_Msk
DECL|RCC_AHB1LPENR_SRAM1LPEN_Pos|macro|RCC_AHB1LPENR_SRAM1LPEN_Pos
DECL|RCC_AHB1LPENR_SRAM1LPEN|macro|RCC_AHB1LPENR_SRAM1LPEN
DECL|RCC_AHB1LPENR_SRAM2LPEN_Msk|macro|RCC_AHB1LPENR_SRAM2LPEN_Msk
DECL|RCC_AHB1LPENR_SRAM2LPEN_Pos|macro|RCC_AHB1LPENR_SRAM2LPEN_Pos
DECL|RCC_AHB1LPENR_SRAM2LPEN|macro|RCC_AHB1LPENR_SRAM2LPEN
DECL|RCC_AHB1RSTR_CRCRST_Msk|macro|RCC_AHB1RSTR_CRCRST_Msk
DECL|RCC_AHB1RSTR_CRCRST_Pos|macro|RCC_AHB1RSTR_CRCRST_Pos
DECL|RCC_AHB1RSTR_CRCRST|macro|RCC_AHB1RSTR_CRCRST
DECL|RCC_AHB1RSTR_DMA1RST_Msk|macro|RCC_AHB1RSTR_DMA1RST_Msk
DECL|RCC_AHB1RSTR_DMA1RST_Pos|macro|RCC_AHB1RSTR_DMA1RST_Pos
DECL|RCC_AHB1RSTR_DMA1RST|macro|RCC_AHB1RSTR_DMA1RST
DECL|RCC_AHB1RSTR_DMA2RST_Msk|macro|RCC_AHB1RSTR_DMA2RST_Msk
DECL|RCC_AHB1RSTR_DMA2RST_Pos|macro|RCC_AHB1RSTR_DMA2RST_Pos
DECL|RCC_AHB1RSTR_DMA2RST|macro|RCC_AHB1RSTR_DMA2RST
DECL|RCC_AHB1RSTR_GPIOARST_Msk|macro|RCC_AHB1RSTR_GPIOARST_Msk
DECL|RCC_AHB1RSTR_GPIOARST_Pos|macro|RCC_AHB1RSTR_GPIOARST_Pos
DECL|RCC_AHB1RSTR_GPIOARST|macro|RCC_AHB1RSTR_GPIOARST
DECL|RCC_AHB1RSTR_GPIOBRST_Msk|macro|RCC_AHB1RSTR_GPIOBRST_Msk
DECL|RCC_AHB1RSTR_GPIOBRST_Pos|macro|RCC_AHB1RSTR_GPIOBRST_Pos
DECL|RCC_AHB1RSTR_GPIOBRST|macro|RCC_AHB1RSTR_GPIOBRST
DECL|RCC_AHB1RSTR_GPIOCRST_Msk|macro|RCC_AHB1RSTR_GPIOCRST_Msk
DECL|RCC_AHB1RSTR_GPIOCRST_Pos|macro|RCC_AHB1RSTR_GPIOCRST_Pos
DECL|RCC_AHB1RSTR_GPIOCRST|macro|RCC_AHB1RSTR_GPIOCRST
DECL|RCC_AHB1RSTR_GPIODRST_Msk|macro|RCC_AHB1RSTR_GPIODRST_Msk
DECL|RCC_AHB1RSTR_GPIODRST_Pos|macro|RCC_AHB1RSTR_GPIODRST_Pos
DECL|RCC_AHB1RSTR_GPIODRST|macro|RCC_AHB1RSTR_GPIODRST
DECL|RCC_AHB1RSTR_GPIOERST_Msk|macro|RCC_AHB1RSTR_GPIOERST_Msk
DECL|RCC_AHB1RSTR_GPIOERST_Pos|macro|RCC_AHB1RSTR_GPIOERST_Pos
DECL|RCC_AHB1RSTR_GPIOERST|macro|RCC_AHB1RSTR_GPIOERST
DECL|RCC_AHB1RSTR_GPIOFRST_Msk|macro|RCC_AHB1RSTR_GPIOFRST_Msk
DECL|RCC_AHB1RSTR_GPIOFRST_Pos|macro|RCC_AHB1RSTR_GPIOFRST_Pos
DECL|RCC_AHB1RSTR_GPIOFRST|macro|RCC_AHB1RSTR_GPIOFRST
DECL|RCC_AHB1RSTR_GPIOGRST_Msk|macro|RCC_AHB1RSTR_GPIOGRST_Msk
DECL|RCC_AHB1RSTR_GPIOGRST_Pos|macro|RCC_AHB1RSTR_GPIOGRST_Pos
DECL|RCC_AHB1RSTR_GPIOGRST|macro|RCC_AHB1RSTR_GPIOGRST
DECL|RCC_AHB1RSTR_GPIOHRST_Msk|macro|RCC_AHB1RSTR_GPIOHRST_Msk
DECL|RCC_AHB1RSTR_GPIOHRST_Pos|macro|RCC_AHB1RSTR_GPIOHRST_Pos
DECL|RCC_AHB1RSTR_GPIOHRST|macro|RCC_AHB1RSTR_GPIOHRST
DECL|RCC_AHB1RSTR_GPIOIRST_Msk|macro|RCC_AHB1RSTR_GPIOIRST_Msk
DECL|RCC_AHB1RSTR_GPIOIRST_Pos|macro|RCC_AHB1RSTR_GPIOIRST_Pos
DECL|RCC_AHB1RSTR_GPIOIRST|macro|RCC_AHB1RSTR_GPIOIRST
DECL|RCC_AHB1RSTR_OTGHRST_Msk|macro|RCC_AHB1RSTR_OTGHRST_Msk
DECL|RCC_AHB1RSTR_OTGHRST_Pos|macro|RCC_AHB1RSTR_OTGHRST_Pos
DECL|RCC_AHB1RSTR_OTGHRST|macro|RCC_AHB1RSTR_OTGHRST
DECL|RCC_AHB2ENR_AESEN_Msk|macro|RCC_AHB2ENR_AESEN_Msk
DECL|RCC_AHB2ENR_AESEN_Pos|macro|RCC_AHB2ENR_AESEN_Pos
DECL|RCC_AHB2ENR_AESEN|macro|RCC_AHB2ENR_AESEN
DECL|RCC_AHB2ENR_OTGFSEN_Msk|macro|RCC_AHB2ENR_OTGFSEN_Msk
DECL|RCC_AHB2ENR_OTGFSEN_Pos|macro|RCC_AHB2ENR_OTGFSEN_Pos
DECL|RCC_AHB2ENR_OTGFSEN|macro|RCC_AHB2ENR_OTGFSEN
DECL|RCC_AHB2ENR_RNGEN_Msk|macro|RCC_AHB2ENR_RNGEN_Msk
DECL|RCC_AHB2ENR_RNGEN_Pos|macro|RCC_AHB2ENR_RNGEN_Pos
DECL|RCC_AHB2ENR_RNGEN|macro|RCC_AHB2ENR_RNGEN
DECL|RCC_AHB2LPENR_AESLPEN_Msk|macro|RCC_AHB2LPENR_AESLPEN_Msk
DECL|RCC_AHB2LPENR_AESLPEN_Pos|macro|RCC_AHB2LPENR_AESLPEN_Pos
DECL|RCC_AHB2LPENR_AESLPEN|macro|RCC_AHB2LPENR_AESLPEN
DECL|RCC_AHB2LPENR_OTGFSLPEN_Msk|macro|RCC_AHB2LPENR_OTGFSLPEN_Msk
DECL|RCC_AHB2LPENR_OTGFSLPEN_Pos|macro|RCC_AHB2LPENR_OTGFSLPEN_Pos
DECL|RCC_AHB2LPENR_OTGFSLPEN|macro|RCC_AHB2LPENR_OTGFSLPEN
DECL|RCC_AHB2LPENR_RNGLPEN_Msk|macro|RCC_AHB2LPENR_RNGLPEN_Msk
DECL|RCC_AHB2LPENR_RNGLPEN_Pos|macro|RCC_AHB2LPENR_RNGLPEN_Pos
DECL|RCC_AHB2LPENR_RNGLPEN|macro|RCC_AHB2LPENR_RNGLPEN
DECL|RCC_AHB2RSTR_AESRST_Msk|macro|RCC_AHB2RSTR_AESRST_Msk
DECL|RCC_AHB2RSTR_AESRST_Pos|macro|RCC_AHB2RSTR_AESRST_Pos
DECL|RCC_AHB2RSTR_AESRST|macro|RCC_AHB2RSTR_AESRST
DECL|RCC_AHB2RSTR_OTGFSRST_Msk|macro|RCC_AHB2RSTR_OTGFSRST_Msk
DECL|RCC_AHB2RSTR_OTGFSRST_Pos|macro|RCC_AHB2RSTR_OTGFSRST_Pos
DECL|RCC_AHB2RSTR_OTGFSRST|macro|RCC_AHB2RSTR_OTGFSRST
DECL|RCC_AHB2RSTR_RNGRST_Msk|macro|RCC_AHB2RSTR_RNGRST_Msk
DECL|RCC_AHB2RSTR_RNGRST_Pos|macro|RCC_AHB2RSTR_RNGRST_Pos
DECL|RCC_AHB2RSTR_RNGRST|macro|RCC_AHB2RSTR_RNGRST
DECL|RCC_AHB3ENR_FMCEN_Msk|macro|RCC_AHB3ENR_FMCEN_Msk
DECL|RCC_AHB3ENR_FMCEN_Pos|macro|RCC_AHB3ENR_FMCEN_Pos
DECL|RCC_AHB3ENR_FMCEN|macro|RCC_AHB3ENR_FMCEN
DECL|RCC_AHB3ENR_QSPIEN_Msk|macro|RCC_AHB3ENR_QSPIEN_Msk
DECL|RCC_AHB3ENR_QSPIEN_Pos|macro|RCC_AHB3ENR_QSPIEN_Pos
DECL|RCC_AHB3ENR_QSPIEN|macro|RCC_AHB3ENR_QSPIEN
DECL|RCC_AHB3LPENR_FMCLPEN_Msk|macro|RCC_AHB3LPENR_FMCLPEN_Msk
DECL|RCC_AHB3LPENR_FMCLPEN_Pos|macro|RCC_AHB3LPENR_FMCLPEN_Pos
DECL|RCC_AHB3LPENR_FMCLPEN|macro|RCC_AHB3LPENR_FMCLPEN
DECL|RCC_AHB3LPENR_QSPILPEN_Msk|macro|RCC_AHB3LPENR_QSPILPEN_Msk
DECL|RCC_AHB3LPENR_QSPILPEN_Pos|macro|RCC_AHB3LPENR_QSPILPEN_Pos
DECL|RCC_AHB3LPENR_QSPILPEN|macro|RCC_AHB3LPENR_QSPILPEN
DECL|RCC_AHB3RSTR_FMCRST_Msk|macro|RCC_AHB3RSTR_FMCRST_Msk
DECL|RCC_AHB3RSTR_FMCRST_Pos|macro|RCC_AHB3RSTR_FMCRST_Pos
DECL|RCC_AHB3RSTR_FMCRST|macro|RCC_AHB3RSTR_FMCRST
DECL|RCC_AHB3RSTR_QSPIRST_Msk|macro|RCC_AHB3RSTR_QSPIRST_Msk
DECL|RCC_AHB3RSTR_QSPIRST_Pos|macro|RCC_AHB3RSTR_QSPIRST_Pos
DECL|RCC_AHB3RSTR_QSPIRST|macro|RCC_AHB3RSTR_QSPIRST
DECL|RCC_APB1ENR_CAN1EN_Msk|macro|RCC_APB1ENR_CAN1EN_Msk
DECL|RCC_APB1ENR_CAN1EN_Pos|macro|RCC_APB1ENR_CAN1EN_Pos
DECL|RCC_APB1ENR_CAN1EN|macro|RCC_APB1ENR_CAN1EN
DECL|RCC_APB1ENR_DACEN_Msk|macro|RCC_APB1ENR_DACEN_Msk
DECL|RCC_APB1ENR_DACEN_Pos|macro|RCC_APB1ENR_DACEN_Pos
DECL|RCC_APB1ENR_DACEN|macro|RCC_APB1ENR_DACEN
DECL|RCC_APB1ENR_I2C1EN_Msk|macro|RCC_APB1ENR_I2C1EN_Msk
DECL|RCC_APB1ENR_I2C1EN_Pos|macro|RCC_APB1ENR_I2C1EN_Pos
DECL|RCC_APB1ENR_I2C1EN|macro|RCC_APB1ENR_I2C1EN
DECL|RCC_APB1ENR_I2C2EN_Msk|macro|RCC_APB1ENR_I2C2EN_Msk
DECL|RCC_APB1ENR_I2C2EN_Pos|macro|RCC_APB1ENR_I2C2EN_Pos
DECL|RCC_APB1ENR_I2C2EN|macro|RCC_APB1ENR_I2C2EN
DECL|RCC_APB1ENR_I2C3EN_Msk|macro|RCC_APB1ENR_I2C3EN_Msk
DECL|RCC_APB1ENR_I2C3EN_Pos|macro|RCC_APB1ENR_I2C3EN_Pos
DECL|RCC_APB1ENR_I2C3EN|macro|RCC_APB1ENR_I2C3EN
DECL|RCC_APB1ENR_LPTIM1EN_Msk|macro|RCC_APB1ENR_LPTIM1EN_Msk
DECL|RCC_APB1ENR_LPTIM1EN_Pos|macro|RCC_APB1ENR_LPTIM1EN_Pos
DECL|RCC_APB1ENR_LPTIM1EN|macro|RCC_APB1ENR_LPTIM1EN
DECL|RCC_APB1ENR_PWREN_Msk|macro|RCC_APB1ENR_PWREN_Msk
DECL|RCC_APB1ENR_PWREN_Pos|macro|RCC_APB1ENR_PWREN_Pos
DECL|RCC_APB1ENR_PWREN|macro|RCC_APB1ENR_PWREN
DECL|RCC_APB1ENR_RTCEN_Msk|macro|RCC_APB1ENR_RTCEN_Msk
DECL|RCC_APB1ENR_RTCEN_Pos|macro|RCC_APB1ENR_RTCEN_Pos
DECL|RCC_APB1ENR_RTCEN|macro|RCC_APB1ENR_RTCEN
DECL|RCC_APB1ENR_SPI2EN_Msk|macro|RCC_APB1ENR_SPI2EN_Msk
DECL|RCC_APB1ENR_SPI2EN_Pos|macro|RCC_APB1ENR_SPI2EN_Pos
DECL|RCC_APB1ENR_SPI2EN|macro|RCC_APB1ENR_SPI2EN
DECL|RCC_APB1ENR_SPI3EN_Msk|macro|RCC_APB1ENR_SPI3EN_Msk
DECL|RCC_APB1ENR_SPI3EN_Pos|macro|RCC_APB1ENR_SPI3EN_Pos
DECL|RCC_APB1ENR_SPI3EN|macro|RCC_APB1ENR_SPI3EN
DECL|RCC_APB1ENR_TIM12EN_Msk|macro|RCC_APB1ENR_TIM12EN_Msk
DECL|RCC_APB1ENR_TIM12EN_Pos|macro|RCC_APB1ENR_TIM12EN_Pos
DECL|RCC_APB1ENR_TIM12EN|macro|RCC_APB1ENR_TIM12EN
DECL|RCC_APB1ENR_TIM13EN_Msk|macro|RCC_APB1ENR_TIM13EN_Msk
DECL|RCC_APB1ENR_TIM13EN_Pos|macro|RCC_APB1ENR_TIM13EN_Pos
DECL|RCC_APB1ENR_TIM13EN|macro|RCC_APB1ENR_TIM13EN
DECL|RCC_APB1ENR_TIM14EN_Msk|macro|RCC_APB1ENR_TIM14EN_Msk
DECL|RCC_APB1ENR_TIM14EN_Pos|macro|RCC_APB1ENR_TIM14EN_Pos
DECL|RCC_APB1ENR_TIM14EN|macro|RCC_APB1ENR_TIM14EN
DECL|RCC_APB1ENR_TIM2EN_Msk|macro|RCC_APB1ENR_TIM2EN_Msk
DECL|RCC_APB1ENR_TIM2EN_Pos|macro|RCC_APB1ENR_TIM2EN_Pos
DECL|RCC_APB1ENR_TIM2EN|macro|RCC_APB1ENR_TIM2EN
DECL|RCC_APB1ENR_TIM3EN_Msk|macro|RCC_APB1ENR_TIM3EN_Msk
DECL|RCC_APB1ENR_TIM3EN_Pos|macro|RCC_APB1ENR_TIM3EN_Pos
DECL|RCC_APB1ENR_TIM3EN|macro|RCC_APB1ENR_TIM3EN
DECL|RCC_APB1ENR_TIM4EN_Msk|macro|RCC_APB1ENR_TIM4EN_Msk
DECL|RCC_APB1ENR_TIM4EN_Pos|macro|RCC_APB1ENR_TIM4EN_Pos
DECL|RCC_APB1ENR_TIM4EN|macro|RCC_APB1ENR_TIM4EN
DECL|RCC_APB1ENR_TIM5EN_Msk|macro|RCC_APB1ENR_TIM5EN_Msk
DECL|RCC_APB1ENR_TIM5EN_Pos|macro|RCC_APB1ENR_TIM5EN_Pos
DECL|RCC_APB1ENR_TIM5EN|macro|RCC_APB1ENR_TIM5EN
DECL|RCC_APB1ENR_TIM6EN_Msk|macro|RCC_APB1ENR_TIM6EN_Msk
DECL|RCC_APB1ENR_TIM6EN_Pos|macro|RCC_APB1ENR_TIM6EN_Pos
DECL|RCC_APB1ENR_TIM6EN|macro|RCC_APB1ENR_TIM6EN
DECL|RCC_APB1ENR_TIM7EN_Msk|macro|RCC_APB1ENR_TIM7EN_Msk
DECL|RCC_APB1ENR_TIM7EN_Pos|macro|RCC_APB1ENR_TIM7EN_Pos
DECL|RCC_APB1ENR_TIM7EN|macro|RCC_APB1ENR_TIM7EN
DECL|RCC_APB1ENR_UART4EN_Msk|macro|RCC_APB1ENR_UART4EN_Msk
DECL|RCC_APB1ENR_UART4EN_Pos|macro|RCC_APB1ENR_UART4EN_Pos
DECL|RCC_APB1ENR_UART4EN|macro|RCC_APB1ENR_UART4EN
DECL|RCC_APB1ENR_UART5EN_Msk|macro|RCC_APB1ENR_UART5EN_Msk
DECL|RCC_APB1ENR_UART5EN_Pos|macro|RCC_APB1ENR_UART5EN_Pos
DECL|RCC_APB1ENR_UART5EN|macro|RCC_APB1ENR_UART5EN
DECL|RCC_APB1ENR_UART7EN_Msk|macro|RCC_APB1ENR_UART7EN_Msk
DECL|RCC_APB1ENR_UART7EN_Pos|macro|RCC_APB1ENR_UART7EN_Pos
DECL|RCC_APB1ENR_UART7EN|macro|RCC_APB1ENR_UART7EN
DECL|RCC_APB1ENR_UART8EN_Msk|macro|RCC_APB1ENR_UART8EN_Msk
DECL|RCC_APB1ENR_UART8EN_Pos|macro|RCC_APB1ENR_UART8EN_Pos
DECL|RCC_APB1ENR_UART8EN|macro|RCC_APB1ENR_UART8EN
DECL|RCC_APB1ENR_USART2EN_Msk|macro|RCC_APB1ENR_USART2EN_Msk
DECL|RCC_APB1ENR_USART2EN_Pos|macro|RCC_APB1ENR_USART2EN_Pos
DECL|RCC_APB1ENR_USART2EN|macro|RCC_APB1ENR_USART2EN
DECL|RCC_APB1ENR_USART3EN_Msk|macro|RCC_APB1ENR_USART3EN_Msk
DECL|RCC_APB1ENR_USART3EN_Pos|macro|RCC_APB1ENR_USART3EN_Pos
DECL|RCC_APB1ENR_USART3EN|macro|RCC_APB1ENR_USART3EN
DECL|RCC_APB1ENR_WWDGEN_Msk|macro|RCC_APB1ENR_WWDGEN_Msk
DECL|RCC_APB1ENR_WWDGEN_Pos|macro|RCC_APB1ENR_WWDGEN_Pos
DECL|RCC_APB1ENR_WWDGEN|macro|RCC_APB1ENR_WWDGEN
DECL|RCC_APB1LPENR_CAN1LPEN_Msk|macro|RCC_APB1LPENR_CAN1LPEN_Msk
DECL|RCC_APB1LPENR_CAN1LPEN_Pos|macro|RCC_APB1LPENR_CAN1LPEN_Pos
DECL|RCC_APB1LPENR_CAN1LPEN|macro|RCC_APB1LPENR_CAN1LPEN
DECL|RCC_APB1LPENR_DACLPEN_Msk|macro|RCC_APB1LPENR_DACLPEN_Msk
DECL|RCC_APB1LPENR_DACLPEN_Pos|macro|RCC_APB1LPENR_DACLPEN_Pos
DECL|RCC_APB1LPENR_DACLPEN|macro|RCC_APB1LPENR_DACLPEN
DECL|RCC_APB1LPENR_I2C1LPEN_Msk|macro|RCC_APB1LPENR_I2C1LPEN_Msk
DECL|RCC_APB1LPENR_I2C1LPEN_Pos|macro|RCC_APB1LPENR_I2C1LPEN_Pos
DECL|RCC_APB1LPENR_I2C1LPEN|macro|RCC_APB1LPENR_I2C1LPEN
DECL|RCC_APB1LPENR_I2C2LPEN_Msk|macro|RCC_APB1LPENR_I2C2LPEN_Msk
DECL|RCC_APB1LPENR_I2C2LPEN_Pos|macro|RCC_APB1LPENR_I2C2LPEN_Pos
DECL|RCC_APB1LPENR_I2C2LPEN|macro|RCC_APB1LPENR_I2C2LPEN
DECL|RCC_APB1LPENR_I2C3LPEN_Msk|macro|RCC_APB1LPENR_I2C3LPEN_Msk
DECL|RCC_APB1LPENR_I2C3LPEN_Pos|macro|RCC_APB1LPENR_I2C3LPEN_Pos
DECL|RCC_APB1LPENR_I2C3LPEN|macro|RCC_APB1LPENR_I2C3LPEN
DECL|RCC_APB1LPENR_LPTIM1LPEN_Msk|macro|RCC_APB1LPENR_LPTIM1LPEN_Msk
DECL|RCC_APB1LPENR_LPTIM1LPEN_Pos|macro|RCC_APB1LPENR_LPTIM1LPEN_Pos
DECL|RCC_APB1LPENR_LPTIM1LPEN|macro|RCC_APB1LPENR_LPTIM1LPEN
DECL|RCC_APB1LPENR_PWRLPEN_Msk|macro|RCC_APB1LPENR_PWRLPEN_Msk
DECL|RCC_APB1LPENR_PWRLPEN_Pos|macro|RCC_APB1LPENR_PWRLPEN_Pos
DECL|RCC_APB1LPENR_PWRLPEN|macro|RCC_APB1LPENR_PWRLPEN
DECL|RCC_APB1LPENR_RTCLPEN_Msk|macro|RCC_APB1LPENR_RTCLPEN_Msk
DECL|RCC_APB1LPENR_RTCLPEN_Pos|macro|RCC_APB1LPENR_RTCLPEN_Pos
DECL|RCC_APB1LPENR_RTCLPEN|macro|RCC_APB1LPENR_RTCLPEN
DECL|RCC_APB1LPENR_SPI2LPEN_Msk|macro|RCC_APB1LPENR_SPI2LPEN_Msk
DECL|RCC_APB1LPENR_SPI2LPEN_Pos|macro|RCC_APB1LPENR_SPI2LPEN_Pos
DECL|RCC_APB1LPENR_SPI2LPEN|macro|RCC_APB1LPENR_SPI2LPEN
DECL|RCC_APB1LPENR_SPI3LPEN_Msk|macro|RCC_APB1LPENR_SPI3LPEN_Msk
DECL|RCC_APB1LPENR_SPI3LPEN_Pos|macro|RCC_APB1LPENR_SPI3LPEN_Pos
DECL|RCC_APB1LPENR_SPI3LPEN|macro|RCC_APB1LPENR_SPI3LPEN
DECL|RCC_APB1LPENR_TIM12LPEN_Msk|macro|RCC_APB1LPENR_TIM12LPEN_Msk
DECL|RCC_APB1LPENR_TIM12LPEN_Pos|macro|RCC_APB1LPENR_TIM12LPEN_Pos
DECL|RCC_APB1LPENR_TIM12LPEN|macro|RCC_APB1LPENR_TIM12LPEN
DECL|RCC_APB1LPENR_TIM13LPEN_Msk|macro|RCC_APB1LPENR_TIM13LPEN_Msk
DECL|RCC_APB1LPENR_TIM13LPEN_Pos|macro|RCC_APB1LPENR_TIM13LPEN_Pos
DECL|RCC_APB1LPENR_TIM13LPEN|macro|RCC_APB1LPENR_TIM13LPEN
DECL|RCC_APB1LPENR_TIM14LPEN_Msk|macro|RCC_APB1LPENR_TIM14LPEN_Msk
DECL|RCC_APB1LPENR_TIM14LPEN_Pos|macro|RCC_APB1LPENR_TIM14LPEN_Pos
DECL|RCC_APB1LPENR_TIM14LPEN|macro|RCC_APB1LPENR_TIM14LPEN
DECL|RCC_APB1LPENR_TIM2LPEN_Msk|macro|RCC_APB1LPENR_TIM2LPEN_Msk
DECL|RCC_APB1LPENR_TIM2LPEN_Pos|macro|RCC_APB1LPENR_TIM2LPEN_Pos
DECL|RCC_APB1LPENR_TIM2LPEN|macro|RCC_APB1LPENR_TIM2LPEN
DECL|RCC_APB1LPENR_TIM3LPEN_Msk|macro|RCC_APB1LPENR_TIM3LPEN_Msk
DECL|RCC_APB1LPENR_TIM3LPEN_Pos|macro|RCC_APB1LPENR_TIM3LPEN_Pos
DECL|RCC_APB1LPENR_TIM3LPEN|macro|RCC_APB1LPENR_TIM3LPEN
DECL|RCC_APB1LPENR_TIM4LPEN_Msk|macro|RCC_APB1LPENR_TIM4LPEN_Msk
DECL|RCC_APB1LPENR_TIM4LPEN_Pos|macro|RCC_APB1LPENR_TIM4LPEN_Pos
DECL|RCC_APB1LPENR_TIM4LPEN|macro|RCC_APB1LPENR_TIM4LPEN
DECL|RCC_APB1LPENR_TIM5LPEN_Msk|macro|RCC_APB1LPENR_TIM5LPEN_Msk
DECL|RCC_APB1LPENR_TIM5LPEN_Pos|macro|RCC_APB1LPENR_TIM5LPEN_Pos
DECL|RCC_APB1LPENR_TIM5LPEN|macro|RCC_APB1LPENR_TIM5LPEN
DECL|RCC_APB1LPENR_TIM6LPEN_Msk|macro|RCC_APB1LPENR_TIM6LPEN_Msk
DECL|RCC_APB1LPENR_TIM6LPEN_Pos|macro|RCC_APB1LPENR_TIM6LPEN_Pos
DECL|RCC_APB1LPENR_TIM6LPEN|macro|RCC_APB1LPENR_TIM6LPEN
DECL|RCC_APB1LPENR_TIM7LPEN_Msk|macro|RCC_APB1LPENR_TIM7LPEN_Msk
DECL|RCC_APB1LPENR_TIM7LPEN_Pos|macro|RCC_APB1LPENR_TIM7LPEN_Pos
DECL|RCC_APB1LPENR_TIM7LPEN|macro|RCC_APB1LPENR_TIM7LPEN
DECL|RCC_APB1LPENR_UART4LPEN_Msk|macro|RCC_APB1LPENR_UART4LPEN_Msk
DECL|RCC_APB1LPENR_UART4LPEN_Pos|macro|RCC_APB1LPENR_UART4LPEN_Pos
DECL|RCC_APB1LPENR_UART4LPEN|macro|RCC_APB1LPENR_UART4LPEN
DECL|RCC_APB1LPENR_UART5LPEN_Msk|macro|RCC_APB1LPENR_UART5LPEN_Msk
DECL|RCC_APB1LPENR_UART5LPEN_Pos|macro|RCC_APB1LPENR_UART5LPEN_Pos
DECL|RCC_APB1LPENR_UART5LPEN|macro|RCC_APB1LPENR_UART5LPEN
DECL|RCC_APB1LPENR_UART7LPEN_Msk|macro|RCC_APB1LPENR_UART7LPEN_Msk
DECL|RCC_APB1LPENR_UART7LPEN_Pos|macro|RCC_APB1LPENR_UART7LPEN_Pos
DECL|RCC_APB1LPENR_UART7LPEN|macro|RCC_APB1LPENR_UART7LPEN
DECL|RCC_APB1LPENR_UART8LPEN_Msk|macro|RCC_APB1LPENR_UART8LPEN_Msk
DECL|RCC_APB1LPENR_UART8LPEN_Pos|macro|RCC_APB1LPENR_UART8LPEN_Pos
DECL|RCC_APB1LPENR_UART8LPEN|macro|RCC_APB1LPENR_UART8LPEN
DECL|RCC_APB1LPENR_USART2LPEN_Msk|macro|RCC_APB1LPENR_USART2LPEN_Msk
DECL|RCC_APB1LPENR_USART2LPEN_Pos|macro|RCC_APB1LPENR_USART2LPEN_Pos
DECL|RCC_APB1LPENR_USART2LPEN|macro|RCC_APB1LPENR_USART2LPEN
DECL|RCC_APB1LPENR_USART3LPEN_Msk|macro|RCC_APB1LPENR_USART3LPEN_Msk
DECL|RCC_APB1LPENR_USART3LPEN_Pos|macro|RCC_APB1LPENR_USART3LPEN_Pos
DECL|RCC_APB1LPENR_USART3LPEN|macro|RCC_APB1LPENR_USART3LPEN
DECL|RCC_APB1LPENR_WWDGLPEN_Msk|macro|RCC_APB1LPENR_WWDGLPEN_Msk
DECL|RCC_APB1LPENR_WWDGLPEN_Pos|macro|RCC_APB1LPENR_WWDGLPEN_Pos
DECL|RCC_APB1LPENR_WWDGLPEN|macro|RCC_APB1LPENR_WWDGLPEN
DECL|RCC_APB1RSTR_CAN1RST_Msk|macro|RCC_APB1RSTR_CAN1RST_Msk
DECL|RCC_APB1RSTR_CAN1RST_Pos|macro|RCC_APB1RSTR_CAN1RST_Pos
DECL|RCC_APB1RSTR_CAN1RST|macro|RCC_APB1RSTR_CAN1RST
DECL|RCC_APB1RSTR_DACRST_Msk|macro|RCC_APB1RSTR_DACRST_Msk
DECL|RCC_APB1RSTR_DACRST_Pos|macro|RCC_APB1RSTR_DACRST_Pos
DECL|RCC_APB1RSTR_DACRST|macro|RCC_APB1RSTR_DACRST
DECL|RCC_APB1RSTR_I2C1RST_Msk|macro|RCC_APB1RSTR_I2C1RST_Msk
DECL|RCC_APB1RSTR_I2C1RST_Pos|macro|RCC_APB1RSTR_I2C1RST_Pos
DECL|RCC_APB1RSTR_I2C1RST|macro|RCC_APB1RSTR_I2C1RST
DECL|RCC_APB1RSTR_I2C2RST_Msk|macro|RCC_APB1RSTR_I2C2RST_Msk
DECL|RCC_APB1RSTR_I2C2RST_Pos|macro|RCC_APB1RSTR_I2C2RST_Pos
DECL|RCC_APB1RSTR_I2C2RST|macro|RCC_APB1RSTR_I2C2RST
DECL|RCC_APB1RSTR_I2C3RST_Msk|macro|RCC_APB1RSTR_I2C3RST_Msk
DECL|RCC_APB1RSTR_I2C3RST_Pos|macro|RCC_APB1RSTR_I2C3RST_Pos
DECL|RCC_APB1RSTR_I2C3RST|macro|RCC_APB1RSTR_I2C3RST
DECL|RCC_APB1RSTR_LPTIM1RST_Msk|macro|RCC_APB1RSTR_LPTIM1RST_Msk
DECL|RCC_APB1RSTR_LPTIM1RST_Pos|macro|RCC_APB1RSTR_LPTIM1RST_Pos
DECL|RCC_APB1RSTR_LPTIM1RST|macro|RCC_APB1RSTR_LPTIM1RST
DECL|RCC_APB1RSTR_PWRRST_Msk|macro|RCC_APB1RSTR_PWRRST_Msk
DECL|RCC_APB1RSTR_PWRRST_Pos|macro|RCC_APB1RSTR_PWRRST_Pos
DECL|RCC_APB1RSTR_PWRRST|macro|RCC_APB1RSTR_PWRRST
DECL|RCC_APB1RSTR_SPI2RST_Msk|macro|RCC_APB1RSTR_SPI2RST_Msk
DECL|RCC_APB1RSTR_SPI2RST_Pos|macro|RCC_APB1RSTR_SPI2RST_Pos
DECL|RCC_APB1RSTR_SPI2RST|macro|RCC_APB1RSTR_SPI2RST
DECL|RCC_APB1RSTR_SPI3RST_Msk|macro|RCC_APB1RSTR_SPI3RST_Msk
DECL|RCC_APB1RSTR_SPI3RST_Pos|macro|RCC_APB1RSTR_SPI3RST_Pos
DECL|RCC_APB1RSTR_SPI3RST|macro|RCC_APB1RSTR_SPI3RST
DECL|RCC_APB1RSTR_TIM12RST_Msk|macro|RCC_APB1RSTR_TIM12RST_Msk
DECL|RCC_APB1RSTR_TIM12RST_Pos|macro|RCC_APB1RSTR_TIM12RST_Pos
DECL|RCC_APB1RSTR_TIM12RST|macro|RCC_APB1RSTR_TIM12RST
DECL|RCC_APB1RSTR_TIM13RST_Msk|macro|RCC_APB1RSTR_TIM13RST_Msk
DECL|RCC_APB1RSTR_TIM13RST_Pos|macro|RCC_APB1RSTR_TIM13RST_Pos
DECL|RCC_APB1RSTR_TIM13RST|macro|RCC_APB1RSTR_TIM13RST
DECL|RCC_APB1RSTR_TIM14RST_Msk|macro|RCC_APB1RSTR_TIM14RST_Msk
DECL|RCC_APB1RSTR_TIM14RST_Pos|macro|RCC_APB1RSTR_TIM14RST_Pos
DECL|RCC_APB1RSTR_TIM14RST|macro|RCC_APB1RSTR_TIM14RST
DECL|RCC_APB1RSTR_TIM2RST_Msk|macro|RCC_APB1RSTR_TIM2RST_Msk
DECL|RCC_APB1RSTR_TIM2RST_Pos|macro|RCC_APB1RSTR_TIM2RST_Pos
DECL|RCC_APB1RSTR_TIM2RST|macro|RCC_APB1RSTR_TIM2RST
DECL|RCC_APB1RSTR_TIM3RST_Msk|macro|RCC_APB1RSTR_TIM3RST_Msk
DECL|RCC_APB1RSTR_TIM3RST_Pos|macro|RCC_APB1RSTR_TIM3RST_Pos
DECL|RCC_APB1RSTR_TIM3RST|macro|RCC_APB1RSTR_TIM3RST
DECL|RCC_APB1RSTR_TIM4RST_Msk|macro|RCC_APB1RSTR_TIM4RST_Msk
DECL|RCC_APB1RSTR_TIM4RST_Pos|macro|RCC_APB1RSTR_TIM4RST_Pos
DECL|RCC_APB1RSTR_TIM4RST|macro|RCC_APB1RSTR_TIM4RST
DECL|RCC_APB1RSTR_TIM5RST_Msk|macro|RCC_APB1RSTR_TIM5RST_Msk
DECL|RCC_APB1RSTR_TIM5RST_Pos|macro|RCC_APB1RSTR_TIM5RST_Pos
DECL|RCC_APB1RSTR_TIM5RST|macro|RCC_APB1RSTR_TIM5RST
DECL|RCC_APB1RSTR_TIM6RST_Msk|macro|RCC_APB1RSTR_TIM6RST_Msk
DECL|RCC_APB1RSTR_TIM6RST_Pos|macro|RCC_APB1RSTR_TIM6RST_Pos
DECL|RCC_APB1RSTR_TIM6RST|macro|RCC_APB1RSTR_TIM6RST
DECL|RCC_APB1RSTR_TIM7RST_Msk|macro|RCC_APB1RSTR_TIM7RST_Msk
DECL|RCC_APB1RSTR_TIM7RST_Pos|macro|RCC_APB1RSTR_TIM7RST_Pos
DECL|RCC_APB1RSTR_TIM7RST|macro|RCC_APB1RSTR_TIM7RST
DECL|RCC_APB1RSTR_UART4RST_Msk|macro|RCC_APB1RSTR_UART4RST_Msk
DECL|RCC_APB1RSTR_UART4RST_Pos|macro|RCC_APB1RSTR_UART4RST_Pos
DECL|RCC_APB1RSTR_UART4RST|macro|RCC_APB1RSTR_UART4RST
DECL|RCC_APB1RSTR_UART5RST_Msk|macro|RCC_APB1RSTR_UART5RST_Msk
DECL|RCC_APB1RSTR_UART5RST_Pos|macro|RCC_APB1RSTR_UART5RST_Pos
DECL|RCC_APB1RSTR_UART5RST|macro|RCC_APB1RSTR_UART5RST
DECL|RCC_APB1RSTR_UART7RST_Msk|macro|RCC_APB1RSTR_UART7RST_Msk
DECL|RCC_APB1RSTR_UART7RST_Pos|macro|RCC_APB1RSTR_UART7RST_Pos
DECL|RCC_APB1RSTR_UART7RST|macro|RCC_APB1RSTR_UART7RST
DECL|RCC_APB1RSTR_UART8RST_Msk|macro|RCC_APB1RSTR_UART8RST_Msk
DECL|RCC_APB1RSTR_UART8RST_Pos|macro|RCC_APB1RSTR_UART8RST_Pos
DECL|RCC_APB1RSTR_UART8RST|macro|RCC_APB1RSTR_UART8RST
DECL|RCC_APB1RSTR_USART2RST_Msk|macro|RCC_APB1RSTR_USART2RST_Msk
DECL|RCC_APB1RSTR_USART2RST_Pos|macro|RCC_APB1RSTR_USART2RST_Pos
DECL|RCC_APB1RSTR_USART2RST|macro|RCC_APB1RSTR_USART2RST
DECL|RCC_APB1RSTR_USART3RST_Msk|macro|RCC_APB1RSTR_USART3RST_Msk
DECL|RCC_APB1RSTR_USART3RST_Pos|macro|RCC_APB1RSTR_USART3RST_Pos
DECL|RCC_APB1RSTR_USART3RST|macro|RCC_APB1RSTR_USART3RST
DECL|RCC_APB1RSTR_WWDGRST_Msk|macro|RCC_APB1RSTR_WWDGRST_Msk
DECL|RCC_APB1RSTR_WWDGRST_Pos|macro|RCC_APB1RSTR_WWDGRST_Pos
DECL|RCC_APB1RSTR_WWDGRST|macro|RCC_APB1RSTR_WWDGRST
DECL|RCC_APB2ENR_ADC1EN_Msk|macro|RCC_APB2ENR_ADC1EN_Msk
DECL|RCC_APB2ENR_ADC1EN_Pos|macro|RCC_APB2ENR_ADC1EN_Pos
DECL|RCC_APB2ENR_ADC1EN|macro|RCC_APB2ENR_ADC1EN
DECL|RCC_APB2ENR_ADC2EN_Msk|macro|RCC_APB2ENR_ADC2EN_Msk
DECL|RCC_APB2ENR_ADC2EN_Pos|macro|RCC_APB2ENR_ADC2EN_Pos
DECL|RCC_APB2ENR_ADC2EN|macro|RCC_APB2ENR_ADC2EN
DECL|RCC_APB2ENR_ADC3EN_Msk|macro|RCC_APB2ENR_ADC3EN_Msk
DECL|RCC_APB2ENR_ADC3EN_Pos|macro|RCC_APB2ENR_ADC3EN_Pos
DECL|RCC_APB2ENR_ADC3EN|macro|RCC_APB2ENR_ADC3EN
DECL|RCC_APB2ENR_SAI1EN_Msk|macro|RCC_APB2ENR_SAI1EN_Msk
DECL|RCC_APB2ENR_SAI1EN_Pos|macro|RCC_APB2ENR_SAI1EN_Pos
DECL|RCC_APB2ENR_SAI1EN|macro|RCC_APB2ENR_SAI1EN
DECL|RCC_APB2ENR_SAI2EN_Msk|macro|RCC_APB2ENR_SAI2EN_Msk
DECL|RCC_APB2ENR_SAI2EN_Pos|macro|RCC_APB2ENR_SAI2EN_Pos
DECL|RCC_APB2ENR_SAI2EN|macro|RCC_APB2ENR_SAI2EN
DECL|RCC_APB2ENR_SDMMC1EN_Msk|macro|RCC_APB2ENR_SDMMC1EN_Msk
DECL|RCC_APB2ENR_SDMMC1EN_Pos|macro|RCC_APB2ENR_SDMMC1EN_Pos
DECL|RCC_APB2ENR_SDMMC1EN|macro|RCC_APB2ENR_SDMMC1EN
DECL|RCC_APB2ENR_SDMMC2EN_Msk|macro|RCC_APB2ENR_SDMMC2EN_Msk
DECL|RCC_APB2ENR_SDMMC2EN_Pos|macro|RCC_APB2ENR_SDMMC2EN_Pos
DECL|RCC_APB2ENR_SDMMC2EN|macro|RCC_APB2ENR_SDMMC2EN
DECL|RCC_APB2ENR_SPI1EN_Msk|macro|RCC_APB2ENR_SPI1EN_Msk
DECL|RCC_APB2ENR_SPI1EN_Pos|macro|RCC_APB2ENR_SPI1EN_Pos
DECL|RCC_APB2ENR_SPI1EN|macro|RCC_APB2ENR_SPI1EN
DECL|RCC_APB2ENR_SPI4EN_Msk|macro|RCC_APB2ENR_SPI4EN_Msk
DECL|RCC_APB2ENR_SPI4EN_Pos|macro|RCC_APB2ENR_SPI4EN_Pos
DECL|RCC_APB2ENR_SPI4EN|macro|RCC_APB2ENR_SPI4EN
DECL|RCC_APB2ENR_SPI5EN_Msk|macro|RCC_APB2ENR_SPI5EN_Msk
DECL|RCC_APB2ENR_SPI5EN_Pos|macro|RCC_APB2ENR_SPI5EN_Pos
DECL|RCC_APB2ENR_SPI5EN|macro|RCC_APB2ENR_SPI5EN
DECL|RCC_APB2ENR_SYSCFGEN_Msk|macro|RCC_APB2ENR_SYSCFGEN_Msk
DECL|RCC_APB2ENR_SYSCFGEN_Pos|macro|RCC_APB2ENR_SYSCFGEN_Pos
DECL|RCC_APB2ENR_SYSCFGEN|macro|RCC_APB2ENR_SYSCFGEN
DECL|RCC_APB2ENR_TIM10EN_Msk|macro|RCC_APB2ENR_TIM10EN_Msk
DECL|RCC_APB2ENR_TIM10EN_Pos|macro|RCC_APB2ENR_TIM10EN_Pos
DECL|RCC_APB2ENR_TIM10EN|macro|RCC_APB2ENR_TIM10EN
DECL|RCC_APB2ENR_TIM11EN_Msk|macro|RCC_APB2ENR_TIM11EN_Msk
DECL|RCC_APB2ENR_TIM11EN_Pos|macro|RCC_APB2ENR_TIM11EN_Pos
DECL|RCC_APB2ENR_TIM11EN|macro|RCC_APB2ENR_TIM11EN
DECL|RCC_APB2ENR_TIM1EN_Msk|macro|RCC_APB2ENR_TIM1EN_Msk
DECL|RCC_APB2ENR_TIM1EN_Pos|macro|RCC_APB2ENR_TIM1EN_Pos
DECL|RCC_APB2ENR_TIM1EN|macro|RCC_APB2ENR_TIM1EN
DECL|RCC_APB2ENR_TIM8EN_Msk|macro|RCC_APB2ENR_TIM8EN_Msk
DECL|RCC_APB2ENR_TIM8EN_Pos|macro|RCC_APB2ENR_TIM8EN_Pos
DECL|RCC_APB2ENR_TIM8EN|macro|RCC_APB2ENR_TIM8EN
DECL|RCC_APB2ENR_TIM9EN_Msk|macro|RCC_APB2ENR_TIM9EN_Msk
DECL|RCC_APB2ENR_TIM9EN_Pos|macro|RCC_APB2ENR_TIM9EN_Pos
DECL|RCC_APB2ENR_TIM9EN|macro|RCC_APB2ENR_TIM9EN
DECL|RCC_APB2ENR_USART1EN_Msk|macro|RCC_APB2ENR_USART1EN_Msk
DECL|RCC_APB2ENR_USART1EN_Pos|macro|RCC_APB2ENR_USART1EN_Pos
DECL|RCC_APB2ENR_USART1EN|macro|RCC_APB2ENR_USART1EN
DECL|RCC_APB2ENR_USART6EN_Msk|macro|RCC_APB2ENR_USART6EN_Msk
DECL|RCC_APB2ENR_USART6EN_Pos|macro|RCC_APB2ENR_USART6EN_Pos
DECL|RCC_APB2ENR_USART6EN|macro|RCC_APB2ENR_USART6EN
DECL|RCC_APB2LPENR_ADC1LPEN_Msk|macro|RCC_APB2LPENR_ADC1LPEN_Msk
DECL|RCC_APB2LPENR_ADC1LPEN_Pos|macro|RCC_APB2LPENR_ADC1LPEN_Pos
DECL|RCC_APB2LPENR_ADC1LPEN|macro|RCC_APB2LPENR_ADC1LPEN
DECL|RCC_APB2LPENR_ADC2LPEN_Msk|macro|RCC_APB2LPENR_ADC2LPEN_Msk
DECL|RCC_APB2LPENR_ADC2LPEN_Pos|macro|RCC_APB2LPENR_ADC2LPEN_Pos
DECL|RCC_APB2LPENR_ADC2LPEN|macro|RCC_APB2LPENR_ADC2LPEN
DECL|RCC_APB2LPENR_ADC3LPEN_Msk|macro|RCC_APB2LPENR_ADC3LPEN_Msk
DECL|RCC_APB2LPENR_ADC3LPEN_Pos|macro|RCC_APB2LPENR_ADC3LPEN_Pos
DECL|RCC_APB2LPENR_ADC3LPEN|macro|RCC_APB2LPENR_ADC3LPEN
DECL|RCC_APB2LPENR_SAI1LPEN_Msk|macro|RCC_APB2LPENR_SAI1LPEN_Msk
DECL|RCC_APB2LPENR_SAI1LPEN_Pos|macro|RCC_APB2LPENR_SAI1LPEN_Pos
DECL|RCC_APB2LPENR_SAI1LPEN|macro|RCC_APB2LPENR_SAI1LPEN
DECL|RCC_APB2LPENR_SAI2LPEN_Msk|macro|RCC_APB2LPENR_SAI2LPEN_Msk
DECL|RCC_APB2LPENR_SAI2LPEN_Pos|macro|RCC_APB2LPENR_SAI2LPEN_Pos
DECL|RCC_APB2LPENR_SAI2LPEN|macro|RCC_APB2LPENR_SAI2LPEN
DECL|RCC_APB2LPENR_SDMMC1LPEN_Msk|macro|RCC_APB2LPENR_SDMMC1LPEN_Msk
DECL|RCC_APB2LPENR_SDMMC1LPEN_Pos|macro|RCC_APB2LPENR_SDMMC1LPEN_Pos
DECL|RCC_APB2LPENR_SDMMC1LPEN|macro|RCC_APB2LPENR_SDMMC1LPEN
DECL|RCC_APB2LPENR_SDMMC2LPEN_Msk|macro|RCC_APB2LPENR_SDMMC2LPEN_Msk
DECL|RCC_APB2LPENR_SDMMC2LPEN_Pos|macro|RCC_APB2LPENR_SDMMC2LPEN_Pos
DECL|RCC_APB2LPENR_SDMMC2LPEN|macro|RCC_APB2LPENR_SDMMC2LPEN
DECL|RCC_APB2LPENR_SPI1LPEN_Msk|macro|RCC_APB2LPENR_SPI1LPEN_Msk
DECL|RCC_APB2LPENR_SPI1LPEN_Pos|macro|RCC_APB2LPENR_SPI1LPEN_Pos
DECL|RCC_APB2LPENR_SPI1LPEN|macro|RCC_APB2LPENR_SPI1LPEN
DECL|RCC_APB2LPENR_SPI4LPEN_Msk|macro|RCC_APB2LPENR_SPI4LPEN_Msk
DECL|RCC_APB2LPENR_SPI4LPEN_Pos|macro|RCC_APB2LPENR_SPI4LPEN_Pos
DECL|RCC_APB2LPENR_SPI4LPEN|macro|RCC_APB2LPENR_SPI4LPEN
DECL|RCC_APB2LPENR_SPI5LPEN_Msk|macro|RCC_APB2LPENR_SPI5LPEN_Msk
DECL|RCC_APB2LPENR_SPI5LPEN_Pos|macro|RCC_APB2LPENR_SPI5LPEN_Pos
DECL|RCC_APB2LPENR_SPI5LPEN|macro|RCC_APB2LPENR_SPI5LPEN
DECL|RCC_APB2LPENR_SYSCFGLPEN_Msk|macro|RCC_APB2LPENR_SYSCFGLPEN_Msk
DECL|RCC_APB2LPENR_SYSCFGLPEN_Pos|macro|RCC_APB2LPENR_SYSCFGLPEN_Pos
DECL|RCC_APB2LPENR_SYSCFGLPEN|macro|RCC_APB2LPENR_SYSCFGLPEN
DECL|RCC_APB2LPENR_TIM10LPEN_Msk|macro|RCC_APB2LPENR_TIM10LPEN_Msk
DECL|RCC_APB2LPENR_TIM10LPEN_Pos|macro|RCC_APB2LPENR_TIM10LPEN_Pos
DECL|RCC_APB2LPENR_TIM10LPEN|macro|RCC_APB2LPENR_TIM10LPEN
DECL|RCC_APB2LPENR_TIM11LPEN_Msk|macro|RCC_APB2LPENR_TIM11LPEN_Msk
DECL|RCC_APB2LPENR_TIM11LPEN_Pos|macro|RCC_APB2LPENR_TIM11LPEN_Pos
DECL|RCC_APB2LPENR_TIM11LPEN|macro|RCC_APB2LPENR_TIM11LPEN
DECL|RCC_APB2LPENR_TIM1LPEN_Msk|macro|RCC_APB2LPENR_TIM1LPEN_Msk
DECL|RCC_APB2LPENR_TIM1LPEN_Pos|macro|RCC_APB2LPENR_TIM1LPEN_Pos
DECL|RCC_APB2LPENR_TIM1LPEN|macro|RCC_APB2LPENR_TIM1LPEN
DECL|RCC_APB2LPENR_TIM8LPEN_Msk|macro|RCC_APB2LPENR_TIM8LPEN_Msk
DECL|RCC_APB2LPENR_TIM8LPEN_Pos|macro|RCC_APB2LPENR_TIM8LPEN_Pos
DECL|RCC_APB2LPENR_TIM8LPEN|macro|RCC_APB2LPENR_TIM8LPEN
DECL|RCC_APB2LPENR_TIM9LPEN_Msk|macro|RCC_APB2LPENR_TIM9LPEN_Msk
DECL|RCC_APB2LPENR_TIM9LPEN_Pos|macro|RCC_APB2LPENR_TIM9LPEN_Pos
DECL|RCC_APB2LPENR_TIM9LPEN|macro|RCC_APB2LPENR_TIM9LPEN
DECL|RCC_APB2LPENR_USART1LPEN_Msk|macro|RCC_APB2LPENR_USART1LPEN_Msk
DECL|RCC_APB2LPENR_USART1LPEN_Pos|macro|RCC_APB2LPENR_USART1LPEN_Pos
DECL|RCC_APB2LPENR_USART1LPEN|macro|RCC_APB2LPENR_USART1LPEN
DECL|RCC_APB2LPENR_USART6LPEN_Msk|macro|RCC_APB2LPENR_USART6LPEN_Msk
DECL|RCC_APB2LPENR_USART6LPEN_Pos|macro|RCC_APB2LPENR_USART6LPEN_Pos
DECL|RCC_APB2LPENR_USART6LPEN|macro|RCC_APB2LPENR_USART6LPEN
DECL|RCC_APB2RSTR_ADCRST_Msk|macro|RCC_APB2RSTR_ADCRST_Msk
DECL|RCC_APB2RSTR_ADCRST_Pos|macro|RCC_APB2RSTR_ADCRST_Pos
DECL|RCC_APB2RSTR_ADCRST|macro|RCC_APB2RSTR_ADCRST
DECL|RCC_APB2RSTR_SAI1RST_Msk|macro|RCC_APB2RSTR_SAI1RST_Msk
DECL|RCC_APB2RSTR_SAI1RST_Pos|macro|RCC_APB2RSTR_SAI1RST_Pos
DECL|RCC_APB2RSTR_SAI1RST|macro|RCC_APB2RSTR_SAI1RST
DECL|RCC_APB2RSTR_SAI2RST_Msk|macro|RCC_APB2RSTR_SAI2RST_Msk
DECL|RCC_APB2RSTR_SAI2RST_Pos|macro|RCC_APB2RSTR_SAI2RST_Pos
DECL|RCC_APB2RSTR_SAI2RST|macro|RCC_APB2RSTR_SAI2RST
DECL|RCC_APB2RSTR_SDMMC1RST_Msk|macro|RCC_APB2RSTR_SDMMC1RST_Msk
DECL|RCC_APB2RSTR_SDMMC1RST_Pos|macro|RCC_APB2RSTR_SDMMC1RST_Pos
DECL|RCC_APB2RSTR_SDMMC1RST|macro|RCC_APB2RSTR_SDMMC1RST
DECL|RCC_APB2RSTR_SDMMC2RST_Msk|macro|RCC_APB2RSTR_SDMMC2RST_Msk
DECL|RCC_APB2RSTR_SDMMC2RST_Pos|macro|RCC_APB2RSTR_SDMMC2RST_Pos
DECL|RCC_APB2RSTR_SDMMC2RST|macro|RCC_APB2RSTR_SDMMC2RST
DECL|RCC_APB2RSTR_SPI1RST_Msk|macro|RCC_APB2RSTR_SPI1RST_Msk
DECL|RCC_APB2RSTR_SPI1RST_Pos|macro|RCC_APB2RSTR_SPI1RST_Pos
DECL|RCC_APB2RSTR_SPI1RST|macro|RCC_APB2RSTR_SPI1RST
DECL|RCC_APB2RSTR_SPI4RST_Msk|macro|RCC_APB2RSTR_SPI4RST_Msk
DECL|RCC_APB2RSTR_SPI4RST_Pos|macro|RCC_APB2RSTR_SPI4RST_Pos
DECL|RCC_APB2RSTR_SPI4RST|macro|RCC_APB2RSTR_SPI4RST
DECL|RCC_APB2RSTR_SPI5RST_Msk|macro|RCC_APB2RSTR_SPI5RST_Msk
DECL|RCC_APB2RSTR_SPI5RST_Pos|macro|RCC_APB2RSTR_SPI5RST_Pos
DECL|RCC_APB2RSTR_SPI5RST|macro|RCC_APB2RSTR_SPI5RST
DECL|RCC_APB2RSTR_SYSCFGRST_Msk|macro|RCC_APB2RSTR_SYSCFGRST_Msk
DECL|RCC_APB2RSTR_SYSCFGRST_Pos|macro|RCC_APB2RSTR_SYSCFGRST_Pos
DECL|RCC_APB2RSTR_SYSCFGRST|macro|RCC_APB2RSTR_SYSCFGRST
DECL|RCC_APB2RSTR_TIM10RST_Msk|macro|RCC_APB2RSTR_TIM10RST_Msk
DECL|RCC_APB2RSTR_TIM10RST_Pos|macro|RCC_APB2RSTR_TIM10RST_Pos
DECL|RCC_APB2RSTR_TIM10RST|macro|RCC_APB2RSTR_TIM10RST
DECL|RCC_APB2RSTR_TIM11RST_Msk|macro|RCC_APB2RSTR_TIM11RST_Msk
DECL|RCC_APB2RSTR_TIM11RST_Pos|macro|RCC_APB2RSTR_TIM11RST_Pos
DECL|RCC_APB2RSTR_TIM11RST|macro|RCC_APB2RSTR_TIM11RST
DECL|RCC_APB2RSTR_TIM1RST_Msk|macro|RCC_APB2RSTR_TIM1RST_Msk
DECL|RCC_APB2RSTR_TIM1RST_Pos|macro|RCC_APB2RSTR_TIM1RST_Pos
DECL|RCC_APB2RSTR_TIM1RST|macro|RCC_APB2RSTR_TIM1RST
DECL|RCC_APB2RSTR_TIM8RST_Msk|macro|RCC_APB2RSTR_TIM8RST_Msk
DECL|RCC_APB2RSTR_TIM8RST_Pos|macro|RCC_APB2RSTR_TIM8RST_Pos
DECL|RCC_APB2RSTR_TIM8RST|macro|RCC_APB2RSTR_TIM8RST
DECL|RCC_APB2RSTR_TIM9RST_Msk|macro|RCC_APB2RSTR_TIM9RST_Msk
DECL|RCC_APB2RSTR_TIM9RST_Pos|macro|RCC_APB2RSTR_TIM9RST_Pos
DECL|RCC_APB2RSTR_TIM9RST|macro|RCC_APB2RSTR_TIM9RST
DECL|RCC_APB2RSTR_USART1RST_Msk|macro|RCC_APB2RSTR_USART1RST_Msk
DECL|RCC_APB2RSTR_USART1RST_Pos|macro|RCC_APB2RSTR_USART1RST_Pos
DECL|RCC_APB2RSTR_USART1RST|macro|RCC_APB2RSTR_USART1RST
DECL|RCC_APB2RSTR_USART6RST_Msk|macro|RCC_APB2RSTR_USART6RST_Msk
DECL|RCC_APB2RSTR_USART6RST_Pos|macro|RCC_APB2RSTR_USART6RST_Pos
DECL|RCC_APB2RSTR_USART6RST|macro|RCC_APB2RSTR_USART6RST
DECL|RCC_BASE|macro|RCC_BASE
DECL|RCC_BDCR_BDRST_Msk|macro|RCC_BDCR_BDRST_Msk
DECL|RCC_BDCR_BDRST_Pos|macro|RCC_BDCR_BDRST_Pos
DECL|RCC_BDCR_BDRST|macro|RCC_BDCR_BDRST
DECL|RCC_BDCR_LSEBYP_Msk|macro|RCC_BDCR_LSEBYP_Msk
DECL|RCC_BDCR_LSEBYP_Pos|macro|RCC_BDCR_LSEBYP_Pos
DECL|RCC_BDCR_LSEBYP|macro|RCC_BDCR_LSEBYP
DECL|RCC_BDCR_LSEDRV_0|macro|RCC_BDCR_LSEDRV_0
DECL|RCC_BDCR_LSEDRV_1|macro|RCC_BDCR_LSEDRV_1
DECL|RCC_BDCR_LSEDRV_Msk|macro|RCC_BDCR_LSEDRV_Msk
DECL|RCC_BDCR_LSEDRV_Pos|macro|RCC_BDCR_LSEDRV_Pos
DECL|RCC_BDCR_LSEDRV|macro|RCC_BDCR_LSEDRV
DECL|RCC_BDCR_LSEON_Msk|macro|RCC_BDCR_LSEON_Msk
DECL|RCC_BDCR_LSEON_Pos|macro|RCC_BDCR_LSEON_Pos
DECL|RCC_BDCR_LSEON|macro|RCC_BDCR_LSEON
DECL|RCC_BDCR_LSERDY_Msk|macro|RCC_BDCR_LSERDY_Msk
DECL|RCC_BDCR_LSERDY_Pos|macro|RCC_BDCR_LSERDY_Pos
DECL|RCC_BDCR_LSERDY|macro|RCC_BDCR_LSERDY
DECL|RCC_BDCR_RTCEN_Msk|macro|RCC_BDCR_RTCEN_Msk
DECL|RCC_BDCR_RTCEN_Pos|macro|RCC_BDCR_RTCEN_Pos
DECL|RCC_BDCR_RTCEN|macro|RCC_BDCR_RTCEN
DECL|RCC_BDCR_RTCSEL_0|macro|RCC_BDCR_RTCSEL_0
DECL|RCC_BDCR_RTCSEL_1|macro|RCC_BDCR_RTCSEL_1
DECL|RCC_BDCR_RTCSEL_Msk|macro|RCC_BDCR_RTCSEL_Msk
DECL|RCC_BDCR_RTCSEL_Pos|macro|RCC_BDCR_RTCSEL_Pos
DECL|RCC_BDCR_RTCSEL|macro|RCC_BDCR_RTCSEL
DECL|RCC_CFGR_HPRE_0|macro|RCC_CFGR_HPRE_0
DECL|RCC_CFGR_HPRE_1|macro|RCC_CFGR_HPRE_1
DECL|RCC_CFGR_HPRE_2|macro|RCC_CFGR_HPRE_2
DECL|RCC_CFGR_HPRE_3|macro|RCC_CFGR_HPRE_3
DECL|RCC_CFGR_HPRE_DIV128|macro|RCC_CFGR_HPRE_DIV128
DECL|RCC_CFGR_HPRE_DIV16|macro|RCC_CFGR_HPRE_DIV16
DECL|RCC_CFGR_HPRE_DIV1|macro|RCC_CFGR_HPRE_DIV1
DECL|RCC_CFGR_HPRE_DIV256|macro|RCC_CFGR_HPRE_DIV256
DECL|RCC_CFGR_HPRE_DIV2|macro|RCC_CFGR_HPRE_DIV2
DECL|RCC_CFGR_HPRE_DIV4|macro|RCC_CFGR_HPRE_DIV4
DECL|RCC_CFGR_HPRE_DIV512|macro|RCC_CFGR_HPRE_DIV512
DECL|RCC_CFGR_HPRE_DIV64|macro|RCC_CFGR_HPRE_DIV64
DECL|RCC_CFGR_HPRE_DIV8|macro|RCC_CFGR_HPRE_DIV8
DECL|RCC_CFGR_HPRE_Msk|macro|RCC_CFGR_HPRE_Msk
DECL|RCC_CFGR_HPRE_Pos|macro|RCC_CFGR_HPRE_Pos
DECL|RCC_CFGR_HPRE|macro|RCC_CFGR_HPRE
DECL|RCC_CFGR_I2SSRC_Msk|macro|RCC_CFGR_I2SSRC_Msk
DECL|RCC_CFGR_I2SSRC_Pos|macro|RCC_CFGR_I2SSRC_Pos
DECL|RCC_CFGR_I2SSRC|macro|RCC_CFGR_I2SSRC
DECL|RCC_CFGR_MCO1PRE_0|macro|RCC_CFGR_MCO1PRE_0
DECL|RCC_CFGR_MCO1PRE_1|macro|RCC_CFGR_MCO1PRE_1
DECL|RCC_CFGR_MCO1PRE_2|macro|RCC_CFGR_MCO1PRE_2
DECL|RCC_CFGR_MCO1PRE_Msk|macro|RCC_CFGR_MCO1PRE_Msk
DECL|RCC_CFGR_MCO1PRE_Pos|macro|RCC_CFGR_MCO1PRE_Pos
DECL|RCC_CFGR_MCO1PRE|macro|RCC_CFGR_MCO1PRE
DECL|RCC_CFGR_MCO1_0|macro|RCC_CFGR_MCO1_0
DECL|RCC_CFGR_MCO1_1|macro|RCC_CFGR_MCO1_1
DECL|RCC_CFGR_MCO1_Msk|macro|RCC_CFGR_MCO1_Msk
DECL|RCC_CFGR_MCO1_Pos|macro|RCC_CFGR_MCO1_Pos
DECL|RCC_CFGR_MCO1|macro|RCC_CFGR_MCO1
DECL|RCC_CFGR_MCO2PRE_0|macro|RCC_CFGR_MCO2PRE_0
DECL|RCC_CFGR_MCO2PRE_1|macro|RCC_CFGR_MCO2PRE_1
DECL|RCC_CFGR_MCO2PRE_2|macro|RCC_CFGR_MCO2PRE_2
DECL|RCC_CFGR_MCO2PRE_Msk|macro|RCC_CFGR_MCO2PRE_Msk
DECL|RCC_CFGR_MCO2PRE_Pos|macro|RCC_CFGR_MCO2PRE_Pos
DECL|RCC_CFGR_MCO2PRE|macro|RCC_CFGR_MCO2PRE
DECL|RCC_CFGR_MCO2_0|macro|RCC_CFGR_MCO2_0
DECL|RCC_CFGR_MCO2_1|macro|RCC_CFGR_MCO2_1
DECL|RCC_CFGR_MCO2_Msk|macro|RCC_CFGR_MCO2_Msk
DECL|RCC_CFGR_MCO2_Pos|macro|RCC_CFGR_MCO2_Pos
DECL|RCC_CFGR_MCO2|macro|RCC_CFGR_MCO2
DECL|RCC_CFGR_PPRE1_0|macro|RCC_CFGR_PPRE1_0
DECL|RCC_CFGR_PPRE1_1|macro|RCC_CFGR_PPRE1_1
DECL|RCC_CFGR_PPRE1_2|macro|RCC_CFGR_PPRE1_2
DECL|RCC_CFGR_PPRE1_DIV16|macro|RCC_CFGR_PPRE1_DIV16
DECL|RCC_CFGR_PPRE1_DIV1|macro|RCC_CFGR_PPRE1_DIV1
DECL|RCC_CFGR_PPRE1_DIV2|macro|RCC_CFGR_PPRE1_DIV2
DECL|RCC_CFGR_PPRE1_DIV4|macro|RCC_CFGR_PPRE1_DIV4
DECL|RCC_CFGR_PPRE1_DIV8|macro|RCC_CFGR_PPRE1_DIV8
DECL|RCC_CFGR_PPRE1_Msk|macro|RCC_CFGR_PPRE1_Msk
DECL|RCC_CFGR_PPRE1_Pos|macro|RCC_CFGR_PPRE1_Pos
DECL|RCC_CFGR_PPRE1|macro|RCC_CFGR_PPRE1
DECL|RCC_CFGR_PPRE2_0|macro|RCC_CFGR_PPRE2_0
DECL|RCC_CFGR_PPRE2_1|macro|RCC_CFGR_PPRE2_1
DECL|RCC_CFGR_PPRE2_2|macro|RCC_CFGR_PPRE2_2
DECL|RCC_CFGR_PPRE2_DIV16|macro|RCC_CFGR_PPRE2_DIV16
DECL|RCC_CFGR_PPRE2_DIV1|macro|RCC_CFGR_PPRE2_DIV1
DECL|RCC_CFGR_PPRE2_DIV2|macro|RCC_CFGR_PPRE2_DIV2
DECL|RCC_CFGR_PPRE2_DIV4|macro|RCC_CFGR_PPRE2_DIV4
DECL|RCC_CFGR_PPRE2_DIV8|macro|RCC_CFGR_PPRE2_DIV8
DECL|RCC_CFGR_PPRE2_Msk|macro|RCC_CFGR_PPRE2_Msk
DECL|RCC_CFGR_PPRE2_Pos|macro|RCC_CFGR_PPRE2_Pos
DECL|RCC_CFGR_PPRE2|macro|RCC_CFGR_PPRE2
DECL|RCC_CFGR_RTCPRE_0|macro|RCC_CFGR_RTCPRE_0
DECL|RCC_CFGR_RTCPRE_1|macro|RCC_CFGR_RTCPRE_1
DECL|RCC_CFGR_RTCPRE_2|macro|RCC_CFGR_RTCPRE_2
DECL|RCC_CFGR_RTCPRE_3|macro|RCC_CFGR_RTCPRE_3
DECL|RCC_CFGR_RTCPRE_4|macro|RCC_CFGR_RTCPRE_4
DECL|RCC_CFGR_RTCPRE_Msk|macro|RCC_CFGR_RTCPRE_Msk
DECL|RCC_CFGR_RTCPRE_Pos|macro|RCC_CFGR_RTCPRE_Pos
DECL|RCC_CFGR_RTCPRE|macro|RCC_CFGR_RTCPRE
DECL|RCC_CFGR_SWS_0|macro|RCC_CFGR_SWS_0
DECL|RCC_CFGR_SWS_1|macro|RCC_CFGR_SWS_1
DECL|RCC_CFGR_SWS_HSE|macro|RCC_CFGR_SWS_HSE
DECL|RCC_CFGR_SWS_HSI|macro|RCC_CFGR_SWS_HSI
DECL|RCC_CFGR_SWS_Msk|macro|RCC_CFGR_SWS_Msk
DECL|RCC_CFGR_SWS_PLL|macro|RCC_CFGR_SWS_PLL
DECL|RCC_CFGR_SWS_Pos|macro|RCC_CFGR_SWS_Pos
DECL|RCC_CFGR_SWS|macro|RCC_CFGR_SWS
DECL|RCC_CFGR_SW_0|macro|RCC_CFGR_SW_0
DECL|RCC_CFGR_SW_1|macro|RCC_CFGR_SW_1
DECL|RCC_CFGR_SW_HSE|macro|RCC_CFGR_SW_HSE
DECL|RCC_CFGR_SW_HSI|macro|RCC_CFGR_SW_HSI
DECL|RCC_CFGR_SW_Msk|macro|RCC_CFGR_SW_Msk
DECL|RCC_CFGR_SW_PLL|macro|RCC_CFGR_SW_PLL
DECL|RCC_CFGR_SW_Pos|macro|RCC_CFGR_SW_Pos
DECL|RCC_CFGR_SW|macro|RCC_CFGR_SW
DECL|RCC_CIR_CSSC_Msk|macro|RCC_CIR_CSSC_Msk
DECL|RCC_CIR_CSSC_Pos|macro|RCC_CIR_CSSC_Pos
DECL|RCC_CIR_CSSC|macro|RCC_CIR_CSSC
DECL|RCC_CIR_CSSF_Msk|macro|RCC_CIR_CSSF_Msk
DECL|RCC_CIR_CSSF_Pos|macro|RCC_CIR_CSSF_Pos
DECL|RCC_CIR_CSSF|macro|RCC_CIR_CSSF
DECL|RCC_CIR_HSERDYC_Msk|macro|RCC_CIR_HSERDYC_Msk
DECL|RCC_CIR_HSERDYC_Pos|macro|RCC_CIR_HSERDYC_Pos
DECL|RCC_CIR_HSERDYC|macro|RCC_CIR_HSERDYC
DECL|RCC_CIR_HSERDYF_Msk|macro|RCC_CIR_HSERDYF_Msk
DECL|RCC_CIR_HSERDYF_Pos|macro|RCC_CIR_HSERDYF_Pos
DECL|RCC_CIR_HSERDYF|macro|RCC_CIR_HSERDYF
DECL|RCC_CIR_HSERDYIE_Msk|macro|RCC_CIR_HSERDYIE_Msk
DECL|RCC_CIR_HSERDYIE_Pos|macro|RCC_CIR_HSERDYIE_Pos
DECL|RCC_CIR_HSERDYIE|macro|RCC_CIR_HSERDYIE
DECL|RCC_CIR_HSIRDYC_Msk|macro|RCC_CIR_HSIRDYC_Msk
DECL|RCC_CIR_HSIRDYC_Pos|macro|RCC_CIR_HSIRDYC_Pos
DECL|RCC_CIR_HSIRDYC|macro|RCC_CIR_HSIRDYC
DECL|RCC_CIR_HSIRDYF_Msk|macro|RCC_CIR_HSIRDYF_Msk
DECL|RCC_CIR_HSIRDYF_Pos|macro|RCC_CIR_HSIRDYF_Pos
DECL|RCC_CIR_HSIRDYF|macro|RCC_CIR_HSIRDYF
DECL|RCC_CIR_HSIRDYIE_Msk|macro|RCC_CIR_HSIRDYIE_Msk
DECL|RCC_CIR_HSIRDYIE_Pos|macro|RCC_CIR_HSIRDYIE_Pos
DECL|RCC_CIR_HSIRDYIE|macro|RCC_CIR_HSIRDYIE
DECL|RCC_CIR_LSERDYC_Msk|macro|RCC_CIR_LSERDYC_Msk
DECL|RCC_CIR_LSERDYC_Pos|macro|RCC_CIR_LSERDYC_Pos
DECL|RCC_CIR_LSERDYC|macro|RCC_CIR_LSERDYC
DECL|RCC_CIR_LSERDYF_Msk|macro|RCC_CIR_LSERDYF_Msk
DECL|RCC_CIR_LSERDYF_Pos|macro|RCC_CIR_LSERDYF_Pos
DECL|RCC_CIR_LSERDYF|macro|RCC_CIR_LSERDYF
DECL|RCC_CIR_LSERDYIE_Msk|macro|RCC_CIR_LSERDYIE_Msk
DECL|RCC_CIR_LSERDYIE_Pos|macro|RCC_CIR_LSERDYIE_Pos
DECL|RCC_CIR_LSERDYIE|macro|RCC_CIR_LSERDYIE
DECL|RCC_CIR_LSIRDYC_Msk|macro|RCC_CIR_LSIRDYC_Msk
DECL|RCC_CIR_LSIRDYC_Pos|macro|RCC_CIR_LSIRDYC_Pos
DECL|RCC_CIR_LSIRDYC|macro|RCC_CIR_LSIRDYC
DECL|RCC_CIR_LSIRDYF_Msk|macro|RCC_CIR_LSIRDYF_Msk
DECL|RCC_CIR_LSIRDYF_Pos|macro|RCC_CIR_LSIRDYF_Pos
DECL|RCC_CIR_LSIRDYF|macro|RCC_CIR_LSIRDYF
DECL|RCC_CIR_LSIRDYIE_Msk|macro|RCC_CIR_LSIRDYIE_Msk
DECL|RCC_CIR_LSIRDYIE_Pos|macro|RCC_CIR_LSIRDYIE_Pos
DECL|RCC_CIR_LSIRDYIE|macro|RCC_CIR_LSIRDYIE
DECL|RCC_CIR_PLLI2SRDYC_Msk|macro|RCC_CIR_PLLI2SRDYC_Msk
DECL|RCC_CIR_PLLI2SRDYC_Pos|macro|RCC_CIR_PLLI2SRDYC_Pos
DECL|RCC_CIR_PLLI2SRDYC|macro|RCC_CIR_PLLI2SRDYC
DECL|RCC_CIR_PLLI2SRDYF_Msk|macro|RCC_CIR_PLLI2SRDYF_Msk
DECL|RCC_CIR_PLLI2SRDYF_Pos|macro|RCC_CIR_PLLI2SRDYF_Pos
DECL|RCC_CIR_PLLI2SRDYF|macro|RCC_CIR_PLLI2SRDYF
DECL|RCC_CIR_PLLI2SRDYIE_Msk|macro|RCC_CIR_PLLI2SRDYIE_Msk
DECL|RCC_CIR_PLLI2SRDYIE_Pos|macro|RCC_CIR_PLLI2SRDYIE_Pos
DECL|RCC_CIR_PLLI2SRDYIE|macro|RCC_CIR_PLLI2SRDYIE
DECL|RCC_CIR_PLLRDYC_Msk|macro|RCC_CIR_PLLRDYC_Msk
DECL|RCC_CIR_PLLRDYC_Pos|macro|RCC_CIR_PLLRDYC_Pos
DECL|RCC_CIR_PLLRDYC|macro|RCC_CIR_PLLRDYC
DECL|RCC_CIR_PLLRDYF_Msk|macro|RCC_CIR_PLLRDYF_Msk
DECL|RCC_CIR_PLLRDYF_Pos|macro|RCC_CIR_PLLRDYF_Pos
DECL|RCC_CIR_PLLRDYF|macro|RCC_CIR_PLLRDYF
DECL|RCC_CIR_PLLRDYIE_Msk|macro|RCC_CIR_PLLRDYIE_Msk
DECL|RCC_CIR_PLLRDYIE_Pos|macro|RCC_CIR_PLLRDYIE_Pos
DECL|RCC_CIR_PLLRDYIE|macro|RCC_CIR_PLLRDYIE
DECL|RCC_CIR_PLLSAIRDYC_Msk|macro|RCC_CIR_PLLSAIRDYC_Msk
DECL|RCC_CIR_PLLSAIRDYC_Pos|macro|RCC_CIR_PLLSAIRDYC_Pos
DECL|RCC_CIR_PLLSAIRDYC|macro|RCC_CIR_PLLSAIRDYC
DECL|RCC_CIR_PLLSAIRDYF_Msk|macro|RCC_CIR_PLLSAIRDYF_Msk
DECL|RCC_CIR_PLLSAIRDYF_Pos|macro|RCC_CIR_PLLSAIRDYF_Pos
DECL|RCC_CIR_PLLSAIRDYF|macro|RCC_CIR_PLLSAIRDYF
DECL|RCC_CIR_PLLSAIRDYIE_Msk|macro|RCC_CIR_PLLSAIRDYIE_Msk
DECL|RCC_CIR_PLLSAIRDYIE_Pos|macro|RCC_CIR_PLLSAIRDYIE_Pos
DECL|RCC_CIR_PLLSAIRDYIE|macro|RCC_CIR_PLLSAIRDYIE
DECL|RCC_CR_CSSON_Msk|macro|RCC_CR_CSSON_Msk
DECL|RCC_CR_CSSON_Pos|macro|RCC_CR_CSSON_Pos
DECL|RCC_CR_CSSON|macro|RCC_CR_CSSON
DECL|RCC_CR_HSEBYP_Msk|macro|RCC_CR_HSEBYP_Msk
DECL|RCC_CR_HSEBYP_Pos|macro|RCC_CR_HSEBYP_Pos
DECL|RCC_CR_HSEBYP|macro|RCC_CR_HSEBYP
DECL|RCC_CR_HSEON_Msk|macro|RCC_CR_HSEON_Msk
DECL|RCC_CR_HSEON_Pos|macro|RCC_CR_HSEON_Pos
DECL|RCC_CR_HSEON|macro|RCC_CR_HSEON
DECL|RCC_CR_HSERDY_Msk|macro|RCC_CR_HSERDY_Msk
DECL|RCC_CR_HSERDY_Pos|macro|RCC_CR_HSERDY_Pos
DECL|RCC_CR_HSERDY|macro|RCC_CR_HSERDY
DECL|RCC_CR_HSICAL_0|macro|RCC_CR_HSICAL_0
DECL|RCC_CR_HSICAL_1|macro|RCC_CR_HSICAL_1
DECL|RCC_CR_HSICAL_2|macro|RCC_CR_HSICAL_2
DECL|RCC_CR_HSICAL_3|macro|RCC_CR_HSICAL_3
DECL|RCC_CR_HSICAL_4|macro|RCC_CR_HSICAL_4
DECL|RCC_CR_HSICAL_5|macro|RCC_CR_HSICAL_5
DECL|RCC_CR_HSICAL_6|macro|RCC_CR_HSICAL_6
DECL|RCC_CR_HSICAL_7|macro|RCC_CR_HSICAL_7
DECL|RCC_CR_HSICAL_Msk|macro|RCC_CR_HSICAL_Msk
DECL|RCC_CR_HSICAL_Pos|macro|RCC_CR_HSICAL_Pos
DECL|RCC_CR_HSICAL|macro|RCC_CR_HSICAL
DECL|RCC_CR_HSION_Msk|macro|RCC_CR_HSION_Msk
DECL|RCC_CR_HSION_Pos|macro|RCC_CR_HSION_Pos
DECL|RCC_CR_HSION|macro|RCC_CR_HSION
DECL|RCC_CR_HSIRDY_Msk|macro|RCC_CR_HSIRDY_Msk
DECL|RCC_CR_HSIRDY_Pos|macro|RCC_CR_HSIRDY_Pos
DECL|RCC_CR_HSIRDY|macro|RCC_CR_HSIRDY
DECL|RCC_CR_HSITRIM_0|macro|RCC_CR_HSITRIM_0
DECL|RCC_CR_HSITRIM_1|macro|RCC_CR_HSITRIM_1
DECL|RCC_CR_HSITRIM_2|macro|RCC_CR_HSITRIM_2
DECL|RCC_CR_HSITRIM_3|macro|RCC_CR_HSITRIM_3
DECL|RCC_CR_HSITRIM_4|macro|RCC_CR_HSITRIM_4
DECL|RCC_CR_HSITRIM_Msk|macro|RCC_CR_HSITRIM_Msk
DECL|RCC_CR_HSITRIM_Pos|macro|RCC_CR_HSITRIM_Pos
DECL|RCC_CR_HSITRIM|macro|RCC_CR_HSITRIM
DECL|RCC_CR_PLLI2SON_Msk|macro|RCC_CR_PLLI2SON_Msk
DECL|RCC_CR_PLLI2SON_Pos|macro|RCC_CR_PLLI2SON_Pos
DECL|RCC_CR_PLLI2SON|macro|RCC_CR_PLLI2SON
DECL|RCC_CR_PLLI2SRDY_Msk|macro|RCC_CR_PLLI2SRDY_Msk
DECL|RCC_CR_PLLI2SRDY_Pos|macro|RCC_CR_PLLI2SRDY_Pos
DECL|RCC_CR_PLLI2SRDY|macro|RCC_CR_PLLI2SRDY
DECL|RCC_CR_PLLON_Msk|macro|RCC_CR_PLLON_Msk
DECL|RCC_CR_PLLON_Pos|macro|RCC_CR_PLLON_Pos
DECL|RCC_CR_PLLON|macro|RCC_CR_PLLON
DECL|RCC_CR_PLLRDY_Msk|macro|RCC_CR_PLLRDY_Msk
DECL|RCC_CR_PLLRDY_Pos|macro|RCC_CR_PLLRDY_Pos
DECL|RCC_CR_PLLRDY|macro|RCC_CR_PLLRDY
DECL|RCC_CR_PLLSAION_Msk|macro|RCC_CR_PLLSAION_Msk
DECL|RCC_CR_PLLSAION_Pos|macro|RCC_CR_PLLSAION_Pos
DECL|RCC_CR_PLLSAION|macro|RCC_CR_PLLSAION
DECL|RCC_CR_PLLSAIRDY_Msk|macro|RCC_CR_PLLSAIRDY_Msk
DECL|RCC_CR_PLLSAIRDY_Pos|macro|RCC_CR_PLLSAIRDY_Pos
DECL|RCC_CR_PLLSAIRDY|macro|RCC_CR_PLLSAIRDY
DECL|RCC_CSR_BORRSTF_Msk|macro|RCC_CSR_BORRSTF_Msk
DECL|RCC_CSR_BORRSTF_Pos|macro|RCC_CSR_BORRSTF_Pos
DECL|RCC_CSR_BORRSTF|macro|RCC_CSR_BORRSTF
DECL|RCC_CSR_IWDGRSTF_Msk|macro|RCC_CSR_IWDGRSTF_Msk
DECL|RCC_CSR_IWDGRSTF_Pos|macro|RCC_CSR_IWDGRSTF_Pos
DECL|RCC_CSR_IWDGRSTF|macro|RCC_CSR_IWDGRSTF
DECL|RCC_CSR_LPWRRSTF_Msk|macro|RCC_CSR_LPWRRSTF_Msk
DECL|RCC_CSR_LPWRRSTF_Pos|macro|RCC_CSR_LPWRRSTF_Pos
DECL|RCC_CSR_LPWRRSTF|macro|RCC_CSR_LPWRRSTF
DECL|RCC_CSR_LSION_Msk|macro|RCC_CSR_LSION_Msk
DECL|RCC_CSR_LSION_Pos|macro|RCC_CSR_LSION_Pos
DECL|RCC_CSR_LSION|macro|RCC_CSR_LSION
DECL|RCC_CSR_LSIRDY_Msk|macro|RCC_CSR_LSIRDY_Msk
DECL|RCC_CSR_LSIRDY_Pos|macro|RCC_CSR_LSIRDY_Pos
DECL|RCC_CSR_LSIRDY|macro|RCC_CSR_LSIRDY
DECL|RCC_CSR_PINRSTF_Msk|macro|RCC_CSR_PINRSTF_Msk
DECL|RCC_CSR_PINRSTF_Pos|macro|RCC_CSR_PINRSTF_Pos
DECL|RCC_CSR_PINRSTF|macro|RCC_CSR_PINRSTF
DECL|RCC_CSR_PORRSTF_Msk|macro|RCC_CSR_PORRSTF_Msk
DECL|RCC_CSR_PORRSTF_Pos|macro|RCC_CSR_PORRSTF_Pos
DECL|RCC_CSR_PORRSTF|macro|RCC_CSR_PORRSTF
DECL|RCC_CSR_RMVF_Msk|macro|RCC_CSR_RMVF_Msk
DECL|RCC_CSR_RMVF_Pos|macro|RCC_CSR_RMVF_Pos
DECL|RCC_CSR_RMVF|macro|RCC_CSR_RMVF
DECL|RCC_CSR_SFTRSTF_Msk|macro|RCC_CSR_SFTRSTF_Msk
DECL|RCC_CSR_SFTRSTF_Pos|macro|RCC_CSR_SFTRSTF_Pos
DECL|RCC_CSR_SFTRSTF|macro|RCC_CSR_SFTRSTF
DECL|RCC_CSR_WWDGRSTF_Msk|macro|RCC_CSR_WWDGRSTF_Msk
DECL|RCC_CSR_WWDGRSTF_Pos|macro|RCC_CSR_WWDGRSTF_Pos
DECL|RCC_CSR_WWDGRSTF|macro|RCC_CSR_WWDGRSTF
DECL|RCC_DCKCFGR1_PLLI2SDIVQ_0|macro|RCC_DCKCFGR1_PLLI2SDIVQ_0
DECL|RCC_DCKCFGR1_PLLI2SDIVQ_1|macro|RCC_DCKCFGR1_PLLI2SDIVQ_1
DECL|RCC_DCKCFGR1_PLLI2SDIVQ_2|macro|RCC_DCKCFGR1_PLLI2SDIVQ_2
DECL|RCC_DCKCFGR1_PLLI2SDIVQ_3|macro|RCC_DCKCFGR1_PLLI2SDIVQ_3
DECL|RCC_DCKCFGR1_PLLI2SDIVQ_4|macro|RCC_DCKCFGR1_PLLI2SDIVQ_4
DECL|RCC_DCKCFGR1_PLLI2SDIVQ_Msk|macro|RCC_DCKCFGR1_PLLI2SDIVQ_Msk
DECL|RCC_DCKCFGR1_PLLI2SDIVQ_Pos|macro|RCC_DCKCFGR1_PLLI2SDIVQ_Pos
DECL|RCC_DCKCFGR1_PLLI2SDIVQ|macro|RCC_DCKCFGR1_PLLI2SDIVQ
DECL|RCC_DCKCFGR1_PLLSAIDIVQ_0|macro|RCC_DCKCFGR1_PLLSAIDIVQ_0
DECL|RCC_DCKCFGR1_PLLSAIDIVQ_1|macro|RCC_DCKCFGR1_PLLSAIDIVQ_1
DECL|RCC_DCKCFGR1_PLLSAIDIVQ_2|macro|RCC_DCKCFGR1_PLLSAIDIVQ_2
DECL|RCC_DCKCFGR1_PLLSAIDIVQ_3|macro|RCC_DCKCFGR1_PLLSAIDIVQ_3
DECL|RCC_DCKCFGR1_PLLSAIDIVQ_4|macro|RCC_DCKCFGR1_PLLSAIDIVQ_4
DECL|RCC_DCKCFGR1_PLLSAIDIVQ_Msk|macro|RCC_DCKCFGR1_PLLSAIDIVQ_Msk
DECL|RCC_DCKCFGR1_PLLSAIDIVQ_Pos|macro|RCC_DCKCFGR1_PLLSAIDIVQ_Pos
DECL|RCC_DCKCFGR1_PLLSAIDIVQ|macro|RCC_DCKCFGR1_PLLSAIDIVQ
DECL|RCC_DCKCFGR1_SAI1SEL_0|macro|RCC_DCKCFGR1_SAI1SEL_0
DECL|RCC_DCKCFGR1_SAI1SEL_1|macro|RCC_DCKCFGR1_SAI1SEL_1
DECL|RCC_DCKCFGR1_SAI1SEL_Msk|macro|RCC_DCKCFGR1_SAI1SEL_Msk
DECL|RCC_DCKCFGR1_SAI1SEL_Pos|macro|RCC_DCKCFGR1_SAI1SEL_Pos
DECL|RCC_DCKCFGR1_SAI1SEL|macro|RCC_DCKCFGR1_SAI1SEL
DECL|RCC_DCKCFGR1_SAI2SEL_0|macro|RCC_DCKCFGR1_SAI2SEL_0
DECL|RCC_DCKCFGR1_SAI2SEL_1|macro|RCC_DCKCFGR1_SAI2SEL_1
DECL|RCC_DCKCFGR1_SAI2SEL_Msk|macro|RCC_DCKCFGR1_SAI2SEL_Msk
DECL|RCC_DCKCFGR1_SAI2SEL_Pos|macro|RCC_DCKCFGR1_SAI2SEL_Pos
DECL|RCC_DCKCFGR1_SAI2SEL|macro|RCC_DCKCFGR1_SAI2SEL
DECL|RCC_DCKCFGR1_TIMPRE_Msk|macro|RCC_DCKCFGR1_TIMPRE_Msk
DECL|RCC_DCKCFGR1_TIMPRE_Pos|macro|RCC_DCKCFGR1_TIMPRE_Pos
DECL|RCC_DCKCFGR1_TIMPRE|macro|RCC_DCKCFGR1_TIMPRE
DECL|RCC_DCKCFGR2_CK48MSEL_Msk|macro|RCC_DCKCFGR2_CK48MSEL_Msk
DECL|RCC_DCKCFGR2_CK48MSEL_Pos|macro|RCC_DCKCFGR2_CK48MSEL_Pos
DECL|RCC_DCKCFGR2_CK48MSEL|macro|RCC_DCKCFGR2_CK48MSEL
DECL|RCC_DCKCFGR2_I2C1SEL_0|macro|RCC_DCKCFGR2_I2C1SEL_0
DECL|RCC_DCKCFGR2_I2C1SEL_1|macro|RCC_DCKCFGR2_I2C1SEL_1
DECL|RCC_DCKCFGR2_I2C1SEL_Msk|macro|RCC_DCKCFGR2_I2C1SEL_Msk
DECL|RCC_DCKCFGR2_I2C1SEL_Pos|macro|RCC_DCKCFGR2_I2C1SEL_Pos
DECL|RCC_DCKCFGR2_I2C1SEL|macro|RCC_DCKCFGR2_I2C1SEL
DECL|RCC_DCKCFGR2_I2C2SEL_0|macro|RCC_DCKCFGR2_I2C2SEL_0
DECL|RCC_DCKCFGR2_I2C2SEL_1|macro|RCC_DCKCFGR2_I2C2SEL_1
DECL|RCC_DCKCFGR2_I2C2SEL_Msk|macro|RCC_DCKCFGR2_I2C2SEL_Msk
DECL|RCC_DCKCFGR2_I2C2SEL_Pos|macro|RCC_DCKCFGR2_I2C2SEL_Pos
DECL|RCC_DCKCFGR2_I2C2SEL|macro|RCC_DCKCFGR2_I2C2SEL
DECL|RCC_DCKCFGR2_I2C3SEL_0|macro|RCC_DCKCFGR2_I2C3SEL_0
DECL|RCC_DCKCFGR2_I2C3SEL_1|macro|RCC_DCKCFGR2_I2C3SEL_1
DECL|RCC_DCKCFGR2_I2C3SEL_Msk|macro|RCC_DCKCFGR2_I2C3SEL_Msk
DECL|RCC_DCKCFGR2_I2C3SEL_Pos|macro|RCC_DCKCFGR2_I2C3SEL_Pos
DECL|RCC_DCKCFGR2_I2C3SEL|macro|RCC_DCKCFGR2_I2C3SEL
DECL|RCC_DCKCFGR2_LPTIM1SEL_0|macro|RCC_DCKCFGR2_LPTIM1SEL_0
DECL|RCC_DCKCFGR2_LPTIM1SEL_1|macro|RCC_DCKCFGR2_LPTIM1SEL_1
DECL|RCC_DCKCFGR2_LPTIM1SEL_Msk|macro|RCC_DCKCFGR2_LPTIM1SEL_Msk
DECL|RCC_DCKCFGR2_LPTIM1SEL_Pos|macro|RCC_DCKCFGR2_LPTIM1SEL_Pos
DECL|RCC_DCKCFGR2_LPTIM1SEL|macro|RCC_DCKCFGR2_LPTIM1SEL
DECL|RCC_DCKCFGR2_SDMMC1SEL_Msk|macro|RCC_DCKCFGR2_SDMMC1SEL_Msk
DECL|RCC_DCKCFGR2_SDMMC1SEL_Pos|macro|RCC_DCKCFGR2_SDMMC1SEL_Pos
DECL|RCC_DCKCFGR2_SDMMC1SEL|macro|RCC_DCKCFGR2_SDMMC1SEL
DECL|RCC_DCKCFGR2_SDMMC2SEL_Msk|macro|RCC_DCKCFGR2_SDMMC2SEL_Msk
DECL|RCC_DCKCFGR2_SDMMC2SEL_Pos|macro|RCC_DCKCFGR2_SDMMC2SEL_Pos
DECL|RCC_DCKCFGR2_SDMMC2SEL|macro|RCC_DCKCFGR2_SDMMC2SEL
DECL|RCC_DCKCFGR2_UART4SEL_0|macro|RCC_DCKCFGR2_UART4SEL_0
DECL|RCC_DCKCFGR2_UART4SEL_1|macro|RCC_DCKCFGR2_UART4SEL_1
DECL|RCC_DCKCFGR2_UART4SEL_Msk|macro|RCC_DCKCFGR2_UART4SEL_Msk
DECL|RCC_DCKCFGR2_UART4SEL_Pos|macro|RCC_DCKCFGR2_UART4SEL_Pos
DECL|RCC_DCKCFGR2_UART4SEL|macro|RCC_DCKCFGR2_UART4SEL
DECL|RCC_DCKCFGR2_UART5SEL_0|macro|RCC_DCKCFGR2_UART5SEL_0
DECL|RCC_DCKCFGR2_UART5SEL_1|macro|RCC_DCKCFGR2_UART5SEL_1
DECL|RCC_DCKCFGR2_UART5SEL_Msk|macro|RCC_DCKCFGR2_UART5SEL_Msk
DECL|RCC_DCKCFGR2_UART5SEL_Pos|macro|RCC_DCKCFGR2_UART5SEL_Pos
DECL|RCC_DCKCFGR2_UART5SEL|macro|RCC_DCKCFGR2_UART5SEL
DECL|RCC_DCKCFGR2_UART7SEL_0|macro|RCC_DCKCFGR2_UART7SEL_0
DECL|RCC_DCKCFGR2_UART7SEL_1|macro|RCC_DCKCFGR2_UART7SEL_1
DECL|RCC_DCKCFGR2_UART7SEL_Msk|macro|RCC_DCKCFGR2_UART7SEL_Msk
DECL|RCC_DCKCFGR2_UART7SEL_Pos|macro|RCC_DCKCFGR2_UART7SEL_Pos
DECL|RCC_DCKCFGR2_UART7SEL|macro|RCC_DCKCFGR2_UART7SEL
DECL|RCC_DCKCFGR2_UART8SEL_0|macro|RCC_DCKCFGR2_UART8SEL_0
DECL|RCC_DCKCFGR2_UART8SEL_1|macro|RCC_DCKCFGR2_UART8SEL_1
DECL|RCC_DCKCFGR2_UART8SEL_Msk|macro|RCC_DCKCFGR2_UART8SEL_Msk
DECL|RCC_DCKCFGR2_UART8SEL_Pos|macro|RCC_DCKCFGR2_UART8SEL_Pos
DECL|RCC_DCKCFGR2_UART8SEL|macro|RCC_DCKCFGR2_UART8SEL
DECL|RCC_DCKCFGR2_USART1SEL_0|macro|RCC_DCKCFGR2_USART1SEL_0
DECL|RCC_DCKCFGR2_USART1SEL_1|macro|RCC_DCKCFGR2_USART1SEL_1
DECL|RCC_DCKCFGR2_USART1SEL_Msk|macro|RCC_DCKCFGR2_USART1SEL_Msk
DECL|RCC_DCKCFGR2_USART1SEL_Pos|macro|RCC_DCKCFGR2_USART1SEL_Pos
DECL|RCC_DCKCFGR2_USART1SEL|macro|RCC_DCKCFGR2_USART1SEL
DECL|RCC_DCKCFGR2_USART2SEL_0|macro|RCC_DCKCFGR2_USART2SEL_0
DECL|RCC_DCKCFGR2_USART2SEL_1|macro|RCC_DCKCFGR2_USART2SEL_1
DECL|RCC_DCKCFGR2_USART2SEL_Msk|macro|RCC_DCKCFGR2_USART2SEL_Msk
DECL|RCC_DCKCFGR2_USART2SEL_Pos|macro|RCC_DCKCFGR2_USART2SEL_Pos
DECL|RCC_DCKCFGR2_USART2SEL|macro|RCC_DCKCFGR2_USART2SEL
DECL|RCC_DCKCFGR2_USART3SEL_0|macro|RCC_DCKCFGR2_USART3SEL_0
DECL|RCC_DCKCFGR2_USART3SEL_1|macro|RCC_DCKCFGR2_USART3SEL_1
DECL|RCC_DCKCFGR2_USART3SEL_Msk|macro|RCC_DCKCFGR2_USART3SEL_Msk
DECL|RCC_DCKCFGR2_USART3SEL_Pos|macro|RCC_DCKCFGR2_USART3SEL_Pos
DECL|RCC_DCKCFGR2_USART3SEL|macro|RCC_DCKCFGR2_USART3SEL
DECL|RCC_DCKCFGR2_USART6SEL_0|macro|RCC_DCKCFGR2_USART6SEL_0
DECL|RCC_DCKCFGR2_USART6SEL_1|macro|RCC_DCKCFGR2_USART6SEL_1
DECL|RCC_DCKCFGR2_USART6SEL_Msk|macro|RCC_DCKCFGR2_USART6SEL_Msk
DECL|RCC_DCKCFGR2_USART6SEL_Pos|macro|RCC_DCKCFGR2_USART6SEL_Pos
DECL|RCC_DCKCFGR2_USART6SEL|macro|RCC_DCKCFGR2_USART6SEL
DECL|RCC_IRQn|enumerator|RCC_IRQn = 5, /*!< RCC global Interrupt */
DECL|RCC_PLLCFGR_PLLM_0|macro|RCC_PLLCFGR_PLLM_0
DECL|RCC_PLLCFGR_PLLM_1|macro|RCC_PLLCFGR_PLLM_1
DECL|RCC_PLLCFGR_PLLM_2|macro|RCC_PLLCFGR_PLLM_2
DECL|RCC_PLLCFGR_PLLM_3|macro|RCC_PLLCFGR_PLLM_3
DECL|RCC_PLLCFGR_PLLM_4|macro|RCC_PLLCFGR_PLLM_4
DECL|RCC_PLLCFGR_PLLM_5|macro|RCC_PLLCFGR_PLLM_5
DECL|RCC_PLLCFGR_PLLM_Msk|macro|RCC_PLLCFGR_PLLM_Msk
DECL|RCC_PLLCFGR_PLLM_Pos|macro|RCC_PLLCFGR_PLLM_Pos
DECL|RCC_PLLCFGR_PLLM|macro|RCC_PLLCFGR_PLLM
DECL|RCC_PLLCFGR_PLLN_0|macro|RCC_PLLCFGR_PLLN_0
DECL|RCC_PLLCFGR_PLLN_1|macro|RCC_PLLCFGR_PLLN_1
DECL|RCC_PLLCFGR_PLLN_2|macro|RCC_PLLCFGR_PLLN_2
DECL|RCC_PLLCFGR_PLLN_3|macro|RCC_PLLCFGR_PLLN_3
DECL|RCC_PLLCFGR_PLLN_4|macro|RCC_PLLCFGR_PLLN_4
DECL|RCC_PLLCFGR_PLLN_5|macro|RCC_PLLCFGR_PLLN_5
DECL|RCC_PLLCFGR_PLLN_6|macro|RCC_PLLCFGR_PLLN_6
DECL|RCC_PLLCFGR_PLLN_7|macro|RCC_PLLCFGR_PLLN_7
DECL|RCC_PLLCFGR_PLLN_8|macro|RCC_PLLCFGR_PLLN_8
DECL|RCC_PLLCFGR_PLLN_Msk|macro|RCC_PLLCFGR_PLLN_Msk
DECL|RCC_PLLCFGR_PLLN_Pos|macro|RCC_PLLCFGR_PLLN_Pos
DECL|RCC_PLLCFGR_PLLN|macro|RCC_PLLCFGR_PLLN
DECL|RCC_PLLCFGR_PLLP_0|macro|RCC_PLLCFGR_PLLP_0
DECL|RCC_PLLCFGR_PLLP_1|macro|RCC_PLLCFGR_PLLP_1
DECL|RCC_PLLCFGR_PLLP_Msk|macro|RCC_PLLCFGR_PLLP_Msk
DECL|RCC_PLLCFGR_PLLP_Pos|macro|RCC_PLLCFGR_PLLP_Pos
DECL|RCC_PLLCFGR_PLLP|macro|RCC_PLLCFGR_PLLP
DECL|RCC_PLLCFGR_PLLQ_0|macro|RCC_PLLCFGR_PLLQ_0
DECL|RCC_PLLCFGR_PLLQ_1|macro|RCC_PLLCFGR_PLLQ_1
DECL|RCC_PLLCFGR_PLLQ_2|macro|RCC_PLLCFGR_PLLQ_2
DECL|RCC_PLLCFGR_PLLQ_3|macro|RCC_PLLCFGR_PLLQ_3
DECL|RCC_PLLCFGR_PLLQ_Msk|macro|RCC_PLLCFGR_PLLQ_Msk
DECL|RCC_PLLCFGR_PLLQ_Pos|macro|RCC_PLLCFGR_PLLQ_Pos
DECL|RCC_PLLCFGR_PLLQ|macro|RCC_PLLCFGR_PLLQ
DECL|RCC_PLLCFGR_PLLSRC_HSE_Msk|macro|RCC_PLLCFGR_PLLSRC_HSE_Msk
DECL|RCC_PLLCFGR_PLLSRC_HSE_Pos|macro|RCC_PLLCFGR_PLLSRC_HSE_Pos
DECL|RCC_PLLCFGR_PLLSRC_HSE|macro|RCC_PLLCFGR_PLLSRC_HSE
DECL|RCC_PLLCFGR_PLLSRC_HSI|macro|RCC_PLLCFGR_PLLSRC_HSI
DECL|RCC_PLLCFGR_PLLSRC_Msk|macro|RCC_PLLCFGR_PLLSRC_Msk
DECL|RCC_PLLCFGR_PLLSRC_Pos|macro|RCC_PLLCFGR_PLLSRC_Pos
DECL|RCC_PLLCFGR_PLLSRC|macro|RCC_PLLCFGR_PLLSRC
DECL|RCC_PLLI2SCFGR_PLLI2SN_0|macro|RCC_PLLI2SCFGR_PLLI2SN_0
DECL|RCC_PLLI2SCFGR_PLLI2SN_1|macro|RCC_PLLI2SCFGR_PLLI2SN_1
DECL|RCC_PLLI2SCFGR_PLLI2SN_2|macro|RCC_PLLI2SCFGR_PLLI2SN_2
DECL|RCC_PLLI2SCFGR_PLLI2SN_3|macro|RCC_PLLI2SCFGR_PLLI2SN_3
DECL|RCC_PLLI2SCFGR_PLLI2SN_4|macro|RCC_PLLI2SCFGR_PLLI2SN_4
DECL|RCC_PLLI2SCFGR_PLLI2SN_5|macro|RCC_PLLI2SCFGR_PLLI2SN_5
DECL|RCC_PLLI2SCFGR_PLLI2SN_6|macro|RCC_PLLI2SCFGR_PLLI2SN_6
DECL|RCC_PLLI2SCFGR_PLLI2SN_7|macro|RCC_PLLI2SCFGR_PLLI2SN_7
DECL|RCC_PLLI2SCFGR_PLLI2SN_8|macro|RCC_PLLI2SCFGR_PLLI2SN_8
DECL|RCC_PLLI2SCFGR_PLLI2SN_Msk|macro|RCC_PLLI2SCFGR_PLLI2SN_Msk
DECL|RCC_PLLI2SCFGR_PLLI2SN_Pos|macro|RCC_PLLI2SCFGR_PLLI2SN_Pos
DECL|RCC_PLLI2SCFGR_PLLI2SN|macro|RCC_PLLI2SCFGR_PLLI2SN
DECL|RCC_PLLI2SCFGR_PLLI2SQ_0|macro|RCC_PLLI2SCFGR_PLLI2SQ_0
DECL|RCC_PLLI2SCFGR_PLLI2SQ_1|macro|RCC_PLLI2SCFGR_PLLI2SQ_1
DECL|RCC_PLLI2SCFGR_PLLI2SQ_2|macro|RCC_PLLI2SCFGR_PLLI2SQ_2
DECL|RCC_PLLI2SCFGR_PLLI2SQ_3|macro|RCC_PLLI2SCFGR_PLLI2SQ_3
DECL|RCC_PLLI2SCFGR_PLLI2SQ_Msk|macro|RCC_PLLI2SCFGR_PLLI2SQ_Msk
DECL|RCC_PLLI2SCFGR_PLLI2SQ_Pos|macro|RCC_PLLI2SCFGR_PLLI2SQ_Pos
DECL|RCC_PLLI2SCFGR_PLLI2SQ|macro|RCC_PLLI2SCFGR_PLLI2SQ
DECL|RCC_PLLI2SCFGR_PLLI2SR_0|macro|RCC_PLLI2SCFGR_PLLI2SR_0
DECL|RCC_PLLI2SCFGR_PLLI2SR_1|macro|RCC_PLLI2SCFGR_PLLI2SR_1
DECL|RCC_PLLI2SCFGR_PLLI2SR_2|macro|RCC_PLLI2SCFGR_PLLI2SR_2
DECL|RCC_PLLI2SCFGR_PLLI2SR_Msk|macro|RCC_PLLI2SCFGR_PLLI2SR_Msk
DECL|RCC_PLLI2SCFGR_PLLI2SR_Pos|macro|RCC_PLLI2SCFGR_PLLI2SR_Pos
DECL|RCC_PLLI2SCFGR_PLLI2SR|macro|RCC_PLLI2SCFGR_PLLI2SR
DECL|RCC_PLLSAICFGR_PLLSAIN_0|macro|RCC_PLLSAICFGR_PLLSAIN_0
DECL|RCC_PLLSAICFGR_PLLSAIN_1|macro|RCC_PLLSAICFGR_PLLSAIN_1
DECL|RCC_PLLSAICFGR_PLLSAIN_2|macro|RCC_PLLSAICFGR_PLLSAIN_2
DECL|RCC_PLLSAICFGR_PLLSAIN_3|macro|RCC_PLLSAICFGR_PLLSAIN_3
DECL|RCC_PLLSAICFGR_PLLSAIN_4|macro|RCC_PLLSAICFGR_PLLSAIN_4
DECL|RCC_PLLSAICFGR_PLLSAIN_5|macro|RCC_PLLSAICFGR_PLLSAIN_5
DECL|RCC_PLLSAICFGR_PLLSAIN_6|macro|RCC_PLLSAICFGR_PLLSAIN_6
DECL|RCC_PLLSAICFGR_PLLSAIN_7|macro|RCC_PLLSAICFGR_PLLSAIN_7
DECL|RCC_PLLSAICFGR_PLLSAIN_8|macro|RCC_PLLSAICFGR_PLLSAIN_8
DECL|RCC_PLLSAICFGR_PLLSAIN_Msk|macro|RCC_PLLSAICFGR_PLLSAIN_Msk
DECL|RCC_PLLSAICFGR_PLLSAIN_Pos|macro|RCC_PLLSAICFGR_PLLSAIN_Pos
DECL|RCC_PLLSAICFGR_PLLSAIN|macro|RCC_PLLSAICFGR_PLLSAIN
DECL|RCC_PLLSAICFGR_PLLSAIP_0|macro|RCC_PLLSAICFGR_PLLSAIP_0
DECL|RCC_PLLSAICFGR_PLLSAIP_1|macro|RCC_PLLSAICFGR_PLLSAIP_1
DECL|RCC_PLLSAICFGR_PLLSAIP_Msk|macro|RCC_PLLSAICFGR_PLLSAIP_Msk
DECL|RCC_PLLSAICFGR_PLLSAIP_Pos|macro|RCC_PLLSAICFGR_PLLSAIP_Pos
DECL|RCC_PLLSAICFGR_PLLSAIP|macro|RCC_PLLSAICFGR_PLLSAIP
DECL|RCC_PLLSAICFGR_PLLSAIQ_0|macro|RCC_PLLSAICFGR_PLLSAIQ_0
DECL|RCC_PLLSAICFGR_PLLSAIQ_1|macro|RCC_PLLSAICFGR_PLLSAIQ_1
DECL|RCC_PLLSAICFGR_PLLSAIQ_2|macro|RCC_PLLSAICFGR_PLLSAIQ_2
DECL|RCC_PLLSAICFGR_PLLSAIQ_3|macro|RCC_PLLSAICFGR_PLLSAIQ_3
DECL|RCC_PLLSAICFGR_PLLSAIQ_Msk|macro|RCC_PLLSAICFGR_PLLSAIQ_Msk
DECL|RCC_PLLSAICFGR_PLLSAIQ_Pos|macro|RCC_PLLSAICFGR_PLLSAIQ_Pos
DECL|RCC_PLLSAICFGR_PLLSAIQ|macro|RCC_PLLSAICFGR_PLLSAIQ
DECL|RCC_SSCGR_INCSTEP_Msk|macro|RCC_SSCGR_INCSTEP_Msk
DECL|RCC_SSCGR_INCSTEP_Pos|macro|RCC_SSCGR_INCSTEP_Pos
DECL|RCC_SSCGR_INCSTEP|macro|RCC_SSCGR_INCSTEP
DECL|RCC_SSCGR_MODPER_Msk|macro|RCC_SSCGR_MODPER_Msk
DECL|RCC_SSCGR_MODPER_Pos|macro|RCC_SSCGR_MODPER_Pos
DECL|RCC_SSCGR_MODPER|macro|RCC_SSCGR_MODPER
DECL|RCC_SSCGR_SPREADSEL_Msk|macro|RCC_SSCGR_SPREADSEL_Msk
DECL|RCC_SSCGR_SPREADSEL_Pos|macro|RCC_SSCGR_SPREADSEL_Pos
DECL|RCC_SSCGR_SPREADSEL|macro|RCC_SSCGR_SPREADSEL
DECL|RCC_SSCGR_SSCGEN_Msk|macro|RCC_SSCGR_SSCGEN_Msk
DECL|RCC_SSCGR_SSCGEN_Pos|macro|RCC_SSCGR_SSCGEN_Pos
DECL|RCC_SSCGR_SSCGEN|macro|RCC_SSCGR_SSCGEN
DECL|RCC_TypeDef|typedef|} RCC_TypeDef;
DECL|RCC|macro|RCC
DECL|RCR|member|__IO uint32_t RCR; /*!< TIM repetition counter register, Address offset: 0x30 */
DECL|RDHR|member|__IO uint32_t RDHR; /*!< CAN receive FIFO mailbox data high register */
DECL|RDLR|member|__IO uint32_t RDLR; /*!< CAN receive FIFO mailbox data low register */
DECL|RDR|member|__IO uint32_t RDR; /*!< USART Receive Data register, Address offset: 0x24 */
DECL|RDTR|member|__IO uint32_t RDTR; /*!< CAN receive FIFO mailbox data length control and time stamp register */
DECL|RESERVED0|member|uint32_t RESERVED0; /*!< Reserved, 0x1C */
DECL|RESERVED0|member|uint32_t RESERVED0; /*!< Reserved, 0x90 */
DECL|RESERVED0|member|uint32_t RESERVED0[2]; /*!< Reserved, 0x40-0x44 */
DECL|RESERVED0|member|uint32_t RESERVED0[88]; /*!< Reserved, 0x020 - 0x17F */
DECL|RESERVED0|member|uint8_t RESERVED0; /*!< Reserved, 0x05 */
DECL|RESERVED1|member|uint16_t RESERVED1; /*!< Reserved, 0x06 */
DECL|RESERVED1|member|uint32_t RESERVED1[12]; /*!< Reserved, 0x1D0 - 0x1FF */
DECL|RESERVED1|member|uint32_t RESERVED1[13]; /*!< Reserved, 0x4C-0x7C */
DECL|RESERVED1|member|uint32_t RESERVED1[2]; /*!< Reserved, 0x28-0x2C */
DECL|RESERVED2|member|uint32_t RESERVED2; /*!< Reserved, 0x0C */
DECL|RESERVED2|member|uint32_t RESERVED2; /*!< Reserved, 0x208 */
DECL|RESERVED2|member|uint32_t RESERVED2; /*!< Reserved, 0x3C */
DECL|RESERVED3|member|uint32_t RESERVED3; /*!< Reserved, 0x210 */
DECL|RESERVED3|member|uint32_t RESERVED3[2]; /*!< Reserved, 0x48-0x4C */
DECL|RESERVED4|member|uint32_t RESERVED4; /*!< Reserved, 0x218 */
DECL|RESERVED4|member|uint32_t RESERVED4; /*!< Reserved, 0x5C */
DECL|RESERVED5|member|uint32_t RESERVED5[2]; /*!< Reserved, 0x68-0x6C */
DECL|RESERVED5|member|uint32_t RESERVED5[8]; /*!< Reserved, 0x220-0x23F */
DECL|RESERVED6|member|uint32_t RESERVED6[2]; /*!< Reserved, 0x78-0x7C */
DECL|RESERVED|member|uint32_t RESERVED[2]; /*!< Reserved, 0x18-0x1C */
DECL|RESP1|member|__I uint32_t RESP1; /*!< SDMMC response 1 register, Address offset: 0x14 */
DECL|RESP2|member|__I uint32_t RESP2; /*!< SDMMC response 2 register, Address offset: 0x18 */
DECL|RESP3|member|__I uint32_t RESP3; /*!< SDMMC response 3 register, Address offset: 0x1C */
DECL|RESP4|member|__I uint32_t RESP4; /*!< SDMMC response 4 register, Address offset: 0x20 */
DECL|RESPCMD|member|__I uint32_t RESPCMD; /*!< SDMMC command response register, Address offset: 0x10 */
DECL|RF0R|member|__IO uint32_t RF0R; /*!< CAN receive FIFO 0 register, Address offset: 0x0C */
DECL|RF1R|member|__IO uint32_t RF1R; /*!< CAN receive FIFO 1 register, Address offset: 0x10 */
DECL|RIR|member|__IO uint32_t RIR; /*!< CAN receive FIFO mailbox identifier register */
DECL|RLR|member|__IO uint32_t RLR; /*!< IWDG Reload register, Address offset: 0x08 */
DECL|RNG_BASE|macro|RNG_BASE
DECL|RNG_CR_IE_Msk|macro|RNG_CR_IE_Msk
DECL|RNG_CR_IE_Pos|macro|RNG_CR_IE_Pos
DECL|RNG_CR_IE|macro|RNG_CR_IE
DECL|RNG_CR_RNGEN_Msk|macro|RNG_CR_RNGEN_Msk
DECL|RNG_CR_RNGEN_Pos|macro|RNG_CR_RNGEN_Pos
DECL|RNG_CR_RNGEN|macro|RNG_CR_RNGEN
DECL|RNG_IRQn|enumerator|RNG_IRQn = 80, /*!< RNG global interrupt */
DECL|RNG_SR_CECS_Msk|macro|RNG_SR_CECS_Msk
DECL|RNG_SR_CECS_Pos|macro|RNG_SR_CECS_Pos
DECL|RNG_SR_CECS|macro|RNG_SR_CECS
DECL|RNG_SR_CEIS_Msk|macro|RNG_SR_CEIS_Msk
DECL|RNG_SR_CEIS_Pos|macro|RNG_SR_CEIS_Pos
DECL|RNG_SR_CEIS|macro|RNG_SR_CEIS
DECL|RNG_SR_DRDY_Msk|macro|RNG_SR_DRDY_Msk
DECL|RNG_SR_DRDY_Pos|macro|RNG_SR_DRDY_Pos
DECL|RNG_SR_DRDY|macro|RNG_SR_DRDY
DECL|RNG_SR_SECS_Msk|macro|RNG_SR_SECS_Msk
DECL|RNG_SR_SECS_Pos|macro|RNG_SR_SECS_Pos
DECL|RNG_SR_SECS|macro|RNG_SR_SECS
DECL|RNG_SR_SEIS_Msk|macro|RNG_SR_SEIS_Msk
DECL|RNG_SR_SEIS_Pos|macro|RNG_SR_SEIS_Pos
DECL|RNG_SR_SEIS|macro|RNG_SR_SEIS
DECL|RNG_TypeDef|typedef|} RNG_TypeDef;
DECL|RNG|macro|RNG
DECL|RQR|member|__IO uint32_t RQR; /*!< USART Request register, Address offset: 0x18 */
DECL|RTC_ALRMAR_DT_0|macro|RTC_ALRMAR_DT_0
DECL|RTC_ALRMAR_DT_1|macro|RTC_ALRMAR_DT_1
DECL|RTC_ALRMAR_DT_Msk|macro|RTC_ALRMAR_DT_Msk
DECL|RTC_ALRMAR_DT_Pos|macro|RTC_ALRMAR_DT_Pos
DECL|RTC_ALRMAR_DT|macro|RTC_ALRMAR_DT
DECL|RTC_ALRMAR_DU_0|macro|RTC_ALRMAR_DU_0
DECL|RTC_ALRMAR_DU_1|macro|RTC_ALRMAR_DU_1
DECL|RTC_ALRMAR_DU_2|macro|RTC_ALRMAR_DU_2
DECL|RTC_ALRMAR_DU_3|macro|RTC_ALRMAR_DU_3
DECL|RTC_ALRMAR_DU_Msk|macro|RTC_ALRMAR_DU_Msk
DECL|RTC_ALRMAR_DU_Pos|macro|RTC_ALRMAR_DU_Pos
DECL|RTC_ALRMAR_DU|macro|RTC_ALRMAR_DU
DECL|RTC_ALRMAR_HT_0|macro|RTC_ALRMAR_HT_0
DECL|RTC_ALRMAR_HT_1|macro|RTC_ALRMAR_HT_1
DECL|RTC_ALRMAR_HT_Msk|macro|RTC_ALRMAR_HT_Msk
DECL|RTC_ALRMAR_HT_Pos|macro|RTC_ALRMAR_HT_Pos
DECL|RTC_ALRMAR_HT|macro|RTC_ALRMAR_HT
DECL|RTC_ALRMAR_HU_0|macro|RTC_ALRMAR_HU_0
DECL|RTC_ALRMAR_HU_1|macro|RTC_ALRMAR_HU_1
DECL|RTC_ALRMAR_HU_2|macro|RTC_ALRMAR_HU_2
DECL|RTC_ALRMAR_HU_3|macro|RTC_ALRMAR_HU_3
DECL|RTC_ALRMAR_HU_Msk|macro|RTC_ALRMAR_HU_Msk
DECL|RTC_ALRMAR_HU_Pos|macro|RTC_ALRMAR_HU_Pos
DECL|RTC_ALRMAR_HU|macro|RTC_ALRMAR_HU
DECL|RTC_ALRMAR_MNT_0|macro|RTC_ALRMAR_MNT_0
DECL|RTC_ALRMAR_MNT_1|macro|RTC_ALRMAR_MNT_1
DECL|RTC_ALRMAR_MNT_2|macro|RTC_ALRMAR_MNT_2
DECL|RTC_ALRMAR_MNT_Msk|macro|RTC_ALRMAR_MNT_Msk
DECL|RTC_ALRMAR_MNT_Pos|macro|RTC_ALRMAR_MNT_Pos
DECL|RTC_ALRMAR_MNT|macro|RTC_ALRMAR_MNT
DECL|RTC_ALRMAR_MNU_0|macro|RTC_ALRMAR_MNU_0
DECL|RTC_ALRMAR_MNU_1|macro|RTC_ALRMAR_MNU_1
DECL|RTC_ALRMAR_MNU_2|macro|RTC_ALRMAR_MNU_2
DECL|RTC_ALRMAR_MNU_3|macro|RTC_ALRMAR_MNU_3
DECL|RTC_ALRMAR_MNU_Msk|macro|RTC_ALRMAR_MNU_Msk
DECL|RTC_ALRMAR_MNU_Pos|macro|RTC_ALRMAR_MNU_Pos
DECL|RTC_ALRMAR_MNU|macro|RTC_ALRMAR_MNU
DECL|RTC_ALRMAR_MSK1_Msk|macro|RTC_ALRMAR_MSK1_Msk
DECL|RTC_ALRMAR_MSK1_Pos|macro|RTC_ALRMAR_MSK1_Pos
DECL|RTC_ALRMAR_MSK1|macro|RTC_ALRMAR_MSK1
DECL|RTC_ALRMAR_MSK2_Msk|macro|RTC_ALRMAR_MSK2_Msk
DECL|RTC_ALRMAR_MSK2_Pos|macro|RTC_ALRMAR_MSK2_Pos
DECL|RTC_ALRMAR_MSK2|macro|RTC_ALRMAR_MSK2
DECL|RTC_ALRMAR_MSK3_Msk|macro|RTC_ALRMAR_MSK3_Msk
DECL|RTC_ALRMAR_MSK3_Pos|macro|RTC_ALRMAR_MSK3_Pos
DECL|RTC_ALRMAR_MSK3|macro|RTC_ALRMAR_MSK3
DECL|RTC_ALRMAR_MSK4_Msk|macro|RTC_ALRMAR_MSK4_Msk
DECL|RTC_ALRMAR_MSK4_Pos|macro|RTC_ALRMAR_MSK4_Pos
DECL|RTC_ALRMAR_MSK4|macro|RTC_ALRMAR_MSK4
DECL|RTC_ALRMAR_PM_Msk|macro|RTC_ALRMAR_PM_Msk
DECL|RTC_ALRMAR_PM_Pos|macro|RTC_ALRMAR_PM_Pos
DECL|RTC_ALRMAR_PM|macro|RTC_ALRMAR_PM
DECL|RTC_ALRMAR_ST_0|macro|RTC_ALRMAR_ST_0
DECL|RTC_ALRMAR_ST_1|macro|RTC_ALRMAR_ST_1
DECL|RTC_ALRMAR_ST_2|macro|RTC_ALRMAR_ST_2
DECL|RTC_ALRMAR_ST_Msk|macro|RTC_ALRMAR_ST_Msk
DECL|RTC_ALRMAR_ST_Pos|macro|RTC_ALRMAR_ST_Pos
DECL|RTC_ALRMAR_ST|macro|RTC_ALRMAR_ST
DECL|RTC_ALRMAR_SU_0|macro|RTC_ALRMAR_SU_0
DECL|RTC_ALRMAR_SU_1|macro|RTC_ALRMAR_SU_1
DECL|RTC_ALRMAR_SU_2|macro|RTC_ALRMAR_SU_2
DECL|RTC_ALRMAR_SU_3|macro|RTC_ALRMAR_SU_3
DECL|RTC_ALRMAR_SU_Msk|macro|RTC_ALRMAR_SU_Msk
DECL|RTC_ALRMAR_SU_Pos|macro|RTC_ALRMAR_SU_Pos
DECL|RTC_ALRMAR_SU|macro|RTC_ALRMAR_SU
DECL|RTC_ALRMAR_WDSEL_Msk|macro|RTC_ALRMAR_WDSEL_Msk
DECL|RTC_ALRMAR_WDSEL_Pos|macro|RTC_ALRMAR_WDSEL_Pos
DECL|RTC_ALRMAR_WDSEL|macro|RTC_ALRMAR_WDSEL
DECL|RTC_ALRMASSR_MASKSS_0|macro|RTC_ALRMASSR_MASKSS_0
DECL|RTC_ALRMASSR_MASKSS_1|macro|RTC_ALRMASSR_MASKSS_1
DECL|RTC_ALRMASSR_MASKSS_2|macro|RTC_ALRMASSR_MASKSS_2
DECL|RTC_ALRMASSR_MASKSS_3|macro|RTC_ALRMASSR_MASKSS_3
DECL|RTC_ALRMASSR_MASKSS_Msk|macro|RTC_ALRMASSR_MASKSS_Msk
DECL|RTC_ALRMASSR_MASKSS_Pos|macro|RTC_ALRMASSR_MASKSS_Pos
DECL|RTC_ALRMASSR_MASKSS|macro|RTC_ALRMASSR_MASKSS
DECL|RTC_ALRMASSR_SS_Msk|macro|RTC_ALRMASSR_SS_Msk
DECL|RTC_ALRMASSR_SS_Pos|macro|RTC_ALRMASSR_SS_Pos
DECL|RTC_ALRMASSR_SS|macro|RTC_ALRMASSR_SS
DECL|RTC_ALRMBR_DT_0|macro|RTC_ALRMBR_DT_0
DECL|RTC_ALRMBR_DT_1|macro|RTC_ALRMBR_DT_1
DECL|RTC_ALRMBR_DT_Msk|macro|RTC_ALRMBR_DT_Msk
DECL|RTC_ALRMBR_DT_Pos|macro|RTC_ALRMBR_DT_Pos
DECL|RTC_ALRMBR_DT|macro|RTC_ALRMBR_DT
DECL|RTC_ALRMBR_DU_0|macro|RTC_ALRMBR_DU_0
DECL|RTC_ALRMBR_DU_1|macro|RTC_ALRMBR_DU_1
DECL|RTC_ALRMBR_DU_2|macro|RTC_ALRMBR_DU_2
DECL|RTC_ALRMBR_DU_3|macro|RTC_ALRMBR_DU_3
DECL|RTC_ALRMBR_DU_Msk|macro|RTC_ALRMBR_DU_Msk
DECL|RTC_ALRMBR_DU_Pos|macro|RTC_ALRMBR_DU_Pos
DECL|RTC_ALRMBR_DU|macro|RTC_ALRMBR_DU
DECL|RTC_ALRMBR_HT_0|macro|RTC_ALRMBR_HT_0
DECL|RTC_ALRMBR_HT_1|macro|RTC_ALRMBR_HT_1
DECL|RTC_ALRMBR_HT_Msk|macro|RTC_ALRMBR_HT_Msk
DECL|RTC_ALRMBR_HT_Pos|macro|RTC_ALRMBR_HT_Pos
DECL|RTC_ALRMBR_HT|macro|RTC_ALRMBR_HT
DECL|RTC_ALRMBR_HU_0|macro|RTC_ALRMBR_HU_0
DECL|RTC_ALRMBR_HU_1|macro|RTC_ALRMBR_HU_1
DECL|RTC_ALRMBR_HU_2|macro|RTC_ALRMBR_HU_2
DECL|RTC_ALRMBR_HU_3|macro|RTC_ALRMBR_HU_3
DECL|RTC_ALRMBR_HU_Msk|macro|RTC_ALRMBR_HU_Msk
DECL|RTC_ALRMBR_HU_Pos|macro|RTC_ALRMBR_HU_Pos
DECL|RTC_ALRMBR_HU|macro|RTC_ALRMBR_HU
DECL|RTC_ALRMBR_MNT_0|macro|RTC_ALRMBR_MNT_0
DECL|RTC_ALRMBR_MNT_1|macro|RTC_ALRMBR_MNT_1
DECL|RTC_ALRMBR_MNT_2|macro|RTC_ALRMBR_MNT_2
DECL|RTC_ALRMBR_MNT_Msk|macro|RTC_ALRMBR_MNT_Msk
DECL|RTC_ALRMBR_MNT_Pos|macro|RTC_ALRMBR_MNT_Pos
DECL|RTC_ALRMBR_MNT|macro|RTC_ALRMBR_MNT
DECL|RTC_ALRMBR_MNU_0|macro|RTC_ALRMBR_MNU_0
DECL|RTC_ALRMBR_MNU_1|macro|RTC_ALRMBR_MNU_1
DECL|RTC_ALRMBR_MNU_2|macro|RTC_ALRMBR_MNU_2
DECL|RTC_ALRMBR_MNU_3|macro|RTC_ALRMBR_MNU_3
DECL|RTC_ALRMBR_MNU_Msk|macro|RTC_ALRMBR_MNU_Msk
DECL|RTC_ALRMBR_MNU_Pos|macro|RTC_ALRMBR_MNU_Pos
DECL|RTC_ALRMBR_MNU|macro|RTC_ALRMBR_MNU
DECL|RTC_ALRMBR_MSK1_Msk|macro|RTC_ALRMBR_MSK1_Msk
DECL|RTC_ALRMBR_MSK1_Pos|macro|RTC_ALRMBR_MSK1_Pos
DECL|RTC_ALRMBR_MSK1|macro|RTC_ALRMBR_MSK1
DECL|RTC_ALRMBR_MSK2_Msk|macro|RTC_ALRMBR_MSK2_Msk
DECL|RTC_ALRMBR_MSK2_Pos|macro|RTC_ALRMBR_MSK2_Pos
DECL|RTC_ALRMBR_MSK2|macro|RTC_ALRMBR_MSK2
DECL|RTC_ALRMBR_MSK3_Msk|macro|RTC_ALRMBR_MSK3_Msk
DECL|RTC_ALRMBR_MSK3_Pos|macro|RTC_ALRMBR_MSK3_Pos
DECL|RTC_ALRMBR_MSK3|macro|RTC_ALRMBR_MSK3
DECL|RTC_ALRMBR_MSK4_Msk|macro|RTC_ALRMBR_MSK4_Msk
DECL|RTC_ALRMBR_MSK4_Pos|macro|RTC_ALRMBR_MSK4_Pos
DECL|RTC_ALRMBR_MSK4|macro|RTC_ALRMBR_MSK4
DECL|RTC_ALRMBR_PM_Msk|macro|RTC_ALRMBR_PM_Msk
DECL|RTC_ALRMBR_PM_Pos|macro|RTC_ALRMBR_PM_Pos
DECL|RTC_ALRMBR_PM|macro|RTC_ALRMBR_PM
DECL|RTC_ALRMBR_ST_0|macro|RTC_ALRMBR_ST_0
DECL|RTC_ALRMBR_ST_1|macro|RTC_ALRMBR_ST_1
DECL|RTC_ALRMBR_ST_2|macro|RTC_ALRMBR_ST_2
DECL|RTC_ALRMBR_ST_Msk|macro|RTC_ALRMBR_ST_Msk
DECL|RTC_ALRMBR_ST_Pos|macro|RTC_ALRMBR_ST_Pos
DECL|RTC_ALRMBR_ST|macro|RTC_ALRMBR_ST
DECL|RTC_ALRMBR_SU_0|macro|RTC_ALRMBR_SU_0
DECL|RTC_ALRMBR_SU_1|macro|RTC_ALRMBR_SU_1
DECL|RTC_ALRMBR_SU_2|macro|RTC_ALRMBR_SU_2
DECL|RTC_ALRMBR_SU_3|macro|RTC_ALRMBR_SU_3
DECL|RTC_ALRMBR_SU_Msk|macro|RTC_ALRMBR_SU_Msk
DECL|RTC_ALRMBR_SU_Pos|macro|RTC_ALRMBR_SU_Pos
DECL|RTC_ALRMBR_SU|macro|RTC_ALRMBR_SU
DECL|RTC_ALRMBR_WDSEL_Msk|macro|RTC_ALRMBR_WDSEL_Msk
DECL|RTC_ALRMBR_WDSEL_Pos|macro|RTC_ALRMBR_WDSEL_Pos
DECL|RTC_ALRMBR_WDSEL|macro|RTC_ALRMBR_WDSEL
DECL|RTC_ALRMBSSR_MASKSS_0|macro|RTC_ALRMBSSR_MASKSS_0
DECL|RTC_ALRMBSSR_MASKSS_1|macro|RTC_ALRMBSSR_MASKSS_1
DECL|RTC_ALRMBSSR_MASKSS_2|macro|RTC_ALRMBSSR_MASKSS_2
DECL|RTC_ALRMBSSR_MASKSS_3|macro|RTC_ALRMBSSR_MASKSS_3
DECL|RTC_ALRMBSSR_MASKSS_Msk|macro|RTC_ALRMBSSR_MASKSS_Msk
DECL|RTC_ALRMBSSR_MASKSS_Pos|macro|RTC_ALRMBSSR_MASKSS_Pos
DECL|RTC_ALRMBSSR_MASKSS|macro|RTC_ALRMBSSR_MASKSS
DECL|RTC_ALRMBSSR_SS_Msk|macro|RTC_ALRMBSSR_SS_Msk
DECL|RTC_ALRMBSSR_SS_Pos|macro|RTC_ALRMBSSR_SS_Pos
DECL|RTC_ALRMBSSR_SS|macro|RTC_ALRMBSSR_SS
DECL|RTC_Alarm_IRQn|enumerator|RTC_Alarm_IRQn = 41, /*!< RTC Alarm (A and B) through EXTI Line Interrupt */
DECL|RTC_BASE|macro|RTC_BASE
DECL|RTC_BKP0R_Msk|macro|RTC_BKP0R_Msk
DECL|RTC_BKP0R_Pos|macro|RTC_BKP0R_Pos
DECL|RTC_BKP0R|macro|RTC_BKP0R
DECL|RTC_BKP10R_Msk|macro|RTC_BKP10R_Msk
DECL|RTC_BKP10R_Pos|macro|RTC_BKP10R_Pos
DECL|RTC_BKP10R|macro|RTC_BKP10R
DECL|RTC_BKP11R_Msk|macro|RTC_BKP11R_Msk
DECL|RTC_BKP11R_Pos|macro|RTC_BKP11R_Pos
DECL|RTC_BKP11R|macro|RTC_BKP11R
DECL|RTC_BKP12R_Msk|macro|RTC_BKP12R_Msk
DECL|RTC_BKP12R_Pos|macro|RTC_BKP12R_Pos
DECL|RTC_BKP12R|macro|RTC_BKP12R
DECL|RTC_BKP13R_Msk|macro|RTC_BKP13R_Msk
DECL|RTC_BKP13R_Pos|macro|RTC_BKP13R_Pos
DECL|RTC_BKP13R|macro|RTC_BKP13R
DECL|RTC_BKP14R_Msk|macro|RTC_BKP14R_Msk
DECL|RTC_BKP14R_Pos|macro|RTC_BKP14R_Pos
DECL|RTC_BKP14R|macro|RTC_BKP14R
DECL|RTC_BKP15R_Msk|macro|RTC_BKP15R_Msk
DECL|RTC_BKP15R_Pos|macro|RTC_BKP15R_Pos
DECL|RTC_BKP15R|macro|RTC_BKP15R
DECL|RTC_BKP16R_Msk|macro|RTC_BKP16R_Msk
DECL|RTC_BKP16R_Pos|macro|RTC_BKP16R_Pos
DECL|RTC_BKP16R|macro|RTC_BKP16R
DECL|RTC_BKP17R_Msk|macro|RTC_BKP17R_Msk
DECL|RTC_BKP17R_Pos|macro|RTC_BKP17R_Pos
DECL|RTC_BKP17R|macro|RTC_BKP17R
DECL|RTC_BKP18R_Msk|macro|RTC_BKP18R_Msk
DECL|RTC_BKP18R_Pos|macro|RTC_BKP18R_Pos
DECL|RTC_BKP18R|macro|RTC_BKP18R
DECL|RTC_BKP19R_Msk|macro|RTC_BKP19R_Msk
DECL|RTC_BKP19R_Pos|macro|RTC_BKP19R_Pos
DECL|RTC_BKP19R|macro|RTC_BKP19R
DECL|RTC_BKP1R_Msk|macro|RTC_BKP1R_Msk
DECL|RTC_BKP1R_Pos|macro|RTC_BKP1R_Pos
DECL|RTC_BKP1R|macro|RTC_BKP1R
DECL|RTC_BKP20R_Msk|macro|RTC_BKP20R_Msk
DECL|RTC_BKP20R_Pos|macro|RTC_BKP20R_Pos
DECL|RTC_BKP20R|macro|RTC_BKP20R
DECL|RTC_BKP21R_Msk|macro|RTC_BKP21R_Msk
DECL|RTC_BKP21R_Pos|macro|RTC_BKP21R_Pos
DECL|RTC_BKP21R|macro|RTC_BKP21R
DECL|RTC_BKP22R_Msk|macro|RTC_BKP22R_Msk
DECL|RTC_BKP22R_Pos|macro|RTC_BKP22R_Pos
DECL|RTC_BKP22R|macro|RTC_BKP22R
DECL|RTC_BKP23R_Msk|macro|RTC_BKP23R_Msk
DECL|RTC_BKP23R_Pos|macro|RTC_BKP23R_Pos
DECL|RTC_BKP23R|macro|RTC_BKP23R
DECL|RTC_BKP24R_Msk|macro|RTC_BKP24R_Msk
DECL|RTC_BKP24R_Pos|macro|RTC_BKP24R_Pos
DECL|RTC_BKP24R|macro|RTC_BKP24R
DECL|RTC_BKP25R_Msk|macro|RTC_BKP25R_Msk
DECL|RTC_BKP25R_Pos|macro|RTC_BKP25R_Pos
DECL|RTC_BKP25R|macro|RTC_BKP25R
DECL|RTC_BKP26R_Msk|macro|RTC_BKP26R_Msk
DECL|RTC_BKP26R_Pos|macro|RTC_BKP26R_Pos
DECL|RTC_BKP26R|macro|RTC_BKP26R
DECL|RTC_BKP27R_Msk|macro|RTC_BKP27R_Msk
DECL|RTC_BKP27R_Pos|macro|RTC_BKP27R_Pos
DECL|RTC_BKP27R|macro|RTC_BKP27R
DECL|RTC_BKP28R_Msk|macro|RTC_BKP28R_Msk
DECL|RTC_BKP28R_Pos|macro|RTC_BKP28R_Pos
DECL|RTC_BKP28R|macro|RTC_BKP28R
DECL|RTC_BKP29R_Msk|macro|RTC_BKP29R_Msk
DECL|RTC_BKP29R_Pos|macro|RTC_BKP29R_Pos
DECL|RTC_BKP29R|macro|RTC_BKP29R
DECL|RTC_BKP2R_Msk|macro|RTC_BKP2R_Msk
DECL|RTC_BKP2R_Pos|macro|RTC_BKP2R_Pos
DECL|RTC_BKP2R|macro|RTC_BKP2R
DECL|RTC_BKP30R_Msk|macro|RTC_BKP30R_Msk
DECL|RTC_BKP30R_Pos|macro|RTC_BKP30R_Pos
DECL|RTC_BKP30R|macro|RTC_BKP30R
DECL|RTC_BKP31R_Msk|macro|RTC_BKP31R_Msk
DECL|RTC_BKP31R_Pos|macro|RTC_BKP31R_Pos
DECL|RTC_BKP31R|macro|RTC_BKP31R
DECL|RTC_BKP3R_Msk|macro|RTC_BKP3R_Msk
DECL|RTC_BKP3R_Pos|macro|RTC_BKP3R_Pos
DECL|RTC_BKP3R|macro|RTC_BKP3R
DECL|RTC_BKP4R_Msk|macro|RTC_BKP4R_Msk
DECL|RTC_BKP4R_Pos|macro|RTC_BKP4R_Pos
DECL|RTC_BKP4R|macro|RTC_BKP4R
DECL|RTC_BKP5R_Msk|macro|RTC_BKP5R_Msk
DECL|RTC_BKP5R_Pos|macro|RTC_BKP5R_Pos
DECL|RTC_BKP5R|macro|RTC_BKP5R
DECL|RTC_BKP6R_Msk|macro|RTC_BKP6R_Msk
DECL|RTC_BKP6R_Pos|macro|RTC_BKP6R_Pos
DECL|RTC_BKP6R|macro|RTC_BKP6R
DECL|RTC_BKP7R_Msk|macro|RTC_BKP7R_Msk
DECL|RTC_BKP7R_Pos|macro|RTC_BKP7R_Pos
DECL|RTC_BKP7R|macro|RTC_BKP7R
DECL|RTC_BKP8R_Msk|macro|RTC_BKP8R_Msk
DECL|RTC_BKP8R_Pos|macro|RTC_BKP8R_Pos
DECL|RTC_BKP8R|macro|RTC_BKP8R
DECL|RTC_BKP9R_Msk|macro|RTC_BKP9R_Msk
DECL|RTC_BKP9R_Pos|macro|RTC_BKP9R_Pos
DECL|RTC_BKP9R|macro|RTC_BKP9R
DECL|RTC_BKP_NUMBER|macro|RTC_BKP_NUMBER
DECL|RTC_CALR_CALM_0|macro|RTC_CALR_CALM_0
DECL|RTC_CALR_CALM_1|macro|RTC_CALR_CALM_1
DECL|RTC_CALR_CALM_2|macro|RTC_CALR_CALM_2
DECL|RTC_CALR_CALM_3|macro|RTC_CALR_CALM_3
DECL|RTC_CALR_CALM_4|macro|RTC_CALR_CALM_4
DECL|RTC_CALR_CALM_5|macro|RTC_CALR_CALM_5
DECL|RTC_CALR_CALM_6|macro|RTC_CALR_CALM_6
DECL|RTC_CALR_CALM_7|macro|RTC_CALR_CALM_7
DECL|RTC_CALR_CALM_8|macro|RTC_CALR_CALM_8
DECL|RTC_CALR_CALM_Msk|macro|RTC_CALR_CALM_Msk
DECL|RTC_CALR_CALM_Pos|macro|RTC_CALR_CALM_Pos
DECL|RTC_CALR_CALM|macro|RTC_CALR_CALM
DECL|RTC_CALR_CALP_Msk|macro|RTC_CALR_CALP_Msk
DECL|RTC_CALR_CALP_Pos|macro|RTC_CALR_CALP_Pos
DECL|RTC_CALR_CALP|macro|RTC_CALR_CALP
DECL|RTC_CALR_CALW16_Msk|macro|RTC_CALR_CALW16_Msk
DECL|RTC_CALR_CALW16_Pos|macro|RTC_CALR_CALW16_Pos
DECL|RTC_CALR_CALW16|macro|RTC_CALR_CALW16
DECL|RTC_CALR_CALW8_Msk|macro|RTC_CALR_CALW8_Msk
DECL|RTC_CALR_CALW8_Pos|macro|RTC_CALR_CALW8_Pos
DECL|RTC_CALR_CALW8|macro|RTC_CALR_CALW8
DECL|RTC_CR_ADD1H_Msk|macro|RTC_CR_ADD1H_Msk
DECL|RTC_CR_ADD1H_Pos|macro|RTC_CR_ADD1H_Pos
DECL|RTC_CR_ADD1H|macro|RTC_CR_ADD1H
DECL|RTC_CR_ALRAE_Msk|macro|RTC_CR_ALRAE_Msk
DECL|RTC_CR_ALRAE_Pos|macro|RTC_CR_ALRAE_Pos
DECL|RTC_CR_ALRAE|macro|RTC_CR_ALRAE
DECL|RTC_CR_ALRAIE_Msk|macro|RTC_CR_ALRAIE_Msk
DECL|RTC_CR_ALRAIE_Pos|macro|RTC_CR_ALRAIE_Pos
DECL|RTC_CR_ALRAIE|macro|RTC_CR_ALRAIE
DECL|RTC_CR_ALRBE_Msk|macro|RTC_CR_ALRBE_Msk
DECL|RTC_CR_ALRBE_Pos|macro|RTC_CR_ALRBE_Pos
DECL|RTC_CR_ALRBE|macro|RTC_CR_ALRBE
DECL|RTC_CR_ALRBIE_Msk|macro|RTC_CR_ALRBIE_Msk
DECL|RTC_CR_ALRBIE_Pos|macro|RTC_CR_ALRBIE_Pos
DECL|RTC_CR_ALRBIE|macro|RTC_CR_ALRBIE
DECL|RTC_CR_BCK|macro|RTC_CR_BCK
DECL|RTC_CR_BKP_Msk|macro|RTC_CR_BKP_Msk
DECL|RTC_CR_BKP_Pos|macro|RTC_CR_BKP_Pos
DECL|RTC_CR_BKP|macro|RTC_CR_BKP
DECL|RTC_CR_BYPSHAD_Msk|macro|RTC_CR_BYPSHAD_Msk
DECL|RTC_CR_BYPSHAD_Pos|macro|RTC_CR_BYPSHAD_Pos
DECL|RTC_CR_BYPSHAD|macro|RTC_CR_BYPSHAD
DECL|RTC_CR_COE_Msk|macro|RTC_CR_COE_Msk
DECL|RTC_CR_COE_Pos|macro|RTC_CR_COE_Pos
DECL|RTC_CR_COE|macro|RTC_CR_COE
DECL|RTC_CR_COSEL_Msk|macro|RTC_CR_COSEL_Msk
DECL|RTC_CR_COSEL_Pos|macro|RTC_CR_COSEL_Pos
DECL|RTC_CR_COSEL|macro|RTC_CR_COSEL
DECL|RTC_CR_FMT_Msk|macro|RTC_CR_FMT_Msk
DECL|RTC_CR_FMT_Pos|macro|RTC_CR_FMT_Pos
DECL|RTC_CR_FMT|macro|RTC_CR_FMT
DECL|RTC_CR_ITSE_Msk|macro|RTC_CR_ITSE_Msk
DECL|RTC_CR_ITSE_Pos|macro|RTC_CR_ITSE_Pos
DECL|RTC_CR_ITSE|macro|RTC_CR_ITSE
DECL|RTC_CR_OSEL_0|macro|RTC_CR_OSEL_0
DECL|RTC_CR_OSEL_1|macro|RTC_CR_OSEL_1
DECL|RTC_CR_OSEL_Msk|macro|RTC_CR_OSEL_Msk
DECL|RTC_CR_OSEL_Pos|macro|RTC_CR_OSEL_Pos
DECL|RTC_CR_OSEL|macro|RTC_CR_OSEL
DECL|RTC_CR_POL_Msk|macro|RTC_CR_POL_Msk
DECL|RTC_CR_POL_Pos|macro|RTC_CR_POL_Pos
DECL|RTC_CR_POL|macro|RTC_CR_POL
DECL|RTC_CR_REFCKON_Msk|macro|RTC_CR_REFCKON_Msk
DECL|RTC_CR_REFCKON_Pos|macro|RTC_CR_REFCKON_Pos
DECL|RTC_CR_REFCKON|macro|RTC_CR_REFCKON
DECL|RTC_CR_SUB1H_Msk|macro|RTC_CR_SUB1H_Msk
DECL|RTC_CR_SUB1H_Pos|macro|RTC_CR_SUB1H_Pos
DECL|RTC_CR_SUB1H|macro|RTC_CR_SUB1H
DECL|RTC_CR_TSEDGE_Msk|macro|RTC_CR_TSEDGE_Msk
DECL|RTC_CR_TSEDGE_Pos|macro|RTC_CR_TSEDGE_Pos
DECL|RTC_CR_TSEDGE|macro|RTC_CR_TSEDGE
DECL|RTC_CR_TSE_Msk|macro|RTC_CR_TSE_Msk
DECL|RTC_CR_TSE_Pos|macro|RTC_CR_TSE_Pos
DECL|RTC_CR_TSE|macro|RTC_CR_TSE
DECL|RTC_CR_TSIE_Msk|macro|RTC_CR_TSIE_Msk
DECL|RTC_CR_TSIE_Pos|macro|RTC_CR_TSIE_Pos
DECL|RTC_CR_TSIE|macro|RTC_CR_TSIE
DECL|RTC_CR_WUCKSEL_0|macro|RTC_CR_WUCKSEL_0
DECL|RTC_CR_WUCKSEL_1|macro|RTC_CR_WUCKSEL_1
DECL|RTC_CR_WUCKSEL_2|macro|RTC_CR_WUCKSEL_2
DECL|RTC_CR_WUCKSEL_Msk|macro|RTC_CR_WUCKSEL_Msk
DECL|RTC_CR_WUCKSEL_Pos|macro|RTC_CR_WUCKSEL_Pos
DECL|RTC_CR_WUCKSEL|macro|RTC_CR_WUCKSEL
DECL|RTC_CR_WUTE_Msk|macro|RTC_CR_WUTE_Msk
DECL|RTC_CR_WUTE_Pos|macro|RTC_CR_WUTE_Pos
DECL|RTC_CR_WUTE|macro|RTC_CR_WUTE
DECL|RTC_CR_WUTIE_Msk|macro|RTC_CR_WUTIE_Msk
DECL|RTC_CR_WUTIE_Pos|macro|RTC_CR_WUTIE_Pos
DECL|RTC_CR_WUTIE|macro|RTC_CR_WUTIE
DECL|RTC_DR_DT_0|macro|RTC_DR_DT_0
DECL|RTC_DR_DT_1|macro|RTC_DR_DT_1
DECL|RTC_DR_DT_Msk|macro|RTC_DR_DT_Msk
DECL|RTC_DR_DT_Pos|macro|RTC_DR_DT_Pos
DECL|RTC_DR_DT|macro|RTC_DR_DT
DECL|RTC_DR_DU_0|macro|RTC_DR_DU_0
DECL|RTC_DR_DU_1|macro|RTC_DR_DU_1
DECL|RTC_DR_DU_2|macro|RTC_DR_DU_2
DECL|RTC_DR_DU_3|macro|RTC_DR_DU_3
DECL|RTC_DR_DU_Msk|macro|RTC_DR_DU_Msk
DECL|RTC_DR_DU_Pos|macro|RTC_DR_DU_Pos
DECL|RTC_DR_DU|macro|RTC_DR_DU
DECL|RTC_DR_MT_Msk|macro|RTC_DR_MT_Msk
DECL|RTC_DR_MT_Pos|macro|RTC_DR_MT_Pos
DECL|RTC_DR_MT|macro|RTC_DR_MT
DECL|RTC_DR_MU_0|macro|RTC_DR_MU_0
DECL|RTC_DR_MU_1|macro|RTC_DR_MU_1
DECL|RTC_DR_MU_2|macro|RTC_DR_MU_2
DECL|RTC_DR_MU_3|macro|RTC_DR_MU_3
DECL|RTC_DR_MU_Msk|macro|RTC_DR_MU_Msk
DECL|RTC_DR_MU_Pos|macro|RTC_DR_MU_Pos
DECL|RTC_DR_MU|macro|RTC_DR_MU
DECL|RTC_DR_WDU_0|macro|RTC_DR_WDU_0
DECL|RTC_DR_WDU_1|macro|RTC_DR_WDU_1
DECL|RTC_DR_WDU_2|macro|RTC_DR_WDU_2
DECL|RTC_DR_WDU_Msk|macro|RTC_DR_WDU_Msk
DECL|RTC_DR_WDU_Pos|macro|RTC_DR_WDU_Pos
DECL|RTC_DR_WDU|macro|RTC_DR_WDU
DECL|RTC_DR_YT_0|macro|RTC_DR_YT_0
DECL|RTC_DR_YT_1|macro|RTC_DR_YT_1
DECL|RTC_DR_YT_2|macro|RTC_DR_YT_2
DECL|RTC_DR_YT_3|macro|RTC_DR_YT_3
DECL|RTC_DR_YT_Msk|macro|RTC_DR_YT_Msk
DECL|RTC_DR_YT_Pos|macro|RTC_DR_YT_Pos
DECL|RTC_DR_YT|macro|RTC_DR_YT
DECL|RTC_DR_YU_0|macro|RTC_DR_YU_0
DECL|RTC_DR_YU_1|macro|RTC_DR_YU_1
DECL|RTC_DR_YU_2|macro|RTC_DR_YU_2
DECL|RTC_DR_YU_3|macro|RTC_DR_YU_3
DECL|RTC_DR_YU_Msk|macro|RTC_DR_YU_Msk
DECL|RTC_DR_YU_Pos|macro|RTC_DR_YU_Pos
DECL|RTC_DR_YU|macro|RTC_DR_YU
DECL|RTC_ISR_ALRAF_Msk|macro|RTC_ISR_ALRAF_Msk
DECL|RTC_ISR_ALRAF_Pos|macro|RTC_ISR_ALRAF_Pos
DECL|RTC_ISR_ALRAF|macro|RTC_ISR_ALRAF
DECL|RTC_ISR_ALRAWF_Msk|macro|RTC_ISR_ALRAWF_Msk
DECL|RTC_ISR_ALRAWF_Pos|macro|RTC_ISR_ALRAWF_Pos
DECL|RTC_ISR_ALRAWF|macro|RTC_ISR_ALRAWF
DECL|RTC_ISR_ALRBF_Msk|macro|RTC_ISR_ALRBF_Msk
DECL|RTC_ISR_ALRBF_Pos|macro|RTC_ISR_ALRBF_Pos
DECL|RTC_ISR_ALRBF|macro|RTC_ISR_ALRBF
DECL|RTC_ISR_ALRBWF_Msk|macro|RTC_ISR_ALRBWF_Msk
DECL|RTC_ISR_ALRBWF_Pos|macro|RTC_ISR_ALRBWF_Pos
DECL|RTC_ISR_ALRBWF|macro|RTC_ISR_ALRBWF
DECL|RTC_ISR_INITF_Msk|macro|RTC_ISR_INITF_Msk
DECL|RTC_ISR_INITF_Pos|macro|RTC_ISR_INITF_Pos
DECL|RTC_ISR_INITF|macro|RTC_ISR_INITF
DECL|RTC_ISR_INITS_Msk|macro|RTC_ISR_INITS_Msk
DECL|RTC_ISR_INITS_Pos|macro|RTC_ISR_INITS_Pos
DECL|RTC_ISR_INITS|macro|RTC_ISR_INITS
DECL|RTC_ISR_INIT_Msk|macro|RTC_ISR_INIT_Msk
DECL|RTC_ISR_INIT_Pos|macro|RTC_ISR_INIT_Pos
DECL|RTC_ISR_INIT|macro|RTC_ISR_INIT
DECL|RTC_ISR_ITSF_Msk|macro|RTC_ISR_ITSF_Msk
DECL|RTC_ISR_ITSF_Pos|macro|RTC_ISR_ITSF_Pos
DECL|RTC_ISR_ITSF|macro|RTC_ISR_ITSF
DECL|RTC_ISR_RECALPF_Msk|macro|RTC_ISR_RECALPF_Msk
DECL|RTC_ISR_RECALPF_Pos|macro|RTC_ISR_RECALPF_Pos
DECL|RTC_ISR_RECALPF|macro|RTC_ISR_RECALPF
DECL|RTC_ISR_RSF_Msk|macro|RTC_ISR_RSF_Msk
DECL|RTC_ISR_RSF_Pos|macro|RTC_ISR_RSF_Pos
DECL|RTC_ISR_RSF|macro|RTC_ISR_RSF
DECL|RTC_ISR_SHPF_Msk|macro|RTC_ISR_SHPF_Msk
DECL|RTC_ISR_SHPF_Pos|macro|RTC_ISR_SHPF_Pos
DECL|RTC_ISR_SHPF|macro|RTC_ISR_SHPF
DECL|RTC_ISR_TAMP1F_Msk|macro|RTC_ISR_TAMP1F_Msk
DECL|RTC_ISR_TAMP1F_Pos|macro|RTC_ISR_TAMP1F_Pos
DECL|RTC_ISR_TAMP1F|macro|RTC_ISR_TAMP1F
DECL|RTC_ISR_TAMP2F_Msk|macro|RTC_ISR_TAMP2F_Msk
DECL|RTC_ISR_TAMP2F_Pos|macro|RTC_ISR_TAMP2F_Pos
DECL|RTC_ISR_TAMP2F|macro|RTC_ISR_TAMP2F
DECL|RTC_ISR_TAMP3F_Msk|macro|RTC_ISR_TAMP3F_Msk
DECL|RTC_ISR_TAMP3F_Pos|macro|RTC_ISR_TAMP3F_Pos
DECL|RTC_ISR_TAMP3F|macro|RTC_ISR_TAMP3F
DECL|RTC_ISR_TSF_Msk|macro|RTC_ISR_TSF_Msk
DECL|RTC_ISR_TSF_Pos|macro|RTC_ISR_TSF_Pos
DECL|RTC_ISR_TSF|macro|RTC_ISR_TSF
DECL|RTC_ISR_TSOVF_Msk|macro|RTC_ISR_TSOVF_Msk
DECL|RTC_ISR_TSOVF_Pos|macro|RTC_ISR_TSOVF_Pos
DECL|RTC_ISR_TSOVF|macro|RTC_ISR_TSOVF
DECL|RTC_ISR_WUTF_Msk|macro|RTC_ISR_WUTF_Msk
DECL|RTC_ISR_WUTF_Pos|macro|RTC_ISR_WUTF_Pos
DECL|RTC_ISR_WUTF|macro|RTC_ISR_WUTF
DECL|RTC_ISR_WUTWF_Msk|macro|RTC_ISR_WUTWF_Msk
DECL|RTC_ISR_WUTWF_Pos|macro|RTC_ISR_WUTWF_Pos
DECL|RTC_ISR_WUTWF|macro|RTC_ISR_WUTWF
DECL|RTC_OR_ALARMOUTTYPE_Msk|macro|RTC_OR_ALARMOUTTYPE_Msk
DECL|RTC_OR_ALARMOUTTYPE_Pos|macro|RTC_OR_ALARMOUTTYPE_Pos
DECL|RTC_OR_ALARMOUTTYPE|macro|RTC_OR_ALARMOUTTYPE
DECL|RTC_OR_ALARMTYPE|macro|RTC_OR_ALARMTYPE
DECL|RTC_OR_TSINSEL_0|macro|RTC_OR_TSINSEL_0
DECL|RTC_OR_TSINSEL_1|macro|RTC_OR_TSINSEL_1
DECL|RTC_OR_TSINSEL_Msk|macro|RTC_OR_TSINSEL_Msk
DECL|RTC_OR_TSINSEL_Pos|macro|RTC_OR_TSINSEL_Pos
DECL|RTC_OR_TSINSEL|macro|RTC_OR_TSINSEL
DECL|RTC_PRER_PREDIV_A_Msk|macro|RTC_PRER_PREDIV_A_Msk
DECL|RTC_PRER_PREDIV_A_Pos|macro|RTC_PRER_PREDIV_A_Pos
DECL|RTC_PRER_PREDIV_A|macro|RTC_PRER_PREDIV_A
DECL|RTC_PRER_PREDIV_S_Msk|macro|RTC_PRER_PREDIV_S_Msk
DECL|RTC_PRER_PREDIV_S_Pos|macro|RTC_PRER_PREDIV_S_Pos
DECL|RTC_PRER_PREDIV_S|macro|RTC_PRER_PREDIV_S
DECL|RTC_SHIFTR_ADD1S_Msk|macro|RTC_SHIFTR_ADD1S_Msk
DECL|RTC_SHIFTR_ADD1S_Pos|macro|RTC_SHIFTR_ADD1S_Pos
DECL|RTC_SHIFTR_ADD1S|macro|RTC_SHIFTR_ADD1S
DECL|RTC_SHIFTR_SUBFS_Msk|macro|RTC_SHIFTR_SUBFS_Msk
DECL|RTC_SHIFTR_SUBFS_Pos|macro|RTC_SHIFTR_SUBFS_Pos
DECL|RTC_SHIFTR_SUBFS|macro|RTC_SHIFTR_SUBFS
DECL|RTC_SSR_SS_Msk|macro|RTC_SSR_SS_Msk
DECL|RTC_SSR_SS_Pos|macro|RTC_SSR_SS_Pos
DECL|RTC_SSR_SS|macro|RTC_SSR_SS
DECL|RTC_TAMPCR_TAMP1E_Msk|macro|RTC_TAMPCR_TAMP1E_Msk
DECL|RTC_TAMPCR_TAMP1E_Pos|macro|RTC_TAMPCR_TAMP1E_Pos
DECL|RTC_TAMPCR_TAMP1E|macro|RTC_TAMPCR_TAMP1E
DECL|RTC_TAMPCR_TAMP1IE_Msk|macro|RTC_TAMPCR_TAMP1IE_Msk
DECL|RTC_TAMPCR_TAMP1IE_Pos|macro|RTC_TAMPCR_TAMP1IE_Pos
DECL|RTC_TAMPCR_TAMP1IE|macro|RTC_TAMPCR_TAMP1IE
DECL|RTC_TAMPCR_TAMP1MF_Msk|macro|RTC_TAMPCR_TAMP1MF_Msk
DECL|RTC_TAMPCR_TAMP1MF_Pos|macro|RTC_TAMPCR_TAMP1MF_Pos
DECL|RTC_TAMPCR_TAMP1MF|macro|RTC_TAMPCR_TAMP1MF
DECL|RTC_TAMPCR_TAMP1NOERASE_Msk|macro|RTC_TAMPCR_TAMP1NOERASE_Msk
DECL|RTC_TAMPCR_TAMP1NOERASE_Pos|macro|RTC_TAMPCR_TAMP1NOERASE_Pos
DECL|RTC_TAMPCR_TAMP1NOERASE|macro|RTC_TAMPCR_TAMP1NOERASE
DECL|RTC_TAMPCR_TAMP1TRG_Msk|macro|RTC_TAMPCR_TAMP1TRG_Msk
DECL|RTC_TAMPCR_TAMP1TRG_Pos|macro|RTC_TAMPCR_TAMP1TRG_Pos
DECL|RTC_TAMPCR_TAMP1TRG|macro|RTC_TAMPCR_TAMP1TRG
DECL|RTC_TAMPCR_TAMP2E_Msk|macro|RTC_TAMPCR_TAMP2E_Msk
DECL|RTC_TAMPCR_TAMP2E_Pos|macro|RTC_TAMPCR_TAMP2E_Pos
DECL|RTC_TAMPCR_TAMP2E|macro|RTC_TAMPCR_TAMP2E
DECL|RTC_TAMPCR_TAMP2IE_Msk|macro|RTC_TAMPCR_TAMP2IE_Msk
DECL|RTC_TAMPCR_TAMP2IE_Pos|macro|RTC_TAMPCR_TAMP2IE_Pos
DECL|RTC_TAMPCR_TAMP2IE|macro|RTC_TAMPCR_TAMP2IE
DECL|RTC_TAMPCR_TAMP2MF_Msk|macro|RTC_TAMPCR_TAMP2MF_Msk
DECL|RTC_TAMPCR_TAMP2MF_Pos|macro|RTC_TAMPCR_TAMP2MF_Pos
DECL|RTC_TAMPCR_TAMP2MF|macro|RTC_TAMPCR_TAMP2MF
DECL|RTC_TAMPCR_TAMP2NOERASE_Msk|macro|RTC_TAMPCR_TAMP2NOERASE_Msk
DECL|RTC_TAMPCR_TAMP2NOERASE_Pos|macro|RTC_TAMPCR_TAMP2NOERASE_Pos
DECL|RTC_TAMPCR_TAMP2NOERASE|macro|RTC_TAMPCR_TAMP2NOERASE
DECL|RTC_TAMPCR_TAMP2TRG_Msk|macro|RTC_TAMPCR_TAMP2TRG_Msk
DECL|RTC_TAMPCR_TAMP2TRG_Pos|macro|RTC_TAMPCR_TAMP2TRG_Pos
DECL|RTC_TAMPCR_TAMP2TRG|macro|RTC_TAMPCR_TAMP2TRG
DECL|RTC_TAMPCR_TAMP3E_Msk|macro|RTC_TAMPCR_TAMP3E_Msk
DECL|RTC_TAMPCR_TAMP3E_Pos|macro|RTC_TAMPCR_TAMP3E_Pos
DECL|RTC_TAMPCR_TAMP3E|macro|RTC_TAMPCR_TAMP3E
DECL|RTC_TAMPCR_TAMP3IE_Msk|macro|RTC_TAMPCR_TAMP3IE_Msk
DECL|RTC_TAMPCR_TAMP3IE_Pos|macro|RTC_TAMPCR_TAMP3IE_Pos
DECL|RTC_TAMPCR_TAMP3IE|macro|RTC_TAMPCR_TAMP3IE
DECL|RTC_TAMPCR_TAMP3MF_Msk|macro|RTC_TAMPCR_TAMP3MF_Msk
DECL|RTC_TAMPCR_TAMP3MF_Pos|macro|RTC_TAMPCR_TAMP3MF_Pos
DECL|RTC_TAMPCR_TAMP3MF|macro|RTC_TAMPCR_TAMP3MF
DECL|RTC_TAMPCR_TAMP3NOERASE_Msk|macro|RTC_TAMPCR_TAMP3NOERASE_Msk
DECL|RTC_TAMPCR_TAMP3NOERASE_Pos|macro|RTC_TAMPCR_TAMP3NOERASE_Pos
DECL|RTC_TAMPCR_TAMP3NOERASE|macro|RTC_TAMPCR_TAMP3NOERASE
DECL|RTC_TAMPCR_TAMP3TRG_Msk|macro|RTC_TAMPCR_TAMP3TRG_Msk
DECL|RTC_TAMPCR_TAMP3TRG_Pos|macro|RTC_TAMPCR_TAMP3TRG_Pos
DECL|RTC_TAMPCR_TAMP3TRG|macro|RTC_TAMPCR_TAMP3TRG
DECL|RTC_TAMPCR_TAMPFLT_0|macro|RTC_TAMPCR_TAMPFLT_0
DECL|RTC_TAMPCR_TAMPFLT_1|macro|RTC_TAMPCR_TAMPFLT_1
DECL|RTC_TAMPCR_TAMPFLT_Msk|macro|RTC_TAMPCR_TAMPFLT_Msk
DECL|RTC_TAMPCR_TAMPFLT_Pos|macro|RTC_TAMPCR_TAMPFLT_Pos
DECL|RTC_TAMPCR_TAMPFLT|macro|RTC_TAMPCR_TAMPFLT
DECL|RTC_TAMPCR_TAMPFREQ_0|macro|RTC_TAMPCR_TAMPFREQ_0
DECL|RTC_TAMPCR_TAMPFREQ_1|macro|RTC_TAMPCR_TAMPFREQ_1
DECL|RTC_TAMPCR_TAMPFREQ_2|macro|RTC_TAMPCR_TAMPFREQ_2
DECL|RTC_TAMPCR_TAMPFREQ_Msk|macro|RTC_TAMPCR_TAMPFREQ_Msk
DECL|RTC_TAMPCR_TAMPFREQ_Pos|macro|RTC_TAMPCR_TAMPFREQ_Pos
DECL|RTC_TAMPCR_TAMPFREQ|macro|RTC_TAMPCR_TAMPFREQ
DECL|RTC_TAMPCR_TAMPIE_Msk|macro|RTC_TAMPCR_TAMPIE_Msk
DECL|RTC_TAMPCR_TAMPIE_Pos|macro|RTC_TAMPCR_TAMPIE_Pos
DECL|RTC_TAMPCR_TAMPIE|macro|RTC_TAMPCR_TAMPIE
DECL|RTC_TAMPCR_TAMPPRCH_0|macro|RTC_TAMPCR_TAMPPRCH_0
DECL|RTC_TAMPCR_TAMPPRCH_1|macro|RTC_TAMPCR_TAMPPRCH_1
DECL|RTC_TAMPCR_TAMPPRCH_Msk|macro|RTC_TAMPCR_TAMPPRCH_Msk
DECL|RTC_TAMPCR_TAMPPRCH_Pos|macro|RTC_TAMPCR_TAMPPRCH_Pos
DECL|RTC_TAMPCR_TAMPPRCH|macro|RTC_TAMPCR_TAMPPRCH
DECL|RTC_TAMPCR_TAMPPUDIS_Msk|macro|RTC_TAMPCR_TAMPPUDIS_Msk
DECL|RTC_TAMPCR_TAMPPUDIS_Pos|macro|RTC_TAMPCR_TAMPPUDIS_Pos
DECL|RTC_TAMPCR_TAMPPUDIS|macro|RTC_TAMPCR_TAMPPUDIS
DECL|RTC_TAMPCR_TAMPTS_Msk|macro|RTC_TAMPCR_TAMPTS_Msk
DECL|RTC_TAMPCR_TAMPTS_Pos|macro|RTC_TAMPCR_TAMPTS_Pos
DECL|RTC_TAMPCR_TAMPTS|macro|RTC_TAMPCR_TAMPTS
DECL|RTC_TR_HT_0|macro|RTC_TR_HT_0
DECL|RTC_TR_HT_1|macro|RTC_TR_HT_1
DECL|RTC_TR_HT_Msk|macro|RTC_TR_HT_Msk
DECL|RTC_TR_HT_Pos|macro|RTC_TR_HT_Pos
DECL|RTC_TR_HT|macro|RTC_TR_HT
DECL|RTC_TR_HU_0|macro|RTC_TR_HU_0
DECL|RTC_TR_HU_1|macro|RTC_TR_HU_1
DECL|RTC_TR_HU_2|macro|RTC_TR_HU_2
DECL|RTC_TR_HU_3|macro|RTC_TR_HU_3
DECL|RTC_TR_HU_Msk|macro|RTC_TR_HU_Msk
DECL|RTC_TR_HU_Pos|macro|RTC_TR_HU_Pos
DECL|RTC_TR_HU|macro|RTC_TR_HU
DECL|RTC_TR_MNT_0|macro|RTC_TR_MNT_0
DECL|RTC_TR_MNT_1|macro|RTC_TR_MNT_1
DECL|RTC_TR_MNT_2|macro|RTC_TR_MNT_2
DECL|RTC_TR_MNT_Msk|macro|RTC_TR_MNT_Msk
DECL|RTC_TR_MNT_Pos|macro|RTC_TR_MNT_Pos
DECL|RTC_TR_MNT|macro|RTC_TR_MNT
DECL|RTC_TR_MNU_0|macro|RTC_TR_MNU_0
DECL|RTC_TR_MNU_1|macro|RTC_TR_MNU_1
DECL|RTC_TR_MNU_2|macro|RTC_TR_MNU_2
DECL|RTC_TR_MNU_3|macro|RTC_TR_MNU_3
DECL|RTC_TR_MNU_Msk|macro|RTC_TR_MNU_Msk
DECL|RTC_TR_MNU_Pos|macro|RTC_TR_MNU_Pos
DECL|RTC_TR_MNU|macro|RTC_TR_MNU
DECL|RTC_TR_PM_Msk|macro|RTC_TR_PM_Msk
DECL|RTC_TR_PM_Pos|macro|RTC_TR_PM_Pos
DECL|RTC_TR_PM|macro|RTC_TR_PM
DECL|RTC_TR_ST_0|macro|RTC_TR_ST_0
DECL|RTC_TR_ST_1|macro|RTC_TR_ST_1
DECL|RTC_TR_ST_2|macro|RTC_TR_ST_2
DECL|RTC_TR_ST_Msk|macro|RTC_TR_ST_Msk
DECL|RTC_TR_ST_Pos|macro|RTC_TR_ST_Pos
DECL|RTC_TR_ST|macro|RTC_TR_ST
DECL|RTC_TR_SU_0|macro|RTC_TR_SU_0
DECL|RTC_TR_SU_1|macro|RTC_TR_SU_1
DECL|RTC_TR_SU_2|macro|RTC_TR_SU_2
DECL|RTC_TR_SU_3|macro|RTC_TR_SU_3
DECL|RTC_TR_SU_Msk|macro|RTC_TR_SU_Msk
DECL|RTC_TR_SU_Pos|macro|RTC_TR_SU_Pos
DECL|RTC_TR_SU|macro|RTC_TR_SU
DECL|RTC_TSDR_DT_0|macro|RTC_TSDR_DT_0
DECL|RTC_TSDR_DT_1|macro|RTC_TSDR_DT_1
DECL|RTC_TSDR_DT_Msk|macro|RTC_TSDR_DT_Msk
DECL|RTC_TSDR_DT_Pos|macro|RTC_TSDR_DT_Pos
DECL|RTC_TSDR_DT|macro|RTC_TSDR_DT
DECL|RTC_TSDR_DU_0|macro|RTC_TSDR_DU_0
DECL|RTC_TSDR_DU_1|macro|RTC_TSDR_DU_1
DECL|RTC_TSDR_DU_2|macro|RTC_TSDR_DU_2
DECL|RTC_TSDR_DU_3|macro|RTC_TSDR_DU_3
DECL|RTC_TSDR_DU_Msk|macro|RTC_TSDR_DU_Msk
DECL|RTC_TSDR_DU_Pos|macro|RTC_TSDR_DU_Pos
DECL|RTC_TSDR_DU|macro|RTC_TSDR_DU
DECL|RTC_TSDR_MT_Msk|macro|RTC_TSDR_MT_Msk
DECL|RTC_TSDR_MT_Pos|macro|RTC_TSDR_MT_Pos
DECL|RTC_TSDR_MT|macro|RTC_TSDR_MT
DECL|RTC_TSDR_MU_0|macro|RTC_TSDR_MU_0
DECL|RTC_TSDR_MU_1|macro|RTC_TSDR_MU_1
DECL|RTC_TSDR_MU_2|macro|RTC_TSDR_MU_2
DECL|RTC_TSDR_MU_3|macro|RTC_TSDR_MU_3
DECL|RTC_TSDR_MU_Msk|macro|RTC_TSDR_MU_Msk
DECL|RTC_TSDR_MU_Pos|macro|RTC_TSDR_MU_Pos
DECL|RTC_TSDR_MU|macro|RTC_TSDR_MU
DECL|RTC_TSDR_WDU_0|macro|RTC_TSDR_WDU_0
DECL|RTC_TSDR_WDU_1|macro|RTC_TSDR_WDU_1
DECL|RTC_TSDR_WDU_2|macro|RTC_TSDR_WDU_2
DECL|RTC_TSDR_WDU_Msk|macro|RTC_TSDR_WDU_Msk
DECL|RTC_TSDR_WDU_Pos|macro|RTC_TSDR_WDU_Pos
DECL|RTC_TSDR_WDU|macro|RTC_TSDR_WDU
DECL|RTC_TSSSR_SS_Msk|macro|RTC_TSSSR_SS_Msk
DECL|RTC_TSSSR_SS_Pos|macro|RTC_TSSSR_SS_Pos
DECL|RTC_TSSSR_SS|macro|RTC_TSSSR_SS
DECL|RTC_TSTR_HT_0|macro|RTC_TSTR_HT_0
DECL|RTC_TSTR_HT_1|macro|RTC_TSTR_HT_1
DECL|RTC_TSTR_HT_Msk|macro|RTC_TSTR_HT_Msk
DECL|RTC_TSTR_HT_Pos|macro|RTC_TSTR_HT_Pos
DECL|RTC_TSTR_HT|macro|RTC_TSTR_HT
DECL|RTC_TSTR_HU_0|macro|RTC_TSTR_HU_0
DECL|RTC_TSTR_HU_1|macro|RTC_TSTR_HU_1
DECL|RTC_TSTR_HU_2|macro|RTC_TSTR_HU_2
DECL|RTC_TSTR_HU_3|macro|RTC_TSTR_HU_3
DECL|RTC_TSTR_HU_Msk|macro|RTC_TSTR_HU_Msk
DECL|RTC_TSTR_HU_Pos|macro|RTC_TSTR_HU_Pos
DECL|RTC_TSTR_HU|macro|RTC_TSTR_HU
DECL|RTC_TSTR_MNT_0|macro|RTC_TSTR_MNT_0
DECL|RTC_TSTR_MNT_1|macro|RTC_TSTR_MNT_1
DECL|RTC_TSTR_MNT_2|macro|RTC_TSTR_MNT_2
DECL|RTC_TSTR_MNT_Msk|macro|RTC_TSTR_MNT_Msk
DECL|RTC_TSTR_MNT_Pos|macro|RTC_TSTR_MNT_Pos
DECL|RTC_TSTR_MNT|macro|RTC_TSTR_MNT
DECL|RTC_TSTR_MNU_0|macro|RTC_TSTR_MNU_0
DECL|RTC_TSTR_MNU_1|macro|RTC_TSTR_MNU_1
DECL|RTC_TSTR_MNU_2|macro|RTC_TSTR_MNU_2
DECL|RTC_TSTR_MNU_3|macro|RTC_TSTR_MNU_3
DECL|RTC_TSTR_MNU_Msk|macro|RTC_TSTR_MNU_Msk
DECL|RTC_TSTR_MNU_Pos|macro|RTC_TSTR_MNU_Pos
DECL|RTC_TSTR_MNU|macro|RTC_TSTR_MNU
DECL|RTC_TSTR_PM_Msk|macro|RTC_TSTR_PM_Msk
DECL|RTC_TSTR_PM_Pos|macro|RTC_TSTR_PM_Pos
DECL|RTC_TSTR_PM|macro|RTC_TSTR_PM
DECL|RTC_TSTR_ST_0|macro|RTC_TSTR_ST_0
DECL|RTC_TSTR_ST_1|macro|RTC_TSTR_ST_1
DECL|RTC_TSTR_ST_2|macro|RTC_TSTR_ST_2
DECL|RTC_TSTR_ST_Msk|macro|RTC_TSTR_ST_Msk
DECL|RTC_TSTR_ST_Pos|macro|RTC_TSTR_ST_Pos
DECL|RTC_TSTR_ST|macro|RTC_TSTR_ST
DECL|RTC_TSTR_SU_0|macro|RTC_TSTR_SU_0
DECL|RTC_TSTR_SU_1|macro|RTC_TSTR_SU_1
DECL|RTC_TSTR_SU_2|macro|RTC_TSTR_SU_2
DECL|RTC_TSTR_SU_3|macro|RTC_TSTR_SU_3
DECL|RTC_TSTR_SU_Msk|macro|RTC_TSTR_SU_Msk
DECL|RTC_TSTR_SU_Pos|macro|RTC_TSTR_SU_Pos
DECL|RTC_TSTR_SU|macro|RTC_TSTR_SU
DECL|RTC_TypeDef|typedef|} RTC_TypeDef;
DECL|RTC_WKUP_IRQn|enumerator|RTC_WKUP_IRQn = 3, /*!< RTC Wakeup interrupt through the EXTI line */
DECL|RTC_WPR_KEY_Msk|macro|RTC_WPR_KEY_Msk
DECL|RTC_WPR_KEY_Pos|macro|RTC_WPR_KEY_Pos
DECL|RTC_WPR_KEY|macro|RTC_WPR_KEY
DECL|RTC_WUTR_WUT_Msk|macro|RTC_WUTR_WUT_Msk
DECL|RTC_WUTR_WUT_Pos|macro|RTC_WUTR_WUT_Pos
DECL|RTC_WUTR_WUT|macro|RTC_WUTR_WUT
DECL|RTC|macro|RTC
DECL|RTOR|member|__IO uint32_t RTOR; /*!< USART Receiver Time Out register, Address offset: 0x14 */
DECL|RTSR|member|__IO uint32_t RTSR; /*!< EXTI Rising trigger selection register, Address offset: 0x08 */
DECL|RXCRCR|member|__IO uint32_t RXCRCR; /*!< SPI RX CRC register (not used in I2S mode), Address offset: 0x14 */
DECL|RXDR|member|__IO uint32_t RXDR; /*!< I2C Receive data register, Address offset: 0x24 */
DECL|Reserved04|member|uint32_t Reserved04; /*!< Reserved 900h + (ep_num * 20h) + 04h */
DECL|Reserved04|member|uint32_t Reserved04; /*!< Reserved B00h + (ep_num * 20h) + 04h */
DECL|Reserved0C|member|uint32_t Reserved0C; /*!< Reserved 80Ch */
DECL|Reserved0C|member|uint32_t Reserved0C; /*!< Reserved 900h + (ep_num * 20h) + 0Ch */
DECL|Reserved0C|member|uint32_t Reserved0C; /*!< Reserved B00h + (ep_num * 20h) + 0Ch */
DECL|Reserved18|member|uint32_t Reserved18; /*!< Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch */
DECL|Reserved18|member|uint32_t Reserved18[2]; /*!< Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch */
DECL|Reserved20|member|uint32_t Reserved20; /*!< Reserved 820h */
DECL|Reserved30|member|uint32_t Reserved30[2]; /*!< Reserved 030h */
DECL|Reserved40C|member|uint32_t Reserved40C; /*!< Reserved 40Ch */
DECL|Reserved40|member|uint32_t Reserved40; /*!< dedicated EP mask 840h */
DECL|Reserved43|member|uint32_t Reserved43[39]; /*!< Reserved 058h-0FFh */
DECL|Reserved44|member|uint32_t Reserved44[15]; /*!< Reserved 844-87Ch */
DECL|Reserved5|member|uint32_t Reserved5[3]; /*!< Reserved 040h-048h */
DECL|Reserved6|member|uint32_t Reserved6; /*!< Reserved 050h */
DECL|Reserved9|member|uint32_t Reserved9; /*!< Reserved 824h */
DECL|Reserved|member|uint32_t Reserved[2]; /*!< Reserved */
DECL|SAI1_BASE|macro|SAI1_BASE
DECL|SAI1_Block_A_BASE|macro|SAI1_Block_A_BASE
DECL|SAI1_Block_A|macro|SAI1_Block_A
DECL|SAI1_Block_B_BASE|macro|SAI1_Block_B_BASE
DECL|SAI1_Block_B|macro|SAI1_Block_B
DECL|SAI1_IRQn|enumerator|SAI1_IRQn = 87, /*!< SAI1 global Interrupt */
DECL|SAI1|macro|SAI1
DECL|SAI2_BASE|macro|SAI2_BASE
DECL|SAI2_Block_A_BASE|macro|SAI2_Block_A_BASE
DECL|SAI2_Block_A|macro|SAI2_Block_A
DECL|SAI2_Block_B_BASE|macro|SAI2_Block_B_BASE
DECL|SAI2_Block_B|macro|SAI2_Block_B
DECL|SAI2_IRQn|enumerator|SAI2_IRQn = 91, /*!< SAI2 global Interrupt */
DECL|SAI2|macro|SAI2
DECL|SAI_Block_TypeDef|typedef|} SAI_Block_TypeDef;
DECL|SAI_GCR_SYNCIN_0|macro|SAI_GCR_SYNCIN_0
DECL|SAI_GCR_SYNCIN_1|macro|SAI_GCR_SYNCIN_1
DECL|SAI_GCR_SYNCIN_Msk|macro|SAI_GCR_SYNCIN_Msk
DECL|SAI_GCR_SYNCIN_Pos|macro|SAI_GCR_SYNCIN_Pos
DECL|SAI_GCR_SYNCIN|macro|SAI_GCR_SYNCIN
DECL|SAI_GCR_SYNCOUT_0|macro|SAI_GCR_SYNCOUT_0
DECL|SAI_GCR_SYNCOUT_1|macro|SAI_GCR_SYNCOUT_1
DECL|SAI_GCR_SYNCOUT_Msk|macro|SAI_GCR_SYNCOUT_Msk
DECL|SAI_GCR_SYNCOUT_Pos|macro|SAI_GCR_SYNCOUT_Pos
DECL|SAI_GCR_SYNCOUT|macro|SAI_GCR_SYNCOUT
DECL|SAI_TypeDef|typedef|} SAI_TypeDef;
DECL|SAI_xCLRFR_CAFSDET_Msk|macro|SAI_xCLRFR_CAFSDET_Msk
DECL|SAI_xCLRFR_CAFSDET_Pos|macro|SAI_xCLRFR_CAFSDET_Pos
DECL|SAI_xCLRFR_CAFSDET|macro|SAI_xCLRFR_CAFSDET
DECL|SAI_xCLRFR_CCNRDY_Msk|macro|SAI_xCLRFR_CCNRDY_Msk
DECL|SAI_xCLRFR_CCNRDY_Pos|macro|SAI_xCLRFR_CCNRDY_Pos
DECL|SAI_xCLRFR_CCNRDY|macro|SAI_xCLRFR_CCNRDY
DECL|SAI_xCLRFR_CFREQ_Msk|macro|SAI_xCLRFR_CFREQ_Msk
DECL|SAI_xCLRFR_CFREQ_Pos|macro|SAI_xCLRFR_CFREQ_Pos
DECL|SAI_xCLRFR_CFREQ|macro|SAI_xCLRFR_CFREQ
DECL|SAI_xCLRFR_CLFSDET_Msk|macro|SAI_xCLRFR_CLFSDET_Msk
DECL|SAI_xCLRFR_CLFSDET_Pos|macro|SAI_xCLRFR_CLFSDET_Pos
DECL|SAI_xCLRFR_CLFSDET|macro|SAI_xCLRFR_CLFSDET
DECL|SAI_xCLRFR_CMUTEDET_Msk|macro|SAI_xCLRFR_CMUTEDET_Msk
DECL|SAI_xCLRFR_CMUTEDET_Pos|macro|SAI_xCLRFR_CMUTEDET_Pos
DECL|SAI_xCLRFR_CMUTEDET|macro|SAI_xCLRFR_CMUTEDET
DECL|SAI_xCLRFR_COVRUDR_Msk|macro|SAI_xCLRFR_COVRUDR_Msk
DECL|SAI_xCLRFR_COVRUDR_Pos|macro|SAI_xCLRFR_COVRUDR_Pos
DECL|SAI_xCLRFR_COVRUDR|macro|SAI_xCLRFR_COVRUDR
DECL|SAI_xCLRFR_CWCKCFG_Msk|macro|SAI_xCLRFR_CWCKCFG_Msk
DECL|SAI_xCLRFR_CWCKCFG_Pos|macro|SAI_xCLRFR_CWCKCFG_Pos
DECL|SAI_xCLRFR_CWCKCFG|macro|SAI_xCLRFR_CWCKCFG
DECL|SAI_xCR1_CKSTR_Msk|macro|SAI_xCR1_CKSTR_Msk
DECL|SAI_xCR1_CKSTR_Pos|macro|SAI_xCR1_CKSTR_Pos
DECL|SAI_xCR1_CKSTR|macro|SAI_xCR1_CKSTR
DECL|SAI_xCR1_DMAEN_Msk|macro|SAI_xCR1_DMAEN_Msk
DECL|SAI_xCR1_DMAEN_Pos|macro|SAI_xCR1_DMAEN_Pos
DECL|SAI_xCR1_DMAEN|macro|SAI_xCR1_DMAEN
DECL|SAI_xCR1_DS_0|macro|SAI_xCR1_DS_0
DECL|SAI_xCR1_DS_1|macro|SAI_xCR1_DS_1
DECL|SAI_xCR1_DS_2|macro|SAI_xCR1_DS_2
DECL|SAI_xCR1_DS_Msk|macro|SAI_xCR1_DS_Msk
DECL|SAI_xCR1_DS_Pos|macro|SAI_xCR1_DS_Pos
DECL|SAI_xCR1_DS|macro|SAI_xCR1_DS
DECL|SAI_xCR1_LSBFIRST_Msk|macro|SAI_xCR1_LSBFIRST_Msk
DECL|SAI_xCR1_LSBFIRST_Pos|macro|SAI_xCR1_LSBFIRST_Pos
DECL|SAI_xCR1_LSBFIRST|macro|SAI_xCR1_LSBFIRST
DECL|SAI_xCR1_MCKDIV_0|macro|SAI_xCR1_MCKDIV_0
DECL|SAI_xCR1_MCKDIV_1|macro|SAI_xCR1_MCKDIV_1
DECL|SAI_xCR1_MCKDIV_2|macro|SAI_xCR1_MCKDIV_2
DECL|SAI_xCR1_MCKDIV_3|macro|SAI_xCR1_MCKDIV_3
DECL|SAI_xCR1_MCKDIV_Msk|macro|SAI_xCR1_MCKDIV_Msk
DECL|SAI_xCR1_MCKDIV_Pos|macro|SAI_xCR1_MCKDIV_Pos
DECL|SAI_xCR1_MCKDIV|macro|SAI_xCR1_MCKDIV
DECL|SAI_xCR1_MODE_0|macro|SAI_xCR1_MODE_0
DECL|SAI_xCR1_MODE_1|macro|SAI_xCR1_MODE_1
DECL|SAI_xCR1_MODE_Msk|macro|SAI_xCR1_MODE_Msk
DECL|SAI_xCR1_MODE_Pos|macro|SAI_xCR1_MODE_Pos
DECL|SAI_xCR1_MODE|macro|SAI_xCR1_MODE
DECL|SAI_xCR1_MONO_Msk|macro|SAI_xCR1_MONO_Msk
DECL|SAI_xCR1_MONO_Pos|macro|SAI_xCR1_MONO_Pos
DECL|SAI_xCR1_MONO|macro|SAI_xCR1_MONO
DECL|SAI_xCR1_NODIV_Msk|macro|SAI_xCR1_NODIV_Msk
DECL|SAI_xCR1_NODIV_Pos|macro|SAI_xCR1_NODIV_Pos
DECL|SAI_xCR1_NODIV|macro|SAI_xCR1_NODIV
DECL|SAI_xCR1_OUTDRIV_Msk|macro|SAI_xCR1_OUTDRIV_Msk
DECL|SAI_xCR1_OUTDRIV_Pos|macro|SAI_xCR1_OUTDRIV_Pos
DECL|SAI_xCR1_OUTDRIV|macro|SAI_xCR1_OUTDRIV
DECL|SAI_xCR1_PRTCFG_0|macro|SAI_xCR1_PRTCFG_0
DECL|SAI_xCR1_PRTCFG_1|macro|SAI_xCR1_PRTCFG_1
DECL|SAI_xCR1_PRTCFG_Msk|macro|SAI_xCR1_PRTCFG_Msk
DECL|SAI_xCR1_PRTCFG_Pos|macro|SAI_xCR1_PRTCFG_Pos
DECL|SAI_xCR1_PRTCFG|macro|SAI_xCR1_PRTCFG
DECL|SAI_xCR1_SAIEN_Msk|macro|SAI_xCR1_SAIEN_Msk
DECL|SAI_xCR1_SAIEN_Pos|macro|SAI_xCR1_SAIEN_Pos
DECL|SAI_xCR1_SAIEN|macro|SAI_xCR1_SAIEN
DECL|SAI_xCR1_SYNCEN_0|macro|SAI_xCR1_SYNCEN_0
DECL|SAI_xCR1_SYNCEN_1|macro|SAI_xCR1_SYNCEN_1
DECL|SAI_xCR1_SYNCEN_Msk|macro|SAI_xCR1_SYNCEN_Msk
DECL|SAI_xCR1_SYNCEN_Pos|macro|SAI_xCR1_SYNCEN_Pos
DECL|SAI_xCR1_SYNCEN|macro|SAI_xCR1_SYNCEN
DECL|SAI_xCR2_COMP_0|macro|SAI_xCR2_COMP_0
DECL|SAI_xCR2_COMP_1|macro|SAI_xCR2_COMP_1
DECL|SAI_xCR2_COMP_Msk|macro|SAI_xCR2_COMP_Msk
DECL|SAI_xCR2_COMP_Pos|macro|SAI_xCR2_COMP_Pos
DECL|SAI_xCR2_COMP|macro|SAI_xCR2_COMP
DECL|SAI_xCR2_CPL_Msk|macro|SAI_xCR2_CPL_Msk
DECL|SAI_xCR2_CPL_Pos|macro|SAI_xCR2_CPL_Pos
DECL|SAI_xCR2_CPL|macro|SAI_xCR2_CPL
DECL|SAI_xCR2_FFLUSH_Msk|macro|SAI_xCR2_FFLUSH_Msk
DECL|SAI_xCR2_FFLUSH_Pos|macro|SAI_xCR2_FFLUSH_Pos
DECL|SAI_xCR2_FFLUSH|macro|SAI_xCR2_FFLUSH
DECL|SAI_xCR2_FTH_0|macro|SAI_xCR2_FTH_0
DECL|SAI_xCR2_FTH_1|macro|SAI_xCR2_FTH_1
DECL|SAI_xCR2_FTH_2|macro|SAI_xCR2_FTH_2
DECL|SAI_xCR2_FTH_Msk|macro|SAI_xCR2_FTH_Msk
DECL|SAI_xCR2_FTH_Pos|macro|SAI_xCR2_FTH_Pos
DECL|SAI_xCR2_FTH|macro|SAI_xCR2_FTH
DECL|SAI_xCR2_MUTECNT_0|macro|SAI_xCR2_MUTECNT_0
DECL|SAI_xCR2_MUTECNT_1|macro|SAI_xCR2_MUTECNT_1
DECL|SAI_xCR2_MUTECNT_2|macro|SAI_xCR2_MUTECNT_2
DECL|SAI_xCR2_MUTECNT_3|macro|SAI_xCR2_MUTECNT_3
DECL|SAI_xCR2_MUTECNT_4|macro|SAI_xCR2_MUTECNT_4
DECL|SAI_xCR2_MUTECNT_5|macro|SAI_xCR2_MUTECNT_5
DECL|SAI_xCR2_MUTECNT_Msk|macro|SAI_xCR2_MUTECNT_Msk
DECL|SAI_xCR2_MUTECNT_Pos|macro|SAI_xCR2_MUTECNT_Pos
DECL|SAI_xCR2_MUTECNT|macro|SAI_xCR2_MUTECNT
DECL|SAI_xCR2_MUTEVAL_Msk|macro|SAI_xCR2_MUTEVAL_Msk
DECL|SAI_xCR2_MUTEVAL_Pos|macro|SAI_xCR2_MUTEVAL_Pos
DECL|SAI_xCR2_MUTEVAL|macro|SAI_xCR2_MUTEVAL
DECL|SAI_xCR2_MUTE_Msk|macro|SAI_xCR2_MUTE_Msk
DECL|SAI_xCR2_MUTE_Pos|macro|SAI_xCR2_MUTE_Pos
DECL|SAI_xCR2_MUTE|macro|SAI_xCR2_MUTE
DECL|SAI_xCR2_TRIS_Msk|macro|SAI_xCR2_TRIS_Msk
DECL|SAI_xCR2_TRIS_Pos|macro|SAI_xCR2_TRIS_Pos
DECL|SAI_xCR2_TRIS|macro|SAI_xCR2_TRIS
DECL|SAI_xDR_DATA_Msk|macro|SAI_xDR_DATA_Msk
DECL|SAI_xDR_DATA_Pos|macro|SAI_xDR_DATA_Pos
DECL|SAI_xDR_DATA|macro|SAI_xDR_DATA
DECL|SAI_xFRCR_FRL_0|macro|SAI_xFRCR_FRL_0
DECL|SAI_xFRCR_FRL_1|macro|SAI_xFRCR_FRL_1
DECL|SAI_xFRCR_FRL_2|macro|SAI_xFRCR_FRL_2
DECL|SAI_xFRCR_FRL_3|macro|SAI_xFRCR_FRL_3
DECL|SAI_xFRCR_FRL_4|macro|SAI_xFRCR_FRL_4
DECL|SAI_xFRCR_FRL_5|macro|SAI_xFRCR_FRL_5
DECL|SAI_xFRCR_FRL_6|macro|SAI_xFRCR_FRL_6
DECL|SAI_xFRCR_FRL_7|macro|SAI_xFRCR_FRL_7
DECL|SAI_xFRCR_FRL_Msk|macro|SAI_xFRCR_FRL_Msk
DECL|SAI_xFRCR_FRL_Pos|macro|SAI_xFRCR_FRL_Pos
DECL|SAI_xFRCR_FRL|macro|SAI_xFRCR_FRL
DECL|SAI_xFRCR_FSALL_0|macro|SAI_xFRCR_FSALL_0
DECL|SAI_xFRCR_FSALL_1|macro|SAI_xFRCR_FSALL_1
DECL|SAI_xFRCR_FSALL_2|macro|SAI_xFRCR_FSALL_2
DECL|SAI_xFRCR_FSALL_3|macro|SAI_xFRCR_FSALL_3
DECL|SAI_xFRCR_FSALL_4|macro|SAI_xFRCR_FSALL_4
DECL|SAI_xFRCR_FSALL_5|macro|SAI_xFRCR_FSALL_5
DECL|SAI_xFRCR_FSALL_6|macro|SAI_xFRCR_FSALL_6
DECL|SAI_xFRCR_FSALL_Msk|macro|SAI_xFRCR_FSALL_Msk
DECL|SAI_xFRCR_FSALL_Pos|macro|SAI_xFRCR_FSALL_Pos
DECL|SAI_xFRCR_FSALL|macro|SAI_xFRCR_FSALL
DECL|SAI_xFRCR_FSDEF_Msk|macro|SAI_xFRCR_FSDEF_Msk
DECL|SAI_xFRCR_FSDEF_Pos|macro|SAI_xFRCR_FSDEF_Pos
DECL|SAI_xFRCR_FSDEF|macro|SAI_xFRCR_FSDEF
DECL|SAI_xFRCR_FSOFF_Msk|macro|SAI_xFRCR_FSOFF_Msk
DECL|SAI_xFRCR_FSOFF_Pos|macro|SAI_xFRCR_FSOFF_Pos
DECL|SAI_xFRCR_FSOFF|macro|SAI_xFRCR_FSOFF
DECL|SAI_xFRCR_FSPOL_Msk|macro|SAI_xFRCR_FSPOL_Msk
DECL|SAI_xFRCR_FSPOL_Pos|macro|SAI_xFRCR_FSPOL_Pos
DECL|SAI_xFRCR_FSPOL|macro|SAI_xFRCR_FSPOL
DECL|SAI_xFRCR_FSPO|macro|SAI_xFRCR_FSPO
DECL|SAI_xIMR_AFSDETIE_Msk|macro|SAI_xIMR_AFSDETIE_Msk
DECL|SAI_xIMR_AFSDETIE_Pos|macro|SAI_xIMR_AFSDETIE_Pos
DECL|SAI_xIMR_AFSDETIE|macro|SAI_xIMR_AFSDETIE
DECL|SAI_xIMR_CNRDYIE_Msk|macro|SAI_xIMR_CNRDYIE_Msk
DECL|SAI_xIMR_CNRDYIE_Pos|macro|SAI_xIMR_CNRDYIE_Pos
DECL|SAI_xIMR_CNRDYIE|macro|SAI_xIMR_CNRDYIE
DECL|SAI_xIMR_FREQIE_Msk|macro|SAI_xIMR_FREQIE_Msk
DECL|SAI_xIMR_FREQIE_Pos|macro|SAI_xIMR_FREQIE_Pos
DECL|SAI_xIMR_FREQIE|macro|SAI_xIMR_FREQIE
DECL|SAI_xIMR_LFSDETIE_Msk|macro|SAI_xIMR_LFSDETIE_Msk
DECL|SAI_xIMR_LFSDETIE_Pos|macro|SAI_xIMR_LFSDETIE_Pos
DECL|SAI_xIMR_LFSDETIE|macro|SAI_xIMR_LFSDETIE
DECL|SAI_xIMR_MUTEDETIE_Msk|macro|SAI_xIMR_MUTEDETIE_Msk
DECL|SAI_xIMR_MUTEDETIE_Pos|macro|SAI_xIMR_MUTEDETIE_Pos
DECL|SAI_xIMR_MUTEDETIE|macro|SAI_xIMR_MUTEDETIE
DECL|SAI_xIMR_OVRUDRIE_Msk|macro|SAI_xIMR_OVRUDRIE_Msk
DECL|SAI_xIMR_OVRUDRIE_Pos|macro|SAI_xIMR_OVRUDRIE_Pos
DECL|SAI_xIMR_OVRUDRIE|macro|SAI_xIMR_OVRUDRIE
DECL|SAI_xIMR_WCKCFGIE_Msk|macro|SAI_xIMR_WCKCFGIE_Msk
DECL|SAI_xIMR_WCKCFGIE_Pos|macro|SAI_xIMR_WCKCFGIE_Pos
DECL|SAI_xIMR_WCKCFGIE|macro|SAI_xIMR_WCKCFGIE
DECL|SAI_xSLOTR_FBOFF_0|macro|SAI_xSLOTR_FBOFF_0
DECL|SAI_xSLOTR_FBOFF_1|macro|SAI_xSLOTR_FBOFF_1
DECL|SAI_xSLOTR_FBOFF_2|macro|SAI_xSLOTR_FBOFF_2
DECL|SAI_xSLOTR_FBOFF_3|macro|SAI_xSLOTR_FBOFF_3
DECL|SAI_xSLOTR_FBOFF_4|macro|SAI_xSLOTR_FBOFF_4
DECL|SAI_xSLOTR_FBOFF_Msk|macro|SAI_xSLOTR_FBOFF_Msk
DECL|SAI_xSLOTR_FBOFF_Pos|macro|SAI_xSLOTR_FBOFF_Pos
DECL|SAI_xSLOTR_FBOFF|macro|SAI_xSLOTR_FBOFF
DECL|SAI_xSLOTR_NBSLOT_0|macro|SAI_xSLOTR_NBSLOT_0
DECL|SAI_xSLOTR_NBSLOT_1|macro|SAI_xSLOTR_NBSLOT_1
DECL|SAI_xSLOTR_NBSLOT_2|macro|SAI_xSLOTR_NBSLOT_2
DECL|SAI_xSLOTR_NBSLOT_3|macro|SAI_xSLOTR_NBSLOT_3
DECL|SAI_xSLOTR_NBSLOT_Msk|macro|SAI_xSLOTR_NBSLOT_Msk
DECL|SAI_xSLOTR_NBSLOT_Pos|macro|SAI_xSLOTR_NBSLOT_Pos
DECL|SAI_xSLOTR_NBSLOT|macro|SAI_xSLOTR_NBSLOT
DECL|SAI_xSLOTR_SLOTEN_Msk|macro|SAI_xSLOTR_SLOTEN_Msk
DECL|SAI_xSLOTR_SLOTEN_Pos|macro|SAI_xSLOTR_SLOTEN_Pos
DECL|SAI_xSLOTR_SLOTEN|macro|SAI_xSLOTR_SLOTEN
DECL|SAI_xSLOTR_SLOTSZ_0|macro|SAI_xSLOTR_SLOTSZ_0
DECL|SAI_xSLOTR_SLOTSZ_1|macro|SAI_xSLOTR_SLOTSZ_1
DECL|SAI_xSLOTR_SLOTSZ_Msk|macro|SAI_xSLOTR_SLOTSZ_Msk
DECL|SAI_xSLOTR_SLOTSZ_Pos|macro|SAI_xSLOTR_SLOTSZ_Pos
DECL|SAI_xSLOTR_SLOTSZ|macro|SAI_xSLOTR_SLOTSZ
DECL|SAI_xSR_AFSDET_Msk|macro|SAI_xSR_AFSDET_Msk
DECL|SAI_xSR_AFSDET_Pos|macro|SAI_xSR_AFSDET_Pos
DECL|SAI_xSR_AFSDET|macro|SAI_xSR_AFSDET
DECL|SAI_xSR_CNRDY_Msk|macro|SAI_xSR_CNRDY_Msk
DECL|SAI_xSR_CNRDY_Pos|macro|SAI_xSR_CNRDY_Pos
DECL|SAI_xSR_CNRDY|macro|SAI_xSR_CNRDY
DECL|SAI_xSR_FLVL_0|macro|SAI_xSR_FLVL_0
DECL|SAI_xSR_FLVL_1|macro|SAI_xSR_FLVL_1
DECL|SAI_xSR_FLVL_2|macro|SAI_xSR_FLVL_2
DECL|SAI_xSR_FLVL_Msk|macro|SAI_xSR_FLVL_Msk
DECL|SAI_xSR_FLVL_Pos|macro|SAI_xSR_FLVL_Pos
DECL|SAI_xSR_FLVL|macro|SAI_xSR_FLVL
DECL|SAI_xSR_FREQ_Msk|macro|SAI_xSR_FREQ_Msk
DECL|SAI_xSR_FREQ_Pos|macro|SAI_xSR_FREQ_Pos
DECL|SAI_xSR_FREQ|macro|SAI_xSR_FREQ
DECL|SAI_xSR_LFSDET_Msk|macro|SAI_xSR_LFSDET_Msk
DECL|SAI_xSR_LFSDET_Pos|macro|SAI_xSR_LFSDET_Pos
DECL|SAI_xSR_LFSDET|macro|SAI_xSR_LFSDET
DECL|SAI_xSR_MUTEDET_Msk|macro|SAI_xSR_MUTEDET_Msk
DECL|SAI_xSR_MUTEDET_Pos|macro|SAI_xSR_MUTEDET_Pos
DECL|SAI_xSR_MUTEDET|macro|SAI_xSR_MUTEDET
DECL|SAI_xSR_OVRUDR_Msk|macro|SAI_xSR_OVRUDR_Msk
DECL|SAI_xSR_OVRUDR_Pos|macro|SAI_xSR_OVRUDR_Pos
DECL|SAI_xSR_OVRUDR|macro|SAI_xSR_OVRUDR
DECL|SAI_xSR_WCKCFG_Msk|macro|SAI_xSR_WCKCFG_Msk
DECL|SAI_xSR_WCKCFG_Pos|macro|SAI_xSR_WCKCFG_Pos
DECL|SAI_xSR_WCKCFG|macro|SAI_xSR_WCKCFG
DECL|SDCMR|member|__IO uint32_t SDCMR; /*!< SDRAM Command Mode register, Address offset: 0x150 */
DECL|SDCR|member|__IO uint32_t SDCR[2]; /*!< SDRAM Control registers , Address offset: 0x140-0x144 */
DECL|SDMMC1_BASE|macro|SDMMC1_BASE
DECL|SDMMC1_IRQn|enumerator|SDMMC1_IRQn = 49, /*!< SDMMC1 global Interrupt */
DECL|SDMMC1|macro|SDMMC1
DECL|SDMMC2_BASE|macro|SDMMC2_BASE
DECL|SDMMC2_IRQn|enumerator|SDMMC2_IRQn = 103, /*!< SDMMC2 global Interrupt */
DECL|SDMMC2|macro|SDMMC2
DECL|SDMMC_ARG_CMDARG_Msk|macro|SDMMC_ARG_CMDARG_Msk
DECL|SDMMC_ARG_CMDARG_Pos|macro|SDMMC_ARG_CMDARG_Pos
DECL|SDMMC_ARG_CMDARG|macro|SDMMC_ARG_CMDARG
DECL|SDMMC_CLKCR_BYPASS_Msk|macro|SDMMC_CLKCR_BYPASS_Msk
DECL|SDMMC_CLKCR_BYPASS_Pos|macro|SDMMC_CLKCR_BYPASS_Pos
DECL|SDMMC_CLKCR_BYPASS|macro|SDMMC_CLKCR_BYPASS
DECL|SDMMC_CLKCR_CLKDIV_Msk|macro|SDMMC_CLKCR_CLKDIV_Msk
DECL|SDMMC_CLKCR_CLKDIV_Pos|macro|SDMMC_CLKCR_CLKDIV_Pos
DECL|SDMMC_CLKCR_CLKDIV|macro|SDMMC_CLKCR_CLKDIV
DECL|SDMMC_CLKCR_CLKEN_Msk|macro|SDMMC_CLKCR_CLKEN_Msk
DECL|SDMMC_CLKCR_CLKEN_Pos|macro|SDMMC_CLKCR_CLKEN_Pos
DECL|SDMMC_CLKCR_CLKEN|macro|SDMMC_CLKCR_CLKEN
DECL|SDMMC_CLKCR_HWFC_EN_Msk|macro|SDMMC_CLKCR_HWFC_EN_Msk
DECL|SDMMC_CLKCR_HWFC_EN_Pos|macro|SDMMC_CLKCR_HWFC_EN_Pos
DECL|SDMMC_CLKCR_HWFC_EN|macro|SDMMC_CLKCR_HWFC_EN
DECL|SDMMC_CLKCR_NEGEDGE_Msk|macro|SDMMC_CLKCR_NEGEDGE_Msk
DECL|SDMMC_CLKCR_NEGEDGE_Pos|macro|SDMMC_CLKCR_NEGEDGE_Pos
DECL|SDMMC_CLKCR_NEGEDGE|macro|SDMMC_CLKCR_NEGEDGE
DECL|SDMMC_CLKCR_PWRSAV_Msk|macro|SDMMC_CLKCR_PWRSAV_Msk
DECL|SDMMC_CLKCR_PWRSAV_Pos|macro|SDMMC_CLKCR_PWRSAV_Pos
DECL|SDMMC_CLKCR_PWRSAV|macro|SDMMC_CLKCR_PWRSAV
DECL|SDMMC_CLKCR_WIDBUS_0|macro|SDMMC_CLKCR_WIDBUS_0
DECL|SDMMC_CLKCR_WIDBUS_1|macro|SDMMC_CLKCR_WIDBUS_1
DECL|SDMMC_CLKCR_WIDBUS_Msk|macro|SDMMC_CLKCR_WIDBUS_Msk
DECL|SDMMC_CLKCR_WIDBUS_Pos|macro|SDMMC_CLKCR_WIDBUS_Pos
DECL|SDMMC_CLKCR_WIDBUS|macro|SDMMC_CLKCR_WIDBUS
DECL|SDMMC_CMD_CMDINDEX_Msk|macro|SDMMC_CMD_CMDINDEX_Msk
DECL|SDMMC_CMD_CMDINDEX_Pos|macro|SDMMC_CMD_CMDINDEX_Pos
DECL|SDMMC_CMD_CMDINDEX|macro|SDMMC_CMD_CMDINDEX
DECL|SDMMC_CMD_CPSMEN_Msk|macro|SDMMC_CMD_CPSMEN_Msk
DECL|SDMMC_CMD_CPSMEN_Pos|macro|SDMMC_CMD_CPSMEN_Pos
DECL|SDMMC_CMD_CPSMEN|macro|SDMMC_CMD_CPSMEN
DECL|SDMMC_CMD_SDIOSUSPEND_Msk|macro|SDMMC_CMD_SDIOSUSPEND_Msk
DECL|SDMMC_CMD_SDIOSUSPEND_Pos|macro|SDMMC_CMD_SDIOSUSPEND_Pos
DECL|SDMMC_CMD_SDIOSUSPEND|macro|SDMMC_CMD_SDIOSUSPEND
DECL|SDMMC_CMD_WAITINT_Msk|macro|SDMMC_CMD_WAITINT_Msk
DECL|SDMMC_CMD_WAITINT_Pos|macro|SDMMC_CMD_WAITINT_Pos
DECL|SDMMC_CMD_WAITINT|macro|SDMMC_CMD_WAITINT
DECL|SDMMC_CMD_WAITPEND_Msk|macro|SDMMC_CMD_WAITPEND_Msk
DECL|SDMMC_CMD_WAITPEND_Pos|macro|SDMMC_CMD_WAITPEND_Pos
DECL|SDMMC_CMD_WAITPEND|macro|SDMMC_CMD_WAITPEND
DECL|SDMMC_CMD_WAITRESP_0|macro|SDMMC_CMD_WAITRESP_0
DECL|SDMMC_CMD_WAITRESP_1|macro|SDMMC_CMD_WAITRESP_1
DECL|SDMMC_CMD_WAITRESP_Msk|macro|SDMMC_CMD_WAITRESP_Msk
DECL|SDMMC_CMD_WAITRESP_Pos|macro|SDMMC_CMD_WAITRESP_Pos
DECL|SDMMC_CMD_WAITRESP|macro|SDMMC_CMD_WAITRESP
DECL|SDMMC_DCOUNT_DATACOUNT_Msk|macro|SDMMC_DCOUNT_DATACOUNT_Msk
DECL|SDMMC_DCOUNT_DATACOUNT_Pos|macro|SDMMC_DCOUNT_DATACOUNT_Pos
DECL|SDMMC_DCOUNT_DATACOUNT|macro|SDMMC_DCOUNT_DATACOUNT
DECL|SDMMC_DCTRL_DBLOCKSIZE_0|macro|SDMMC_DCTRL_DBLOCKSIZE_0
DECL|SDMMC_DCTRL_DBLOCKSIZE_1|macro|SDMMC_DCTRL_DBLOCKSIZE_1
DECL|SDMMC_DCTRL_DBLOCKSIZE_2|macro|SDMMC_DCTRL_DBLOCKSIZE_2
DECL|SDMMC_DCTRL_DBLOCKSIZE_3|macro|SDMMC_DCTRL_DBLOCKSIZE_3
DECL|SDMMC_DCTRL_DBLOCKSIZE_Msk|macro|SDMMC_DCTRL_DBLOCKSIZE_Msk
DECL|SDMMC_DCTRL_DBLOCKSIZE_Pos|macro|SDMMC_DCTRL_DBLOCKSIZE_Pos
DECL|SDMMC_DCTRL_DBLOCKSIZE|macro|SDMMC_DCTRL_DBLOCKSIZE
DECL|SDMMC_DCTRL_DMAEN_Msk|macro|SDMMC_DCTRL_DMAEN_Msk
DECL|SDMMC_DCTRL_DMAEN_Pos|macro|SDMMC_DCTRL_DMAEN_Pos
DECL|SDMMC_DCTRL_DMAEN|macro|SDMMC_DCTRL_DMAEN
DECL|SDMMC_DCTRL_DTDIR_Msk|macro|SDMMC_DCTRL_DTDIR_Msk
DECL|SDMMC_DCTRL_DTDIR_Pos|macro|SDMMC_DCTRL_DTDIR_Pos
DECL|SDMMC_DCTRL_DTDIR|macro|SDMMC_DCTRL_DTDIR
DECL|SDMMC_DCTRL_DTEN_Msk|macro|SDMMC_DCTRL_DTEN_Msk
DECL|SDMMC_DCTRL_DTEN_Pos|macro|SDMMC_DCTRL_DTEN_Pos
DECL|SDMMC_DCTRL_DTEN|macro|SDMMC_DCTRL_DTEN
DECL|SDMMC_DCTRL_DTMODE_Msk|macro|SDMMC_DCTRL_DTMODE_Msk
DECL|SDMMC_DCTRL_DTMODE_Pos|macro|SDMMC_DCTRL_DTMODE_Pos
DECL|SDMMC_DCTRL_DTMODE|macro|SDMMC_DCTRL_DTMODE
DECL|SDMMC_DCTRL_RWMOD_Msk|macro|SDMMC_DCTRL_RWMOD_Msk
DECL|SDMMC_DCTRL_RWMOD_Pos|macro|SDMMC_DCTRL_RWMOD_Pos
DECL|SDMMC_DCTRL_RWMOD|macro|SDMMC_DCTRL_RWMOD
DECL|SDMMC_DCTRL_RWSTART_Msk|macro|SDMMC_DCTRL_RWSTART_Msk
DECL|SDMMC_DCTRL_RWSTART_Pos|macro|SDMMC_DCTRL_RWSTART_Pos
DECL|SDMMC_DCTRL_RWSTART|macro|SDMMC_DCTRL_RWSTART
DECL|SDMMC_DCTRL_RWSTOP_Msk|macro|SDMMC_DCTRL_RWSTOP_Msk
DECL|SDMMC_DCTRL_RWSTOP_Pos|macro|SDMMC_DCTRL_RWSTOP_Pos
DECL|SDMMC_DCTRL_RWSTOP|macro|SDMMC_DCTRL_RWSTOP
DECL|SDMMC_DCTRL_SDIOEN_Msk|macro|SDMMC_DCTRL_SDIOEN_Msk
DECL|SDMMC_DCTRL_SDIOEN_Pos|macro|SDMMC_DCTRL_SDIOEN_Pos
DECL|SDMMC_DCTRL_SDIOEN|macro|SDMMC_DCTRL_SDIOEN
DECL|SDMMC_DLEN_DATALENGTH_Msk|macro|SDMMC_DLEN_DATALENGTH_Msk
DECL|SDMMC_DLEN_DATALENGTH_Pos|macro|SDMMC_DLEN_DATALENGTH_Pos
DECL|SDMMC_DLEN_DATALENGTH|macro|SDMMC_DLEN_DATALENGTH
DECL|SDMMC_DTIMER_DATATIME_Msk|macro|SDMMC_DTIMER_DATATIME_Msk
DECL|SDMMC_DTIMER_DATATIME_Pos|macro|SDMMC_DTIMER_DATATIME_Pos
DECL|SDMMC_DTIMER_DATATIME|macro|SDMMC_DTIMER_DATATIME
DECL|SDMMC_FIFOCNT_FIFOCOUNT_Msk|macro|SDMMC_FIFOCNT_FIFOCOUNT_Msk
DECL|SDMMC_FIFOCNT_FIFOCOUNT_Pos|macro|SDMMC_FIFOCNT_FIFOCOUNT_Pos
DECL|SDMMC_FIFOCNT_FIFOCOUNT|macro|SDMMC_FIFOCNT_FIFOCOUNT
DECL|SDMMC_FIFO_FIFODATA_Msk|macro|SDMMC_FIFO_FIFODATA_Msk
DECL|SDMMC_FIFO_FIFODATA_Pos|macro|SDMMC_FIFO_FIFODATA_Pos
DECL|SDMMC_FIFO_FIFODATA|macro|SDMMC_FIFO_FIFODATA
DECL|SDMMC_ICR_CCRCFAILC_Msk|macro|SDMMC_ICR_CCRCFAILC_Msk
DECL|SDMMC_ICR_CCRCFAILC_Pos|macro|SDMMC_ICR_CCRCFAILC_Pos
DECL|SDMMC_ICR_CCRCFAILC|macro|SDMMC_ICR_CCRCFAILC
DECL|SDMMC_ICR_CMDRENDC_Msk|macro|SDMMC_ICR_CMDRENDC_Msk
DECL|SDMMC_ICR_CMDRENDC_Pos|macro|SDMMC_ICR_CMDRENDC_Pos
DECL|SDMMC_ICR_CMDRENDC|macro|SDMMC_ICR_CMDRENDC
DECL|SDMMC_ICR_CMDSENTC_Msk|macro|SDMMC_ICR_CMDSENTC_Msk
DECL|SDMMC_ICR_CMDSENTC_Pos|macro|SDMMC_ICR_CMDSENTC_Pos
DECL|SDMMC_ICR_CMDSENTC|macro|SDMMC_ICR_CMDSENTC
DECL|SDMMC_ICR_CTIMEOUTC_Msk|macro|SDMMC_ICR_CTIMEOUTC_Msk
DECL|SDMMC_ICR_CTIMEOUTC_Pos|macro|SDMMC_ICR_CTIMEOUTC_Pos
DECL|SDMMC_ICR_CTIMEOUTC|macro|SDMMC_ICR_CTIMEOUTC
DECL|SDMMC_ICR_DATAENDC_Msk|macro|SDMMC_ICR_DATAENDC_Msk
DECL|SDMMC_ICR_DATAENDC_Pos|macro|SDMMC_ICR_DATAENDC_Pos
DECL|SDMMC_ICR_DATAENDC|macro|SDMMC_ICR_DATAENDC
DECL|SDMMC_ICR_DBCKENDC_Msk|macro|SDMMC_ICR_DBCKENDC_Msk
DECL|SDMMC_ICR_DBCKENDC_Pos|macro|SDMMC_ICR_DBCKENDC_Pos
DECL|SDMMC_ICR_DBCKENDC|macro|SDMMC_ICR_DBCKENDC
DECL|SDMMC_ICR_DCRCFAILC_Msk|macro|SDMMC_ICR_DCRCFAILC_Msk
DECL|SDMMC_ICR_DCRCFAILC_Pos|macro|SDMMC_ICR_DCRCFAILC_Pos
DECL|SDMMC_ICR_DCRCFAILC|macro|SDMMC_ICR_DCRCFAILC
DECL|SDMMC_ICR_DTIMEOUTC_Msk|macro|SDMMC_ICR_DTIMEOUTC_Msk
DECL|SDMMC_ICR_DTIMEOUTC_Pos|macro|SDMMC_ICR_DTIMEOUTC_Pos
DECL|SDMMC_ICR_DTIMEOUTC|macro|SDMMC_ICR_DTIMEOUTC
DECL|SDMMC_ICR_RXOVERRC_Msk|macro|SDMMC_ICR_RXOVERRC_Msk
DECL|SDMMC_ICR_RXOVERRC_Pos|macro|SDMMC_ICR_RXOVERRC_Pos
DECL|SDMMC_ICR_RXOVERRC|macro|SDMMC_ICR_RXOVERRC
DECL|SDMMC_ICR_SDIOITC_Msk|macro|SDMMC_ICR_SDIOITC_Msk
DECL|SDMMC_ICR_SDIOITC_Pos|macro|SDMMC_ICR_SDIOITC_Pos
DECL|SDMMC_ICR_SDIOITC|macro|SDMMC_ICR_SDIOITC
DECL|SDMMC_ICR_TXUNDERRC_Msk|macro|SDMMC_ICR_TXUNDERRC_Msk
DECL|SDMMC_ICR_TXUNDERRC_Pos|macro|SDMMC_ICR_TXUNDERRC_Pos
DECL|SDMMC_ICR_TXUNDERRC|macro|SDMMC_ICR_TXUNDERRC
DECL|SDMMC_MASK_CCRCFAILIE_Msk|macro|SDMMC_MASK_CCRCFAILIE_Msk
DECL|SDMMC_MASK_CCRCFAILIE_Pos|macro|SDMMC_MASK_CCRCFAILIE_Pos
DECL|SDMMC_MASK_CCRCFAILIE|macro|SDMMC_MASK_CCRCFAILIE
DECL|SDMMC_MASK_CMDACTIE_Msk|macro|SDMMC_MASK_CMDACTIE_Msk
DECL|SDMMC_MASK_CMDACTIE_Pos|macro|SDMMC_MASK_CMDACTIE_Pos
DECL|SDMMC_MASK_CMDACTIE|macro|SDMMC_MASK_CMDACTIE
DECL|SDMMC_MASK_CMDRENDIE_Msk|macro|SDMMC_MASK_CMDRENDIE_Msk
DECL|SDMMC_MASK_CMDRENDIE_Pos|macro|SDMMC_MASK_CMDRENDIE_Pos
DECL|SDMMC_MASK_CMDRENDIE|macro|SDMMC_MASK_CMDRENDIE
DECL|SDMMC_MASK_CMDSENTIE_Msk|macro|SDMMC_MASK_CMDSENTIE_Msk
DECL|SDMMC_MASK_CMDSENTIE_Pos|macro|SDMMC_MASK_CMDSENTIE_Pos
DECL|SDMMC_MASK_CMDSENTIE|macro|SDMMC_MASK_CMDSENTIE
DECL|SDMMC_MASK_CTIMEOUTIE_Msk|macro|SDMMC_MASK_CTIMEOUTIE_Msk
DECL|SDMMC_MASK_CTIMEOUTIE_Pos|macro|SDMMC_MASK_CTIMEOUTIE_Pos
DECL|SDMMC_MASK_CTIMEOUTIE|macro|SDMMC_MASK_CTIMEOUTIE
DECL|SDMMC_MASK_DATAENDIE_Msk|macro|SDMMC_MASK_DATAENDIE_Msk
DECL|SDMMC_MASK_DATAENDIE_Pos|macro|SDMMC_MASK_DATAENDIE_Pos
DECL|SDMMC_MASK_DATAENDIE|macro|SDMMC_MASK_DATAENDIE
DECL|SDMMC_MASK_DBCKENDIE_Msk|macro|SDMMC_MASK_DBCKENDIE_Msk
DECL|SDMMC_MASK_DBCKENDIE_Pos|macro|SDMMC_MASK_DBCKENDIE_Pos
DECL|SDMMC_MASK_DBCKENDIE|macro|SDMMC_MASK_DBCKENDIE
DECL|SDMMC_MASK_DCRCFAILIE_Msk|macro|SDMMC_MASK_DCRCFAILIE_Msk
DECL|SDMMC_MASK_DCRCFAILIE_Pos|macro|SDMMC_MASK_DCRCFAILIE_Pos
DECL|SDMMC_MASK_DCRCFAILIE|macro|SDMMC_MASK_DCRCFAILIE
DECL|SDMMC_MASK_DTIMEOUTIE_Msk|macro|SDMMC_MASK_DTIMEOUTIE_Msk
DECL|SDMMC_MASK_DTIMEOUTIE_Pos|macro|SDMMC_MASK_DTIMEOUTIE_Pos
DECL|SDMMC_MASK_DTIMEOUTIE|macro|SDMMC_MASK_DTIMEOUTIE
DECL|SDMMC_MASK_RXACTIE_Msk|macro|SDMMC_MASK_RXACTIE_Msk
DECL|SDMMC_MASK_RXACTIE_Pos|macro|SDMMC_MASK_RXACTIE_Pos
DECL|SDMMC_MASK_RXACTIE|macro|SDMMC_MASK_RXACTIE
DECL|SDMMC_MASK_RXDAVLIE_Msk|macro|SDMMC_MASK_RXDAVLIE_Msk
DECL|SDMMC_MASK_RXDAVLIE_Pos|macro|SDMMC_MASK_RXDAVLIE_Pos
DECL|SDMMC_MASK_RXDAVLIE|macro|SDMMC_MASK_RXDAVLIE
DECL|SDMMC_MASK_RXFIFOEIE_Msk|macro|SDMMC_MASK_RXFIFOEIE_Msk
DECL|SDMMC_MASK_RXFIFOEIE_Pos|macro|SDMMC_MASK_RXFIFOEIE_Pos
DECL|SDMMC_MASK_RXFIFOEIE|macro|SDMMC_MASK_RXFIFOEIE
DECL|SDMMC_MASK_RXFIFOFIE_Msk|macro|SDMMC_MASK_RXFIFOFIE_Msk
DECL|SDMMC_MASK_RXFIFOFIE_Pos|macro|SDMMC_MASK_RXFIFOFIE_Pos
DECL|SDMMC_MASK_RXFIFOFIE|macro|SDMMC_MASK_RXFIFOFIE
DECL|SDMMC_MASK_RXFIFOHFIE_Msk|macro|SDMMC_MASK_RXFIFOHFIE_Msk
DECL|SDMMC_MASK_RXFIFOHFIE_Pos|macro|SDMMC_MASK_RXFIFOHFIE_Pos
DECL|SDMMC_MASK_RXFIFOHFIE|macro|SDMMC_MASK_RXFIFOHFIE
DECL|SDMMC_MASK_RXOVERRIE_Msk|macro|SDMMC_MASK_RXOVERRIE_Msk
DECL|SDMMC_MASK_RXOVERRIE_Pos|macro|SDMMC_MASK_RXOVERRIE_Pos
DECL|SDMMC_MASK_RXOVERRIE|macro|SDMMC_MASK_RXOVERRIE
DECL|SDMMC_MASK_SDIOITIE_Msk|macro|SDMMC_MASK_SDIOITIE_Msk
DECL|SDMMC_MASK_SDIOITIE_Pos|macro|SDMMC_MASK_SDIOITIE_Pos
DECL|SDMMC_MASK_SDIOITIE|macro|SDMMC_MASK_SDIOITIE
DECL|SDMMC_MASK_TXACTIE_Msk|macro|SDMMC_MASK_TXACTIE_Msk
DECL|SDMMC_MASK_TXACTIE_Pos|macro|SDMMC_MASK_TXACTIE_Pos
DECL|SDMMC_MASK_TXACTIE|macro|SDMMC_MASK_TXACTIE
DECL|SDMMC_MASK_TXDAVLIE_Msk|macro|SDMMC_MASK_TXDAVLIE_Msk
DECL|SDMMC_MASK_TXDAVLIE_Pos|macro|SDMMC_MASK_TXDAVLIE_Pos
DECL|SDMMC_MASK_TXDAVLIE|macro|SDMMC_MASK_TXDAVLIE
DECL|SDMMC_MASK_TXFIFOEIE_Msk|macro|SDMMC_MASK_TXFIFOEIE_Msk
DECL|SDMMC_MASK_TXFIFOEIE_Pos|macro|SDMMC_MASK_TXFIFOEIE_Pos
DECL|SDMMC_MASK_TXFIFOEIE|macro|SDMMC_MASK_TXFIFOEIE
DECL|SDMMC_MASK_TXFIFOFIE_Msk|macro|SDMMC_MASK_TXFIFOFIE_Msk
DECL|SDMMC_MASK_TXFIFOFIE_Pos|macro|SDMMC_MASK_TXFIFOFIE_Pos
DECL|SDMMC_MASK_TXFIFOFIE|macro|SDMMC_MASK_TXFIFOFIE
DECL|SDMMC_MASK_TXFIFOHEIE_Msk|macro|SDMMC_MASK_TXFIFOHEIE_Msk
DECL|SDMMC_MASK_TXFIFOHEIE_Pos|macro|SDMMC_MASK_TXFIFOHEIE_Pos
DECL|SDMMC_MASK_TXFIFOHEIE|macro|SDMMC_MASK_TXFIFOHEIE
DECL|SDMMC_MASK_TXUNDERRIE_Msk|macro|SDMMC_MASK_TXUNDERRIE_Msk
DECL|SDMMC_MASK_TXUNDERRIE_Pos|macro|SDMMC_MASK_TXUNDERRIE_Pos
DECL|SDMMC_MASK_TXUNDERRIE|macro|SDMMC_MASK_TXUNDERRIE
DECL|SDMMC_POWER_PWRCTRL_0|macro|SDMMC_POWER_PWRCTRL_0
DECL|SDMMC_POWER_PWRCTRL_1|macro|SDMMC_POWER_PWRCTRL_1
DECL|SDMMC_POWER_PWRCTRL_Msk|macro|SDMMC_POWER_PWRCTRL_Msk
DECL|SDMMC_POWER_PWRCTRL_Pos|macro|SDMMC_POWER_PWRCTRL_Pos
DECL|SDMMC_POWER_PWRCTRL|macro|SDMMC_POWER_PWRCTRL
DECL|SDMMC_RESP0_CARDSTATUS0_Msk|macro|SDMMC_RESP0_CARDSTATUS0_Msk
DECL|SDMMC_RESP0_CARDSTATUS0_Pos|macro|SDMMC_RESP0_CARDSTATUS0_Pos
DECL|SDMMC_RESP0_CARDSTATUS0|macro|SDMMC_RESP0_CARDSTATUS0
DECL|SDMMC_RESP1_CARDSTATUS1_Msk|macro|SDMMC_RESP1_CARDSTATUS1_Msk
DECL|SDMMC_RESP1_CARDSTATUS1_Pos|macro|SDMMC_RESP1_CARDSTATUS1_Pos
DECL|SDMMC_RESP1_CARDSTATUS1|macro|SDMMC_RESP1_CARDSTATUS1
DECL|SDMMC_RESP2_CARDSTATUS2_Msk|macro|SDMMC_RESP2_CARDSTATUS2_Msk
DECL|SDMMC_RESP2_CARDSTATUS2_Pos|macro|SDMMC_RESP2_CARDSTATUS2_Pos
DECL|SDMMC_RESP2_CARDSTATUS2|macro|SDMMC_RESP2_CARDSTATUS2
DECL|SDMMC_RESP3_CARDSTATUS3_Msk|macro|SDMMC_RESP3_CARDSTATUS3_Msk
DECL|SDMMC_RESP3_CARDSTATUS3_Pos|macro|SDMMC_RESP3_CARDSTATUS3_Pos
DECL|SDMMC_RESP3_CARDSTATUS3|macro|SDMMC_RESP3_CARDSTATUS3
DECL|SDMMC_RESP4_CARDSTATUS4_Msk|macro|SDMMC_RESP4_CARDSTATUS4_Msk
DECL|SDMMC_RESP4_CARDSTATUS4_Pos|macro|SDMMC_RESP4_CARDSTATUS4_Pos
DECL|SDMMC_RESP4_CARDSTATUS4|macro|SDMMC_RESP4_CARDSTATUS4
DECL|SDMMC_RESPCMD_RESPCMD_Msk|macro|SDMMC_RESPCMD_RESPCMD_Msk
DECL|SDMMC_RESPCMD_RESPCMD_Pos|macro|SDMMC_RESPCMD_RESPCMD_Pos
DECL|SDMMC_RESPCMD_RESPCMD|macro|SDMMC_RESPCMD_RESPCMD
DECL|SDMMC_STA_CCRCFAIL_Msk|macro|SDMMC_STA_CCRCFAIL_Msk
DECL|SDMMC_STA_CCRCFAIL_Pos|macro|SDMMC_STA_CCRCFAIL_Pos
DECL|SDMMC_STA_CCRCFAIL|macro|SDMMC_STA_CCRCFAIL
DECL|SDMMC_STA_CMDACT_Msk|macro|SDMMC_STA_CMDACT_Msk
DECL|SDMMC_STA_CMDACT_Pos|macro|SDMMC_STA_CMDACT_Pos
DECL|SDMMC_STA_CMDACT|macro|SDMMC_STA_CMDACT
DECL|SDMMC_STA_CMDREND_Msk|macro|SDMMC_STA_CMDREND_Msk
DECL|SDMMC_STA_CMDREND_Pos|macro|SDMMC_STA_CMDREND_Pos
DECL|SDMMC_STA_CMDREND|macro|SDMMC_STA_CMDREND
DECL|SDMMC_STA_CMDSENT_Msk|macro|SDMMC_STA_CMDSENT_Msk
DECL|SDMMC_STA_CMDSENT_Pos|macro|SDMMC_STA_CMDSENT_Pos
DECL|SDMMC_STA_CMDSENT|macro|SDMMC_STA_CMDSENT
DECL|SDMMC_STA_CTIMEOUT_Msk|macro|SDMMC_STA_CTIMEOUT_Msk
DECL|SDMMC_STA_CTIMEOUT_Pos|macro|SDMMC_STA_CTIMEOUT_Pos
DECL|SDMMC_STA_CTIMEOUT|macro|SDMMC_STA_CTIMEOUT
DECL|SDMMC_STA_DATAEND_Msk|macro|SDMMC_STA_DATAEND_Msk
DECL|SDMMC_STA_DATAEND_Pos|macro|SDMMC_STA_DATAEND_Pos
DECL|SDMMC_STA_DATAEND|macro|SDMMC_STA_DATAEND
DECL|SDMMC_STA_DBCKEND_Msk|macro|SDMMC_STA_DBCKEND_Msk
DECL|SDMMC_STA_DBCKEND_Pos|macro|SDMMC_STA_DBCKEND_Pos
DECL|SDMMC_STA_DBCKEND|macro|SDMMC_STA_DBCKEND
DECL|SDMMC_STA_DCRCFAIL_Msk|macro|SDMMC_STA_DCRCFAIL_Msk
DECL|SDMMC_STA_DCRCFAIL_Pos|macro|SDMMC_STA_DCRCFAIL_Pos
DECL|SDMMC_STA_DCRCFAIL|macro|SDMMC_STA_DCRCFAIL
DECL|SDMMC_STA_DTIMEOUT_Msk|macro|SDMMC_STA_DTIMEOUT_Msk
DECL|SDMMC_STA_DTIMEOUT_Pos|macro|SDMMC_STA_DTIMEOUT_Pos
DECL|SDMMC_STA_DTIMEOUT|macro|SDMMC_STA_DTIMEOUT
DECL|SDMMC_STA_RXACT_Msk|macro|SDMMC_STA_RXACT_Msk
DECL|SDMMC_STA_RXACT_Pos|macro|SDMMC_STA_RXACT_Pos
DECL|SDMMC_STA_RXACT|macro|SDMMC_STA_RXACT
DECL|SDMMC_STA_RXDAVL_Msk|macro|SDMMC_STA_RXDAVL_Msk
DECL|SDMMC_STA_RXDAVL_Pos|macro|SDMMC_STA_RXDAVL_Pos
DECL|SDMMC_STA_RXDAVL|macro|SDMMC_STA_RXDAVL
DECL|SDMMC_STA_RXFIFOE_Msk|macro|SDMMC_STA_RXFIFOE_Msk
DECL|SDMMC_STA_RXFIFOE_Pos|macro|SDMMC_STA_RXFIFOE_Pos
DECL|SDMMC_STA_RXFIFOE|macro|SDMMC_STA_RXFIFOE
DECL|SDMMC_STA_RXFIFOF_Msk|macro|SDMMC_STA_RXFIFOF_Msk
DECL|SDMMC_STA_RXFIFOF_Pos|macro|SDMMC_STA_RXFIFOF_Pos
DECL|SDMMC_STA_RXFIFOF|macro|SDMMC_STA_RXFIFOF
DECL|SDMMC_STA_RXFIFOHF_Msk|macro|SDMMC_STA_RXFIFOHF_Msk
DECL|SDMMC_STA_RXFIFOHF_Pos|macro|SDMMC_STA_RXFIFOHF_Pos
DECL|SDMMC_STA_RXFIFOHF|macro|SDMMC_STA_RXFIFOHF
DECL|SDMMC_STA_RXOVERR_Msk|macro|SDMMC_STA_RXOVERR_Msk
DECL|SDMMC_STA_RXOVERR_Pos|macro|SDMMC_STA_RXOVERR_Pos
DECL|SDMMC_STA_RXOVERR|macro|SDMMC_STA_RXOVERR
DECL|SDMMC_STA_SDIOIT_Msk|macro|SDMMC_STA_SDIOIT_Msk
DECL|SDMMC_STA_SDIOIT_Pos|macro|SDMMC_STA_SDIOIT_Pos
DECL|SDMMC_STA_SDIOIT|macro|SDMMC_STA_SDIOIT
DECL|SDMMC_STA_TXACT_Msk|macro|SDMMC_STA_TXACT_Msk
DECL|SDMMC_STA_TXACT_Pos|macro|SDMMC_STA_TXACT_Pos
DECL|SDMMC_STA_TXACT|macro|SDMMC_STA_TXACT
DECL|SDMMC_STA_TXDAVL_Msk|macro|SDMMC_STA_TXDAVL_Msk
DECL|SDMMC_STA_TXDAVL_Pos|macro|SDMMC_STA_TXDAVL_Pos
DECL|SDMMC_STA_TXDAVL|macro|SDMMC_STA_TXDAVL
DECL|SDMMC_STA_TXFIFOE_Msk|macro|SDMMC_STA_TXFIFOE_Msk
DECL|SDMMC_STA_TXFIFOE_Pos|macro|SDMMC_STA_TXFIFOE_Pos
DECL|SDMMC_STA_TXFIFOE|macro|SDMMC_STA_TXFIFOE
DECL|SDMMC_STA_TXFIFOF_Msk|macro|SDMMC_STA_TXFIFOF_Msk
DECL|SDMMC_STA_TXFIFOF_Pos|macro|SDMMC_STA_TXFIFOF_Pos
DECL|SDMMC_STA_TXFIFOF|macro|SDMMC_STA_TXFIFOF
DECL|SDMMC_STA_TXFIFOHE_Msk|macro|SDMMC_STA_TXFIFOHE_Msk
DECL|SDMMC_STA_TXFIFOHE_Pos|macro|SDMMC_STA_TXFIFOHE_Pos
DECL|SDMMC_STA_TXFIFOHE|macro|SDMMC_STA_TXFIFOHE
DECL|SDMMC_STA_TXUNDERR_Msk|macro|SDMMC_STA_TXUNDERR_Msk
DECL|SDMMC_STA_TXUNDERR_Pos|macro|SDMMC_STA_TXUNDERR_Pos
DECL|SDMMC_STA_TXUNDERR|macro|SDMMC_STA_TXUNDERR
DECL|SDMMC_TypeDef|typedef|} SDMMC_TypeDef;
DECL|SDRTR|member|__IO uint32_t SDRTR; /*!< SDRAM Refresh Timer register, Address offset: 0x154 */
DECL|SDSR|member|__IO uint32_t SDSR; /*!< SDRAM Status register, Address offset: 0x158 */
DECL|SDTR|member|__IO uint32_t SDTR[2]; /*!< SDRAM Timing registers , Address offset: 0x148-0x14C */
DECL|SHIFTR|member|__IO uint32_t SHIFTR; /*!< RTC shift control register, Address offset: 0x2C */
DECL|SLOTR|member|__IO uint32_t SLOTR; /*!< SAI block x slot register, Address offset: 0x10 */
DECL|SMCR|member|__IO uint32_t SMCR; /*!< TIM slave mode control register, Address offset: 0x08 */
DECL|SMPR1|member|__IO uint32_t SMPR1; /*!< ADC sample time register 1, Address offset: 0x0C */
DECL|SMPR2|member|__IO uint32_t SMPR2; /*!< ADC sample time register 2, Address offset: 0x10 */
DECL|SPI1_BASE|macro|SPI1_BASE
DECL|SPI1_IRQn|enumerator|SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
DECL|SPI1|macro|SPI1
DECL|SPI2_BASE|macro|SPI2_BASE
DECL|SPI2_IRQn|enumerator|SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
DECL|SPI2|macro|SPI2
DECL|SPI3_BASE|macro|SPI3_BASE
DECL|SPI3_IRQn|enumerator|SPI3_IRQn = 51, /*!< SPI3 global Interrupt */
DECL|SPI3|macro|SPI3
DECL|SPI4_BASE|macro|SPI4_BASE
DECL|SPI4_IRQn|enumerator|SPI4_IRQn = 84, /*!< SPI4 global Interrupt */
DECL|SPI4|macro|SPI4
DECL|SPI5_BASE|macro|SPI5_BASE
DECL|SPI5_IRQn|enumerator|SPI5_IRQn = 85, /*!< SPI5 global Interrupt */
DECL|SPI5|macro|SPI5
DECL|SPI_CR1_BIDIMODE_Msk|macro|SPI_CR1_BIDIMODE_Msk
DECL|SPI_CR1_BIDIMODE_Pos|macro|SPI_CR1_BIDIMODE_Pos
DECL|SPI_CR1_BIDIMODE|macro|SPI_CR1_BIDIMODE
DECL|SPI_CR1_BIDIOE_Msk|macro|SPI_CR1_BIDIOE_Msk
DECL|SPI_CR1_BIDIOE_Pos|macro|SPI_CR1_BIDIOE_Pos
DECL|SPI_CR1_BIDIOE|macro|SPI_CR1_BIDIOE
DECL|SPI_CR1_BR_0|macro|SPI_CR1_BR_0
DECL|SPI_CR1_BR_1|macro|SPI_CR1_BR_1
DECL|SPI_CR1_BR_2|macro|SPI_CR1_BR_2
DECL|SPI_CR1_BR_Msk|macro|SPI_CR1_BR_Msk
DECL|SPI_CR1_BR_Pos|macro|SPI_CR1_BR_Pos
DECL|SPI_CR1_BR|macro|SPI_CR1_BR
DECL|SPI_CR1_CPHA_Msk|macro|SPI_CR1_CPHA_Msk
DECL|SPI_CR1_CPHA_Pos|macro|SPI_CR1_CPHA_Pos
DECL|SPI_CR1_CPHA|macro|SPI_CR1_CPHA
DECL|SPI_CR1_CPOL_Msk|macro|SPI_CR1_CPOL_Msk
DECL|SPI_CR1_CPOL_Pos|macro|SPI_CR1_CPOL_Pos
DECL|SPI_CR1_CPOL|macro|SPI_CR1_CPOL
DECL|SPI_CR1_CRCEN_Msk|macro|SPI_CR1_CRCEN_Msk
DECL|SPI_CR1_CRCEN_Pos|macro|SPI_CR1_CRCEN_Pos
DECL|SPI_CR1_CRCEN|macro|SPI_CR1_CRCEN
DECL|SPI_CR1_CRCL_Msk|macro|SPI_CR1_CRCL_Msk
DECL|SPI_CR1_CRCL_Pos|macro|SPI_CR1_CRCL_Pos
DECL|SPI_CR1_CRCL|macro|SPI_CR1_CRCL
DECL|SPI_CR1_CRCNEXT_Msk|macro|SPI_CR1_CRCNEXT_Msk
DECL|SPI_CR1_CRCNEXT_Pos|macro|SPI_CR1_CRCNEXT_Pos
DECL|SPI_CR1_CRCNEXT|macro|SPI_CR1_CRCNEXT
DECL|SPI_CR1_LSBFIRST_Msk|macro|SPI_CR1_LSBFIRST_Msk
DECL|SPI_CR1_LSBFIRST_Pos|macro|SPI_CR1_LSBFIRST_Pos
DECL|SPI_CR1_LSBFIRST|macro|SPI_CR1_LSBFIRST
DECL|SPI_CR1_MSTR_Msk|macro|SPI_CR1_MSTR_Msk
DECL|SPI_CR1_MSTR_Pos|macro|SPI_CR1_MSTR_Pos
DECL|SPI_CR1_MSTR|macro|SPI_CR1_MSTR
DECL|SPI_CR1_RXONLY_Msk|macro|SPI_CR1_RXONLY_Msk
DECL|SPI_CR1_RXONLY_Pos|macro|SPI_CR1_RXONLY_Pos
DECL|SPI_CR1_RXONLY|macro|SPI_CR1_RXONLY
DECL|SPI_CR1_SPE_Msk|macro|SPI_CR1_SPE_Msk
DECL|SPI_CR1_SPE_Pos|macro|SPI_CR1_SPE_Pos
DECL|SPI_CR1_SPE|macro|SPI_CR1_SPE
DECL|SPI_CR1_SSI_Msk|macro|SPI_CR1_SSI_Msk
DECL|SPI_CR1_SSI_Pos|macro|SPI_CR1_SSI_Pos
DECL|SPI_CR1_SSI|macro|SPI_CR1_SSI
DECL|SPI_CR1_SSM_Msk|macro|SPI_CR1_SSM_Msk
DECL|SPI_CR1_SSM_Pos|macro|SPI_CR1_SSM_Pos
DECL|SPI_CR1_SSM|macro|SPI_CR1_SSM
DECL|SPI_CR2_DS_0|macro|SPI_CR2_DS_0
DECL|SPI_CR2_DS_1|macro|SPI_CR2_DS_1
DECL|SPI_CR2_DS_2|macro|SPI_CR2_DS_2
DECL|SPI_CR2_DS_3|macro|SPI_CR2_DS_3
DECL|SPI_CR2_DS_Msk|macro|SPI_CR2_DS_Msk
DECL|SPI_CR2_DS_Pos|macro|SPI_CR2_DS_Pos
DECL|SPI_CR2_DS|macro|SPI_CR2_DS
DECL|SPI_CR2_ERRIE_Msk|macro|SPI_CR2_ERRIE_Msk
DECL|SPI_CR2_ERRIE_Pos|macro|SPI_CR2_ERRIE_Pos
DECL|SPI_CR2_ERRIE|macro|SPI_CR2_ERRIE
DECL|SPI_CR2_FRF_Msk|macro|SPI_CR2_FRF_Msk
DECL|SPI_CR2_FRF_Pos|macro|SPI_CR2_FRF_Pos
DECL|SPI_CR2_FRF|macro|SPI_CR2_FRF
DECL|SPI_CR2_FRXTH_Msk|macro|SPI_CR2_FRXTH_Msk
DECL|SPI_CR2_FRXTH_Pos|macro|SPI_CR2_FRXTH_Pos
DECL|SPI_CR2_FRXTH|macro|SPI_CR2_FRXTH
DECL|SPI_CR2_LDMARX_Msk|macro|SPI_CR2_LDMARX_Msk
DECL|SPI_CR2_LDMARX_Pos|macro|SPI_CR2_LDMARX_Pos
DECL|SPI_CR2_LDMARX|macro|SPI_CR2_LDMARX
DECL|SPI_CR2_LDMATX_Msk|macro|SPI_CR2_LDMATX_Msk
DECL|SPI_CR2_LDMATX_Pos|macro|SPI_CR2_LDMATX_Pos
DECL|SPI_CR2_LDMATX|macro|SPI_CR2_LDMATX
DECL|SPI_CR2_NSSP_Msk|macro|SPI_CR2_NSSP_Msk
DECL|SPI_CR2_NSSP_Pos|macro|SPI_CR2_NSSP_Pos
DECL|SPI_CR2_NSSP|macro|SPI_CR2_NSSP
DECL|SPI_CR2_RXDMAEN_Msk|macro|SPI_CR2_RXDMAEN_Msk
DECL|SPI_CR2_RXDMAEN_Pos|macro|SPI_CR2_RXDMAEN_Pos
DECL|SPI_CR2_RXDMAEN|macro|SPI_CR2_RXDMAEN
DECL|SPI_CR2_RXNEIE_Msk|macro|SPI_CR2_RXNEIE_Msk
DECL|SPI_CR2_RXNEIE_Pos|macro|SPI_CR2_RXNEIE_Pos
DECL|SPI_CR2_RXNEIE|macro|SPI_CR2_RXNEIE
DECL|SPI_CR2_SSOE_Msk|macro|SPI_CR2_SSOE_Msk
DECL|SPI_CR2_SSOE_Pos|macro|SPI_CR2_SSOE_Pos
DECL|SPI_CR2_SSOE|macro|SPI_CR2_SSOE
DECL|SPI_CR2_TXDMAEN_Msk|macro|SPI_CR2_TXDMAEN_Msk
DECL|SPI_CR2_TXDMAEN_Pos|macro|SPI_CR2_TXDMAEN_Pos
DECL|SPI_CR2_TXDMAEN|macro|SPI_CR2_TXDMAEN
DECL|SPI_CR2_TXEIE_Msk|macro|SPI_CR2_TXEIE_Msk
DECL|SPI_CR2_TXEIE_Pos|macro|SPI_CR2_TXEIE_Pos
DECL|SPI_CR2_TXEIE|macro|SPI_CR2_TXEIE
DECL|SPI_CRCPR_CRCPOLY_Msk|macro|SPI_CRCPR_CRCPOLY_Msk
DECL|SPI_CRCPR_CRCPOLY_Pos|macro|SPI_CRCPR_CRCPOLY_Pos
DECL|SPI_CRCPR_CRCPOLY|macro|SPI_CRCPR_CRCPOLY
DECL|SPI_DR_DR_Msk|macro|SPI_DR_DR_Msk
DECL|SPI_DR_DR_Pos|macro|SPI_DR_DR_Pos
DECL|SPI_DR_DR|macro|SPI_DR_DR
DECL|SPI_I2SCFGR_ASTRTEN_Msk|macro|SPI_I2SCFGR_ASTRTEN_Msk
DECL|SPI_I2SCFGR_ASTRTEN_Pos|macro|SPI_I2SCFGR_ASTRTEN_Pos
DECL|SPI_I2SCFGR_ASTRTEN|macro|SPI_I2SCFGR_ASTRTEN
DECL|SPI_I2SCFGR_CHLEN_Msk|macro|SPI_I2SCFGR_CHLEN_Msk
DECL|SPI_I2SCFGR_CHLEN_Pos|macro|SPI_I2SCFGR_CHLEN_Pos
DECL|SPI_I2SCFGR_CHLEN|macro|SPI_I2SCFGR_CHLEN
DECL|SPI_I2SCFGR_CKPOL_Msk|macro|SPI_I2SCFGR_CKPOL_Msk
DECL|SPI_I2SCFGR_CKPOL_Pos|macro|SPI_I2SCFGR_CKPOL_Pos
DECL|SPI_I2SCFGR_CKPOL|macro|SPI_I2SCFGR_CKPOL
DECL|SPI_I2SCFGR_DATLEN_0|macro|SPI_I2SCFGR_DATLEN_0
DECL|SPI_I2SCFGR_DATLEN_1|macro|SPI_I2SCFGR_DATLEN_1
DECL|SPI_I2SCFGR_DATLEN_Msk|macro|SPI_I2SCFGR_DATLEN_Msk
DECL|SPI_I2SCFGR_DATLEN_Pos|macro|SPI_I2SCFGR_DATLEN_Pos
DECL|SPI_I2SCFGR_DATLEN|macro|SPI_I2SCFGR_DATLEN
DECL|SPI_I2SCFGR_I2SCFG_0|macro|SPI_I2SCFGR_I2SCFG_0
DECL|SPI_I2SCFGR_I2SCFG_1|macro|SPI_I2SCFGR_I2SCFG_1
DECL|SPI_I2SCFGR_I2SCFG_Msk|macro|SPI_I2SCFGR_I2SCFG_Msk
DECL|SPI_I2SCFGR_I2SCFG_Pos|macro|SPI_I2SCFGR_I2SCFG_Pos
DECL|SPI_I2SCFGR_I2SCFG|macro|SPI_I2SCFGR_I2SCFG
DECL|SPI_I2SCFGR_I2SE_Msk|macro|SPI_I2SCFGR_I2SE_Msk
DECL|SPI_I2SCFGR_I2SE_Pos|macro|SPI_I2SCFGR_I2SE_Pos
DECL|SPI_I2SCFGR_I2SE|macro|SPI_I2SCFGR_I2SE
DECL|SPI_I2SCFGR_I2SMOD_Msk|macro|SPI_I2SCFGR_I2SMOD_Msk
DECL|SPI_I2SCFGR_I2SMOD_Pos|macro|SPI_I2SCFGR_I2SMOD_Pos
DECL|SPI_I2SCFGR_I2SMOD|macro|SPI_I2SCFGR_I2SMOD
DECL|SPI_I2SCFGR_I2SSTD_0|macro|SPI_I2SCFGR_I2SSTD_0
DECL|SPI_I2SCFGR_I2SSTD_1|macro|SPI_I2SCFGR_I2SSTD_1
DECL|SPI_I2SCFGR_I2SSTD_Msk|macro|SPI_I2SCFGR_I2SSTD_Msk
DECL|SPI_I2SCFGR_I2SSTD_Pos|macro|SPI_I2SCFGR_I2SSTD_Pos
DECL|SPI_I2SCFGR_I2SSTD|macro|SPI_I2SCFGR_I2SSTD
DECL|SPI_I2SCFGR_PCMSYNC_Msk|macro|SPI_I2SCFGR_PCMSYNC_Msk
DECL|SPI_I2SCFGR_PCMSYNC_Pos|macro|SPI_I2SCFGR_PCMSYNC_Pos
DECL|SPI_I2SCFGR_PCMSYNC|macro|SPI_I2SCFGR_PCMSYNC
DECL|SPI_I2SPR_I2SDIV_Msk|macro|SPI_I2SPR_I2SDIV_Msk
DECL|SPI_I2SPR_I2SDIV_Pos|macro|SPI_I2SPR_I2SDIV_Pos
DECL|SPI_I2SPR_I2SDIV|macro|SPI_I2SPR_I2SDIV
DECL|SPI_I2SPR_MCKOE_Msk|macro|SPI_I2SPR_MCKOE_Msk
DECL|SPI_I2SPR_MCKOE_Pos|macro|SPI_I2SPR_MCKOE_Pos
DECL|SPI_I2SPR_MCKOE|macro|SPI_I2SPR_MCKOE
DECL|SPI_I2SPR_ODD_Msk|macro|SPI_I2SPR_ODD_Msk
DECL|SPI_I2SPR_ODD_Pos|macro|SPI_I2SPR_ODD_Pos
DECL|SPI_I2SPR_ODD|macro|SPI_I2SPR_ODD
DECL|SPI_RXCRCR_RXCRC_Msk|macro|SPI_RXCRCR_RXCRC_Msk
DECL|SPI_RXCRCR_RXCRC_Pos|macro|SPI_RXCRCR_RXCRC_Pos
DECL|SPI_RXCRCR_RXCRC|macro|SPI_RXCRCR_RXCRC
DECL|SPI_SR_BSY_Msk|macro|SPI_SR_BSY_Msk
DECL|SPI_SR_BSY_Pos|macro|SPI_SR_BSY_Pos
DECL|SPI_SR_BSY|macro|SPI_SR_BSY
DECL|SPI_SR_CHSIDE_Msk|macro|SPI_SR_CHSIDE_Msk
DECL|SPI_SR_CHSIDE_Pos|macro|SPI_SR_CHSIDE_Pos
DECL|SPI_SR_CHSIDE|macro|SPI_SR_CHSIDE
DECL|SPI_SR_CRCERR_Msk|macro|SPI_SR_CRCERR_Msk
DECL|SPI_SR_CRCERR_Pos|macro|SPI_SR_CRCERR_Pos
DECL|SPI_SR_CRCERR|macro|SPI_SR_CRCERR
DECL|SPI_SR_FRE_Msk|macro|SPI_SR_FRE_Msk
DECL|SPI_SR_FRE_Pos|macro|SPI_SR_FRE_Pos
DECL|SPI_SR_FRE|macro|SPI_SR_FRE
DECL|SPI_SR_FRLVL_0|macro|SPI_SR_FRLVL_0
DECL|SPI_SR_FRLVL_1|macro|SPI_SR_FRLVL_1
DECL|SPI_SR_FRLVL_Msk|macro|SPI_SR_FRLVL_Msk
DECL|SPI_SR_FRLVL_Pos|macro|SPI_SR_FRLVL_Pos
DECL|SPI_SR_FRLVL|macro|SPI_SR_FRLVL
DECL|SPI_SR_FTLVL_0|macro|SPI_SR_FTLVL_0
DECL|SPI_SR_FTLVL_1|macro|SPI_SR_FTLVL_1
DECL|SPI_SR_FTLVL_Msk|macro|SPI_SR_FTLVL_Msk
DECL|SPI_SR_FTLVL_Pos|macro|SPI_SR_FTLVL_Pos
DECL|SPI_SR_FTLVL|macro|SPI_SR_FTLVL
DECL|SPI_SR_MODF_Msk|macro|SPI_SR_MODF_Msk
DECL|SPI_SR_MODF_Pos|macro|SPI_SR_MODF_Pos
DECL|SPI_SR_MODF|macro|SPI_SR_MODF
DECL|SPI_SR_OVR_Msk|macro|SPI_SR_OVR_Msk
DECL|SPI_SR_OVR_Pos|macro|SPI_SR_OVR_Pos
DECL|SPI_SR_OVR|macro|SPI_SR_OVR
DECL|SPI_SR_RXNE_Msk|macro|SPI_SR_RXNE_Msk
DECL|SPI_SR_RXNE_Pos|macro|SPI_SR_RXNE_Pos
DECL|SPI_SR_RXNE|macro|SPI_SR_RXNE
DECL|SPI_SR_TXE_Msk|macro|SPI_SR_TXE_Msk
DECL|SPI_SR_TXE_Pos|macro|SPI_SR_TXE_Pos
DECL|SPI_SR_TXE|macro|SPI_SR_TXE
DECL|SPI_SR_UDR_Msk|macro|SPI_SR_UDR_Msk
DECL|SPI_SR_UDR_Pos|macro|SPI_SR_UDR_Pos
DECL|SPI_SR_UDR|macro|SPI_SR_UDR
DECL|SPI_TXCRCR_TXCRC_Msk|macro|SPI_TXCRCR_TXCRC_Msk
DECL|SPI_TXCRCR_TXCRC_Pos|macro|SPI_TXCRCR_TXCRC_Pos
DECL|SPI_TXCRCR_TXCRC|macro|SPI_TXCRCR_TXCRC
DECL|SPI_TypeDef|typedef|} SPI_TypeDef;
DECL|SQR1|member|__IO uint32_t SQR1; /*!< ADC regular sequence register 1, Address offset: 0x2C */
DECL|SQR2|member|__IO uint32_t SQR2; /*!< ADC regular sequence register 2, Address offset: 0x30 */
DECL|SQR3|member|__IO uint32_t SQR3; /*!< ADC regular sequence register 3, Address offset: 0x34 */
DECL|SRAM1_BASE|macro|SRAM1_BASE
DECL|SRAM2_BASE|macro|SRAM2_BASE
DECL|SR|member|__IO uint32_t SR; /*!< ADC status register, Address offset: 0x00 */
DECL|SR|member|__IO uint32_t SR; /*!< AES status register, Address offset: 0x04 */
DECL|SR|member|__IO uint32_t SR; /*!< DAC status register, Address offset: 0x34 */
DECL|SR|member|__IO uint32_t SR; /*!< FLASH status register, Address offset: 0x0C */
DECL|SR|member|__IO uint32_t SR; /*!< IWDG Status register, Address offset: 0x0C */
DECL|SR|member|__IO uint32_t SR; /*!< NAND Flash FIFO status and interrupt register, Address offset: 0x84 */
DECL|SR|member|__IO uint32_t SR; /*!< QUADSPI Status register, Address offset: 0x08 */
DECL|SR|member|__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
DECL|SR|member|__IO uint32_t SR; /*!< SAI block x status register, Address offset: 0x18 */
DECL|SR|member|__IO uint32_t SR; /*!< SPI status register, Address offset: 0x08 */
DECL|SR|member|__IO uint32_t SR; /*!< TIM status register, Address offset: 0x10 */
DECL|SR|member|__IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */
DECL|SSCGR|member|__IO uint32_t SSCGR; /*!< RCC spread spectrum clock generation register, Address offset: 0x80 */
DECL|SSR|member|__IO uint32_t SSR; /*!< RTC sub second register, Address offset: 0x28 */
DECL|STA|member|__I uint32_t STA; /*!< SDMMC status register, Address offset: 0x34 */
DECL|SUSP0R|member|__IO uint32_t SUSP0R; /*!< AES Suspend register 0, Address offset: 0x40 */
DECL|SUSP1R|member|__IO uint32_t SUSP1R; /*!< AES Suspend register 1, Address offset: 0x44 */
DECL|SUSP2R|member|__IO uint32_t SUSP2R; /*!< AES Suspend register 2, Address offset: 0x48 */
DECL|SUSP3R|member|__IO uint32_t SUSP3R; /*!< AES Suspend register 3, Address offset: 0x4C */
DECL|SUSP4R|member|__IO uint32_t SUSP4R; /*!< AES Suspend register 4, Address offset: 0x50 */
DECL|SUSP5R|member|__IO uint32_t SUSP5R; /*!< AES Suspend register 5, Address offset: 0x54 */
DECL|SUSP6R|member|__IO uint32_t SUSP6R; /*!< AES Suspend register 6, Address offset: 0x58 */
DECL|SUSP7R|member|__IO uint32_t SUSP7R; /*!< AES Suspend register 7, Address offset: 0x6C */
DECL|SVCall_IRQn|enumerator|SVCall_IRQn = -5, /*!< 11 Cortex-M7 SV Call Interrupt */
DECL|SWIER|member|__IO uint32_t SWIER; /*!< EXTI Software interrupt event register, Address offset: 0x10 */
DECL|SWTRIGR|member|__IO uint32_t SWTRIGR; /*!< DAC software trigger register, Address offset: 0x04 */
DECL|SYSCFG_BASE|macro|SYSCFG_BASE
DECL|SYSCFG_CMPCR_CMP_PD_Msk|macro|SYSCFG_CMPCR_CMP_PD_Msk
DECL|SYSCFG_CMPCR_CMP_PD_Pos|macro|SYSCFG_CMPCR_CMP_PD_Pos
DECL|SYSCFG_CMPCR_CMP_PD|macro|SYSCFG_CMPCR_CMP_PD
DECL|SYSCFG_CMPCR_READY_Msk|macro|SYSCFG_CMPCR_READY_Msk
DECL|SYSCFG_CMPCR_READY_Pos|macro|SYSCFG_CMPCR_READY_Pos
DECL|SYSCFG_CMPCR_READY|macro|SYSCFG_CMPCR_READY
DECL|SYSCFG_EXTICR1_EXTI0_Msk|macro|SYSCFG_EXTICR1_EXTI0_Msk
DECL|SYSCFG_EXTICR1_EXTI0_PA|macro|SYSCFG_EXTICR1_EXTI0_PA
DECL|SYSCFG_EXTICR1_EXTI0_PB|macro|SYSCFG_EXTICR1_EXTI0_PB
DECL|SYSCFG_EXTICR1_EXTI0_PC|macro|SYSCFG_EXTICR1_EXTI0_PC
DECL|SYSCFG_EXTICR1_EXTI0_PD|macro|SYSCFG_EXTICR1_EXTI0_PD
DECL|SYSCFG_EXTICR1_EXTI0_PE|macro|SYSCFG_EXTICR1_EXTI0_PE
DECL|SYSCFG_EXTICR1_EXTI0_PF|macro|SYSCFG_EXTICR1_EXTI0_PF
DECL|SYSCFG_EXTICR1_EXTI0_PG|macro|SYSCFG_EXTICR1_EXTI0_PG
DECL|SYSCFG_EXTICR1_EXTI0_PH|macro|SYSCFG_EXTICR1_EXTI0_PH
DECL|SYSCFG_EXTICR1_EXTI0_PI|macro|SYSCFG_EXTICR1_EXTI0_PI
DECL|SYSCFG_EXTICR1_EXTI0_PJ|macro|SYSCFG_EXTICR1_EXTI0_PJ
DECL|SYSCFG_EXTICR1_EXTI0_PK|macro|SYSCFG_EXTICR1_EXTI0_PK
DECL|SYSCFG_EXTICR1_EXTI0_Pos|macro|SYSCFG_EXTICR1_EXTI0_Pos
DECL|SYSCFG_EXTICR1_EXTI0|macro|SYSCFG_EXTICR1_EXTI0
DECL|SYSCFG_EXTICR1_EXTI1_Msk|macro|SYSCFG_EXTICR1_EXTI1_Msk
DECL|SYSCFG_EXTICR1_EXTI1_PA|macro|SYSCFG_EXTICR1_EXTI1_PA
DECL|SYSCFG_EXTICR1_EXTI1_PB|macro|SYSCFG_EXTICR1_EXTI1_PB
DECL|SYSCFG_EXTICR1_EXTI1_PC|macro|SYSCFG_EXTICR1_EXTI1_PC
DECL|SYSCFG_EXTICR1_EXTI1_PD|macro|SYSCFG_EXTICR1_EXTI1_PD
DECL|SYSCFG_EXTICR1_EXTI1_PE|macro|SYSCFG_EXTICR1_EXTI1_PE
DECL|SYSCFG_EXTICR1_EXTI1_PF|macro|SYSCFG_EXTICR1_EXTI1_PF
DECL|SYSCFG_EXTICR1_EXTI1_PG|macro|SYSCFG_EXTICR1_EXTI1_PG
DECL|SYSCFG_EXTICR1_EXTI1_PH|macro|SYSCFG_EXTICR1_EXTI1_PH
DECL|SYSCFG_EXTICR1_EXTI1_PI|macro|SYSCFG_EXTICR1_EXTI1_PI
DECL|SYSCFG_EXTICR1_EXTI1_PJ|macro|SYSCFG_EXTICR1_EXTI1_PJ
DECL|SYSCFG_EXTICR1_EXTI1_PK|macro|SYSCFG_EXTICR1_EXTI1_PK
DECL|SYSCFG_EXTICR1_EXTI1_Pos|macro|SYSCFG_EXTICR1_EXTI1_Pos
DECL|SYSCFG_EXTICR1_EXTI1|macro|SYSCFG_EXTICR1_EXTI1
DECL|SYSCFG_EXTICR1_EXTI2_Msk|macro|SYSCFG_EXTICR1_EXTI2_Msk
DECL|SYSCFG_EXTICR1_EXTI2_PA|macro|SYSCFG_EXTICR1_EXTI2_PA
DECL|SYSCFG_EXTICR1_EXTI2_PB|macro|SYSCFG_EXTICR1_EXTI2_PB
DECL|SYSCFG_EXTICR1_EXTI2_PC|macro|SYSCFG_EXTICR1_EXTI2_PC
DECL|SYSCFG_EXTICR1_EXTI2_PD|macro|SYSCFG_EXTICR1_EXTI2_PD
DECL|SYSCFG_EXTICR1_EXTI2_PE|macro|SYSCFG_EXTICR1_EXTI2_PE
DECL|SYSCFG_EXTICR1_EXTI2_PF|macro|SYSCFG_EXTICR1_EXTI2_PF
DECL|SYSCFG_EXTICR1_EXTI2_PG|macro|SYSCFG_EXTICR1_EXTI2_PG
DECL|SYSCFG_EXTICR1_EXTI2_PH|macro|SYSCFG_EXTICR1_EXTI2_PH
DECL|SYSCFG_EXTICR1_EXTI2_PI|macro|SYSCFG_EXTICR1_EXTI2_PI
DECL|SYSCFG_EXTICR1_EXTI2_PJ|macro|SYSCFG_EXTICR1_EXTI2_PJ
DECL|SYSCFG_EXTICR1_EXTI2_PK|macro|SYSCFG_EXTICR1_EXTI2_PK
DECL|SYSCFG_EXTICR1_EXTI2_Pos|macro|SYSCFG_EXTICR1_EXTI2_Pos
DECL|SYSCFG_EXTICR1_EXTI2|macro|SYSCFG_EXTICR1_EXTI2
DECL|SYSCFG_EXTICR1_EXTI3_Msk|macro|SYSCFG_EXTICR1_EXTI3_Msk
DECL|SYSCFG_EXTICR1_EXTI3_PA|macro|SYSCFG_EXTICR1_EXTI3_PA
DECL|SYSCFG_EXTICR1_EXTI3_PB|macro|SYSCFG_EXTICR1_EXTI3_PB
DECL|SYSCFG_EXTICR1_EXTI3_PC|macro|SYSCFG_EXTICR1_EXTI3_PC
DECL|SYSCFG_EXTICR1_EXTI3_PD|macro|SYSCFG_EXTICR1_EXTI3_PD
DECL|SYSCFG_EXTICR1_EXTI3_PE|macro|SYSCFG_EXTICR1_EXTI3_PE
DECL|SYSCFG_EXTICR1_EXTI3_PF|macro|SYSCFG_EXTICR1_EXTI3_PF
DECL|SYSCFG_EXTICR1_EXTI3_PG|macro|SYSCFG_EXTICR1_EXTI3_PG
DECL|SYSCFG_EXTICR1_EXTI3_PH|macro|SYSCFG_EXTICR1_EXTI3_PH
DECL|SYSCFG_EXTICR1_EXTI3_PI|macro|SYSCFG_EXTICR1_EXTI3_PI
DECL|SYSCFG_EXTICR1_EXTI3_PJ|macro|SYSCFG_EXTICR1_EXTI3_PJ
DECL|SYSCFG_EXTICR1_EXTI3_PK|macro|SYSCFG_EXTICR1_EXTI3_PK
DECL|SYSCFG_EXTICR1_EXTI3_Pos|macro|SYSCFG_EXTICR1_EXTI3_Pos
DECL|SYSCFG_EXTICR1_EXTI3|macro|SYSCFG_EXTICR1_EXTI3
DECL|SYSCFG_EXTICR2_EXTI4_Msk|macro|SYSCFG_EXTICR2_EXTI4_Msk
DECL|SYSCFG_EXTICR2_EXTI4_PA|macro|SYSCFG_EXTICR2_EXTI4_PA
DECL|SYSCFG_EXTICR2_EXTI4_PB|macro|SYSCFG_EXTICR2_EXTI4_PB
DECL|SYSCFG_EXTICR2_EXTI4_PC|macro|SYSCFG_EXTICR2_EXTI4_PC
DECL|SYSCFG_EXTICR2_EXTI4_PD|macro|SYSCFG_EXTICR2_EXTI4_PD
DECL|SYSCFG_EXTICR2_EXTI4_PE|macro|SYSCFG_EXTICR2_EXTI4_PE
DECL|SYSCFG_EXTICR2_EXTI4_PF|macro|SYSCFG_EXTICR2_EXTI4_PF
DECL|SYSCFG_EXTICR2_EXTI4_PG|macro|SYSCFG_EXTICR2_EXTI4_PG
DECL|SYSCFG_EXTICR2_EXTI4_PH|macro|SYSCFG_EXTICR2_EXTI4_PH
DECL|SYSCFG_EXTICR2_EXTI4_PI|macro|SYSCFG_EXTICR2_EXTI4_PI
DECL|SYSCFG_EXTICR2_EXTI4_PJ|macro|SYSCFG_EXTICR2_EXTI4_PJ
DECL|SYSCFG_EXTICR2_EXTI4_PK|macro|SYSCFG_EXTICR2_EXTI4_PK
DECL|SYSCFG_EXTICR2_EXTI4_Pos|macro|SYSCFG_EXTICR2_EXTI4_Pos
DECL|SYSCFG_EXTICR2_EXTI4|macro|SYSCFG_EXTICR2_EXTI4
DECL|SYSCFG_EXTICR2_EXTI5_Msk|macro|SYSCFG_EXTICR2_EXTI5_Msk
DECL|SYSCFG_EXTICR2_EXTI5_PA|macro|SYSCFG_EXTICR2_EXTI5_PA
DECL|SYSCFG_EXTICR2_EXTI5_PB|macro|SYSCFG_EXTICR2_EXTI5_PB
DECL|SYSCFG_EXTICR2_EXTI5_PC|macro|SYSCFG_EXTICR2_EXTI5_PC
DECL|SYSCFG_EXTICR2_EXTI5_PD|macro|SYSCFG_EXTICR2_EXTI5_PD
DECL|SYSCFG_EXTICR2_EXTI5_PE|macro|SYSCFG_EXTICR2_EXTI5_PE
DECL|SYSCFG_EXTICR2_EXTI5_PF|macro|SYSCFG_EXTICR2_EXTI5_PF
DECL|SYSCFG_EXTICR2_EXTI5_PG|macro|SYSCFG_EXTICR2_EXTI5_PG
DECL|SYSCFG_EXTICR2_EXTI5_PH|macro|SYSCFG_EXTICR2_EXTI5_PH
DECL|SYSCFG_EXTICR2_EXTI5_PI|macro|SYSCFG_EXTICR2_EXTI5_PI
DECL|SYSCFG_EXTICR2_EXTI5_PJ|macro|SYSCFG_EXTICR2_EXTI5_PJ
DECL|SYSCFG_EXTICR2_EXTI5_PK|macro|SYSCFG_EXTICR2_EXTI5_PK
DECL|SYSCFG_EXTICR2_EXTI5_Pos|macro|SYSCFG_EXTICR2_EXTI5_Pos
DECL|SYSCFG_EXTICR2_EXTI5|macro|SYSCFG_EXTICR2_EXTI5
DECL|SYSCFG_EXTICR2_EXTI6_Msk|macro|SYSCFG_EXTICR2_EXTI6_Msk
DECL|SYSCFG_EXTICR2_EXTI6_PA|macro|SYSCFG_EXTICR2_EXTI6_PA
DECL|SYSCFG_EXTICR2_EXTI6_PB|macro|SYSCFG_EXTICR2_EXTI6_PB
DECL|SYSCFG_EXTICR2_EXTI6_PC|macro|SYSCFG_EXTICR2_EXTI6_PC
DECL|SYSCFG_EXTICR2_EXTI6_PD|macro|SYSCFG_EXTICR2_EXTI6_PD
DECL|SYSCFG_EXTICR2_EXTI6_PE|macro|SYSCFG_EXTICR2_EXTI6_PE
DECL|SYSCFG_EXTICR2_EXTI6_PF|macro|SYSCFG_EXTICR2_EXTI6_PF
DECL|SYSCFG_EXTICR2_EXTI6_PG|macro|SYSCFG_EXTICR2_EXTI6_PG
DECL|SYSCFG_EXTICR2_EXTI6_PH|macro|SYSCFG_EXTICR2_EXTI6_PH
DECL|SYSCFG_EXTICR2_EXTI6_PI|macro|SYSCFG_EXTICR2_EXTI6_PI
DECL|SYSCFG_EXTICR2_EXTI6_PJ|macro|SYSCFG_EXTICR2_EXTI6_PJ
DECL|SYSCFG_EXTICR2_EXTI6_PK|macro|SYSCFG_EXTICR2_EXTI6_PK
DECL|SYSCFG_EXTICR2_EXTI6_Pos|macro|SYSCFG_EXTICR2_EXTI6_Pos
DECL|SYSCFG_EXTICR2_EXTI6|macro|SYSCFG_EXTICR2_EXTI6
DECL|SYSCFG_EXTICR2_EXTI7_Msk|macro|SYSCFG_EXTICR2_EXTI7_Msk
DECL|SYSCFG_EXTICR2_EXTI7_PA|macro|SYSCFG_EXTICR2_EXTI7_PA
DECL|SYSCFG_EXTICR2_EXTI7_PB|macro|SYSCFG_EXTICR2_EXTI7_PB
DECL|SYSCFG_EXTICR2_EXTI7_PC|macro|SYSCFG_EXTICR2_EXTI7_PC
DECL|SYSCFG_EXTICR2_EXTI7_PD|macro|SYSCFG_EXTICR2_EXTI7_PD
DECL|SYSCFG_EXTICR2_EXTI7_PE|macro|SYSCFG_EXTICR2_EXTI7_PE
DECL|SYSCFG_EXTICR2_EXTI7_PF|macro|SYSCFG_EXTICR2_EXTI7_PF
DECL|SYSCFG_EXTICR2_EXTI7_PG|macro|SYSCFG_EXTICR2_EXTI7_PG
DECL|SYSCFG_EXTICR2_EXTI7_PH|macro|SYSCFG_EXTICR2_EXTI7_PH
DECL|SYSCFG_EXTICR2_EXTI7_PI|macro|SYSCFG_EXTICR2_EXTI7_PI
DECL|SYSCFG_EXTICR2_EXTI7_PJ|macro|SYSCFG_EXTICR2_EXTI7_PJ
DECL|SYSCFG_EXTICR2_EXTI7_PK|macro|SYSCFG_EXTICR2_EXTI7_PK
DECL|SYSCFG_EXTICR2_EXTI7_Pos|macro|SYSCFG_EXTICR2_EXTI7_Pos
DECL|SYSCFG_EXTICR2_EXTI7|macro|SYSCFG_EXTICR2_EXTI7
DECL|SYSCFG_EXTICR3_EXTI10_Msk|macro|SYSCFG_EXTICR3_EXTI10_Msk
DECL|SYSCFG_EXTICR3_EXTI10_PA|macro|SYSCFG_EXTICR3_EXTI10_PA
DECL|SYSCFG_EXTICR3_EXTI10_PB|macro|SYSCFG_EXTICR3_EXTI10_PB
DECL|SYSCFG_EXTICR3_EXTI10_PC|macro|SYSCFG_EXTICR3_EXTI10_PC
DECL|SYSCFG_EXTICR3_EXTI10_PD|macro|SYSCFG_EXTICR3_EXTI10_PD
DECL|SYSCFG_EXTICR3_EXTI10_PE|macro|SYSCFG_EXTICR3_EXTI10_PE
DECL|SYSCFG_EXTICR3_EXTI10_PF|macro|SYSCFG_EXTICR3_EXTI10_PF
DECL|SYSCFG_EXTICR3_EXTI10_PG|macro|SYSCFG_EXTICR3_EXTI10_PG
DECL|SYSCFG_EXTICR3_EXTI10_PH|macro|SYSCFG_EXTICR3_EXTI10_PH
DECL|SYSCFG_EXTICR3_EXTI10_PI|macro|SYSCFG_EXTICR3_EXTI10_PI
DECL|SYSCFG_EXTICR3_EXTI10_PJ|macro|SYSCFG_EXTICR3_EXTI10_PJ
DECL|SYSCFG_EXTICR3_EXTI10_Pos|macro|SYSCFG_EXTICR3_EXTI10_Pos
DECL|SYSCFG_EXTICR3_EXTI10|macro|SYSCFG_EXTICR3_EXTI10
DECL|SYSCFG_EXTICR3_EXTI11_Msk|macro|SYSCFG_EXTICR3_EXTI11_Msk
DECL|SYSCFG_EXTICR3_EXTI11_PA|macro|SYSCFG_EXTICR3_EXTI11_PA
DECL|SYSCFG_EXTICR3_EXTI11_PB|macro|SYSCFG_EXTICR3_EXTI11_PB
DECL|SYSCFG_EXTICR3_EXTI11_PC|macro|SYSCFG_EXTICR3_EXTI11_PC
DECL|SYSCFG_EXTICR3_EXTI11_PD|macro|SYSCFG_EXTICR3_EXTI11_PD
DECL|SYSCFG_EXTICR3_EXTI11_PE|macro|SYSCFG_EXTICR3_EXTI11_PE
DECL|SYSCFG_EXTICR3_EXTI11_PF|macro|SYSCFG_EXTICR3_EXTI11_PF
DECL|SYSCFG_EXTICR3_EXTI11_PG|macro|SYSCFG_EXTICR3_EXTI11_PG
DECL|SYSCFG_EXTICR3_EXTI11_PH|macro|SYSCFG_EXTICR3_EXTI11_PH
DECL|SYSCFG_EXTICR3_EXTI11_PI|macro|SYSCFG_EXTICR3_EXTI11_PI
DECL|SYSCFG_EXTICR3_EXTI11_PJ|macro|SYSCFG_EXTICR3_EXTI11_PJ
DECL|SYSCFG_EXTICR3_EXTI11_Pos|macro|SYSCFG_EXTICR3_EXTI11_Pos
DECL|SYSCFG_EXTICR3_EXTI11|macro|SYSCFG_EXTICR3_EXTI11
DECL|SYSCFG_EXTICR3_EXTI8_Msk|macro|SYSCFG_EXTICR3_EXTI8_Msk
DECL|SYSCFG_EXTICR3_EXTI8_PA|macro|SYSCFG_EXTICR3_EXTI8_PA
DECL|SYSCFG_EXTICR3_EXTI8_PB|macro|SYSCFG_EXTICR3_EXTI8_PB
DECL|SYSCFG_EXTICR3_EXTI8_PC|macro|SYSCFG_EXTICR3_EXTI8_PC
DECL|SYSCFG_EXTICR3_EXTI8_PD|macro|SYSCFG_EXTICR3_EXTI8_PD
DECL|SYSCFG_EXTICR3_EXTI8_PE|macro|SYSCFG_EXTICR3_EXTI8_PE
DECL|SYSCFG_EXTICR3_EXTI8_PF|macro|SYSCFG_EXTICR3_EXTI8_PF
DECL|SYSCFG_EXTICR3_EXTI8_PG|macro|SYSCFG_EXTICR3_EXTI8_PG
DECL|SYSCFG_EXTICR3_EXTI8_PH|macro|SYSCFG_EXTICR3_EXTI8_PH
DECL|SYSCFG_EXTICR3_EXTI8_PI|macro|SYSCFG_EXTICR3_EXTI8_PI
DECL|SYSCFG_EXTICR3_EXTI8_PJ|macro|SYSCFG_EXTICR3_EXTI8_PJ
DECL|SYSCFG_EXTICR3_EXTI8_Pos|macro|SYSCFG_EXTICR3_EXTI8_Pos
DECL|SYSCFG_EXTICR3_EXTI8|macro|SYSCFG_EXTICR3_EXTI8
DECL|SYSCFG_EXTICR3_EXTI9_Msk|macro|SYSCFG_EXTICR3_EXTI9_Msk
DECL|SYSCFG_EXTICR3_EXTI9_PA|macro|SYSCFG_EXTICR3_EXTI9_PA
DECL|SYSCFG_EXTICR3_EXTI9_PB|macro|SYSCFG_EXTICR3_EXTI9_PB
DECL|SYSCFG_EXTICR3_EXTI9_PC|macro|SYSCFG_EXTICR3_EXTI9_PC
DECL|SYSCFG_EXTICR3_EXTI9_PD|macro|SYSCFG_EXTICR3_EXTI9_PD
DECL|SYSCFG_EXTICR3_EXTI9_PE|macro|SYSCFG_EXTICR3_EXTI9_PE
DECL|SYSCFG_EXTICR3_EXTI9_PF|macro|SYSCFG_EXTICR3_EXTI9_PF
DECL|SYSCFG_EXTICR3_EXTI9_PG|macro|SYSCFG_EXTICR3_EXTI9_PG
DECL|SYSCFG_EXTICR3_EXTI9_PH|macro|SYSCFG_EXTICR3_EXTI9_PH
DECL|SYSCFG_EXTICR3_EXTI9_PI|macro|SYSCFG_EXTICR3_EXTI9_PI
DECL|SYSCFG_EXTICR3_EXTI9_PJ|macro|SYSCFG_EXTICR3_EXTI9_PJ
DECL|SYSCFG_EXTICR3_EXTI9_Pos|macro|SYSCFG_EXTICR3_EXTI9_Pos
DECL|SYSCFG_EXTICR3_EXTI9|macro|SYSCFG_EXTICR3_EXTI9
DECL|SYSCFG_EXTICR4_EXTI12_Msk|macro|SYSCFG_EXTICR4_EXTI12_Msk
DECL|SYSCFG_EXTICR4_EXTI12_PA|macro|SYSCFG_EXTICR4_EXTI12_PA
DECL|SYSCFG_EXTICR4_EXTI12_PB|macro|SYSCFG_EXTICR4_EXTI12_PB
DECL|SYSCFG_EXTICR4_EXTI12_PC|macro|SYSCFG_EXTICR4_EXTI12_PC
DECL|SYSCFG_EXTICR4_EXTI12_PD|macro|SYSCFG_EXTICR4_EXTI12_PD
DECL|SYSCFG_EXTICR4_EXTI12_PE|macro|SYSCFG_EXTICR4_EXTI12_PE
DECL|SYSCFG_EXTICR4_EXTI12_PF|macro|SYSCFG_EXTICR4_EXTI12_PF
DECL|SYSCFG_EXTICR4_EXTI12_PG|macro|SYSCFG_EXTICR4_EXTI12_PG
DECL|SYSCFG_EXTICR4_EXTI12_PH|macro|SYSCFG_EXTICR4_EXTI12_PH
DECL|SYSCFG_EXTICR4_EXTI12_PI|macro|SYSCFG_EXTICR4_EXTI12_PI
DECL|SYSCFG_EXTICR4_EXTI12_PJ|macro|SYSCFG_EXTICR4_EXTI12_PJ
DECL|SYSCFG_EXTICR4_EXTI12_Pos|macro|SYSCFG_EXTICR4_EXTI12_Pos
DECL|SYSCFG_EXTICR4_EXTI12|macro|SYSCFG_EXTICR4_EXTI12
DECL|SYSCFG_EXTICR4_EXTI13_Msk|macro|SYSCFG_EXTICR4_EXTI13_Msk
DECL|SYSCFG_EXTICR4_EXTI13_PA|macro|SYSCFG_EXTICR4_EXTI13_PA
DECL|SYSCFG_EXTICR4_EXTI13_PB|macro|SYSCFG_EXTICR4_EXTI13_PB
DECL|SYSCFG_EXTICR4_EXTI13_PC|macro|SYSCFG_EXTICR4_EXTI13_PC
DECL|SYSCFG_EXTICR4_EXTI13_PD|macro|SYSCFG_EXTICR4_EXTI13_PD
DECL|SYSCFG_EXTICR4_EXTI13_PE|macro|SYSCFG_EXTICR4_EXTI13_PE
DECL|SYSCFG_EXTICR4_EXTI13_PF|macro|SYSCFG_EXTICR4_EXTI13_PF
DECL|SYSCFG_EXTICR4_EXTI13_PG|macro|SYSCFG_EXTICR4_EXTI13_PG
DECL|SYSCFG_EXTICR4_EXTI13_PH|macro|SYSCFG_EXTICR4_EXTI13_PH
DECL|SYSCFG_EXTICR4_EXTI13_PI|macro|SYSCFG_EXTICR4_EXTI13_PI
DECL|SYSCFG_EXTICR4_EXTI13_PJ|macro|SYSCFG_EXTICR4_EXTI13_PJ
DECL|SYSCFG_EXTICR4_EXTI13_Pos|macro|SYSCFG_EXTICR4_EXTI13_Pos
DECL|SYSCFG_EXTICR4_EXTI13|macro|SYSCFG_EXTICR4_EXTI13
DECL|SYSCFG_EXTICR4_EXTI14_Msk|macro|SYSCFG_EXTICR4_EXTI14_Msk
DECL|SYSCFG_EXTICR4_EXTI14_PA|macro|SYSCFG_EXTICR4_EXTI14_PA
DECL|SYSCFG_EXTICR4_EXTI14_PB|macro|SYSCFG_EXTICR4_EXTI14_PB
DECL|SYSCFG_EXTICR4_EXTI14_PC|macro|SYSCFG_EXTICR4_EXTI14_PC
DECL|SYSCFG_EXTICR4_EXTI14_PD|macro|SYSCFG_EXTICR4_EXTI14_PD
DECL|SYSCFG_EXTICR4_EXTI14_PE|macro|SYSCFG_EXTICR4_EXTI14_PE
DECL|SYSCFG_EXTICR4_EXTI14_PF|macro|SYSCFG_EXTICR4_EXTI14_PF
DECL|SYSCFG_EXTICR4_EXTI14_PG|macro|SYSCFG_EXTICR4_EXTI14_PG
DECL|SYSCFG_EXTICR4_EXTI14_PH|macro|SYSCFG_EXTICR4_EXTI14_PH
DECL|SYSCFG_EXTICR4_EXTI14_PI|macro|SYSCFG_EXTICR4_EXTI14_PI
DECL|SYSCFG_EXTICR4_EXTI14_PJ|macro|SYSCFG_EXTICR4_EXTI14_PJ
DECL|SYSCFG_EXTICR4_EXTI14_Pos|macro|SYSCFG_EXTICR4_EXTI14_Pos
DECL|SYSCFG_EXTICR4_EXTI14|macro|SYSCFG_EXTICR4_EXTI14
DECL|SYSCFG_EXTICR4_EXTI15_Msk|macro|SYSCFG_EXTICR4_EXTI15_Msk
DECL|SYSCFG_EXTICR4_EXTI15_PA|macro|SYSCFG_EXTICR4_EXTI15_PA
DECL|SYSCFG_EXTICR4_EXTI15_PB|macro|SYSCFG_EXTICR4_EXTI15_PB
DECL|SYSCFG_EXTICR4_EXTI15_PC|macro|SYSCFG_EXTICR4_EXTI15_PC
DECL|SYSCFG_EXTICR4_EXTI15_PD|macro|SYSCFG_EXTICR4_EXTI15_PD
DECL|SYSCFG_EXTICR4_EXTI15_PE|macro|SYSCFG_EXTICR4_EXTI15_PE
DECL|SYSCFG_EXTICR4_EXTI15_PF|macro|SYSCFG_EXTICR4_EXTI15_PF
DECL|SYSCFG_EXTICR4_EXTI15_PG|macro|SYSCFG_EXTICR4_EXTI15_PG
DECL|SYSCFG_EXTICR4_EXTI15_PH|macro|SYSCFG_EXTICR4_EXTI15_PH
DECL|SYSCFG_EXTICR4_EXTI15_PI|macro|SYSCFG_EXTICR4_EXTI15_PI
DECL|SYSCFG_EXTICR4_EXTI15_PJ|macro|SYSCFG_EXTICR4_EXTI15_PJ
DECL|SYSCFG_EXTICR4_EXTI15_Pos|macro|SYSCFG_EXTICR4_EXTI15_Pos
DECL|SYSCFG_EXTICR4_EXTI15|macro|SYSCFG_EXTICR4_EXTI15
DECL|SYSCFG_MEMRMP_MEM_BOOT_Msk|macro|SYSCFG_MEMRMP_MEM_BOOT_Msk
DECL|SYSCFG_MEMRMP_MEM_BOOT_Pos|macro|SYSCFG_MEMRMP_MEM_BOOT_Pos
DECL|SYSCFG_MEMRMP_MEM_BOOT|macro|SYSCFG_MEMRMP_MEM_BOOT
DECL|SYSCFG_MEMRMP_SWP_FMC_0|macro|SYSCFG_MEMRMP_SWP_FMC_0
DECL|SYSCFG_MEMRMP_SWP_FMC_1|macro|SYSCFG_MEMRMP_SWP_FMC_1
DECL|SYSCFG_MEMRMP_SWP_FMC_Msk|macro|SYSCFG_MEMRMP_SWP_FMC_Msk
DECL|SYSCFG_MEMRMP_SWP_FMC_Pos|macro|SYSCFG_MEMRMP_SWP_FMC_Pos
DECL|SYSCFG_MEMRMP_SWP_FMC|macro|SYSCFG_MEMRMP_SWP_FMC
DECL|SYSCFG_PMC_ADC1DC2_Msk|macro|SYSCFG_PMC_ADC1DC2_Msk
DECL|SYSCFG_PMC_ADC1DC2_Pos|macro|SYSCFG_PMC_ADC1DC2_Pos
DECL|SYSCFG_PMC_ADC1DC2|macro|SYSCFG_PMC_ADC1DC2
DECL|SYSCFG_PMC_ADC2DC2_Msk|macro|SYSCFG_PMC_ADC2DC2_Msk
DECL|SYSCFG_PMC_ADC2DC2_Pos|macro|SYSCFG_PMC_ADC2DC2_Pos
DECL|SYSCFG_PMC_ADC2DC2|macro|SYSCFG_PMC_ADC2DC2
DECL|SYSCFG_PMC_ADC3DC2_Msk|macro|SYSCFG_PMC_ADC3DC2_Msk
DECL|SYSCFG_PMC_ADC3DC2_Pos|macro|SYSCFG_PMC_ADC3DC2_Pos
DECL|SYSCFG_PMC_ADC3DC2|macro|SYSCFG_PMC_ADC3DC2
DECL|SYSCFG_PMC_ADCxDC2_Msk|macro|SYSCFG_PMC_ADCxDC2_Msk
DECL|SYSCFG_PMC_ADCxDC2_Pos|macro|SYSCFG_PMC_ADCxDC2_Pos
DECL|SYSCFG_PMC_ADCxDC2|macro|SYSCFG_PMC_ADCxDC2
DECL|SYSCFG_PMC_I2C1_FMP_Msk|macro|SYSCFG_PMC_I2C1_FMP_Msk
DECL|SYSCFG_PMC_I2C1_FMP_Pos|macro|SYSCFG_PMC_I2C1_FMP_Pos
DECL|SYSCFG_PMC_I2C1_FMP|macro|SYSCFG_PMC_I2C1_FMP
DECL|SYSCFG_PMC_I2C2_FMP_Msk|macro|SYSCFG_PMC_I2C2_FMP_Msk
DECL|SYSCFG_PMC_I2C2_FMP_Pos|macro|SYSCFG_PMC_I2C2_FMP_Pos
DECL|SYSCFG_PMC_I2C2_FMP|macro|SYSCFG_PMC_I2C2_FMP
DECL|SYSCFG_PMC_I2C3_FMP_Msk|macro|SYSCFG_PMC_I2C3_FMP_Msk
DECL|SYSCFG_PMC_I2C3_FMP_Pos|macro|SYSCFG_PMC_I2C3_FMP_Pos
DECL|SYSCFG_PMC_I2C3_FMP|macro|SYSCFG_PMC_I2C3_FMP
DECL|SYSCFG_PMC_I2C_PB6_FMP_Msk|macro|SYSCFG_PMC_I2C_PB6_FMP_Msk
DECL|SYSCFG_PMC_I2C_PB6_FMP_Pos|macro|SYSCFG_PMC_I2C_PB6_FMP_Pos
DECL|SYSCFG_PMC_I2C_PB6_FMP|macro|SYSCFG_PMC_I2C_PB6_FMP
DECL|SYSCFG_PMC_I2C_PB7_FMP_Msk|macro|SYSCFG_PMC_I2C_PB7_FMP_Msk
DECL|SYSCFG_PMC_I2C_PB7_FMP_Pos|macro|SYSCFG_PMC_I2C_PB7_FMP_Pos
DECL|SYSCFG_PMC_I2C_PB7_FMP|macro|SYSCFG_PMC_I2C_PB7_FMP
DECL|SYSCFG_PMC_I2C_PB8_FMP_Msk|macro|SYSCFG_PMC_I2C_PB8_FMP_Msk
DECL|SYSCFG_PMC_I2C_PB8_FMP_Pos|macro|SYSCFG_PMC_I2C_PB8_FMP_Pos
DECL|SYSCFG_PMC_I2C_PB8_FMP|macro|SYSCFG_PMC_I2C_PB8_FMP
DECL|SYSCFG_PMC_I2C_PB9_FMP_Msk|macro|SYSCFG_PMC_I2C_PB9_FMP_Msk
DECL|SYSCFG_PMC_I2C_PB9_FMP_Pos|macro|SYSCFG_PMC_I2C_PB9_FMP_Pos
DECL|SYSCFG_PMC_I2C_PB9_FMP|macro|SYSCFG_PMC_I2C_PB9_FMP
DECL|SYSCFG_TypeDef|typedef|} SYSCFG_TypeDef;
DECL|SYSCFG|macro|SYSCFG
DECL|SysTick_IRQn|enumerator|SysTick_IRQn = -1, /*!< 15 Cortex-M7 System Tick Interrupt */
DECL|TAMPCR|member|__IO uint32_t TAMPCR; /*!< RTC tamper configuration register, Address offset: 0x40 */
DECL|TAMP_STAMP_IRQn|enumerator|TAMP_STAMP_IRQn = 2, /*!< Tamper and TimeStamp interrupts through the EXTI line */
DECL|TDHR|member|__IO uint32_t TDHR; /*!< CAN mailbox data high register */
DECL|TDLR|member|__IO uint32_t TDLR; /*!< CAN mailbox data low register */
DECL|TDR|member|__IO uint32_t TDR; /*!< USART Transmit Data register, Address offset: 0x28 */
DECL|TDTR|member|__IO uint32_t TDTR; /*!< CAN mailbox data length control and time stamp register */
DECL|TIM10_BASE|macro|TIM10_BASE
DECL|TIM10|macro|TIM10
DECL|TIM11_BASE|macro|TIM11_BASE
DECL|TIM11_OR_TI1_RMP_0|macro|TIM11_OR_TI1_RMP_0
DECL|TIM11_OR_TI1_RMP_1|macro|TIM11_OR_TI1_RMP_1
DECL|TIM11_OR_TI1_RMP_Msk|macro|TIM11_OR_TI1_RMP_Msk
DECL|TIM11_OR_TI1_RMP_Pos|macro|TIM11_OR_TI1_RMP_Pos
DECL|TIM11_OR_TI1_RMP|macro|TIM11_OR_TI1_RMP
DECL|TIM11|macro|TIM11
DECL|TIM12_BASE|macro|TIM12_BASE
DECL|TIM12|macro|TIM12
DECL|TIM13_BASE|macro|TIM13_BASE
DECL|TIM13|macro|TIM13
DECL|TIM14_BASE|macro|TIM14_BASE
DECL|TIM14|macro|TIM14
DECL|TIM1_BASE|macro|TIM1_BASE
DECL|TIM1_BRK_TIM9_IRQn|enumerator|TIM1_BRK_TIM9_IRQn = 24, /*!< TIM1 Break interrupt and TIM9 global interrupt */
DECL|TIM1_CC_IRQn|enumerator|TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */
DECL|TIM1_TRG_COM_TIM11_IRQn|enumerator|TIM1_TRG_COM_TIM11_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */
DECL|TIM1_UP_TIM10_IRQn|enumerator|TIM1_UP_TIM10_IRQn = 25, /*!< TIM1 Update Interrupt and TIM10 global interrupt */
DECL|TIM1|macro|TIM1
DECL|TIM2_BASE|macro|TIM2_BASE
DECL|TIM2_IRQn|enumerator|TIM2_IRQn = 28, /*!< TIM2 global Interrupt */
DECL|TIM2_OR_ITR1_RMP_0|macro|TIM2_OR_ITR1_RMP_0
DECL|TIM2_OR_ITR1_RMP_1|macro|TIM2_OR_ITR1_RMP_1
DECL|TIM2_OR_ITR1_RMP_Msk|macro|TIM2_OR_ITR1_RMP_Msk
DECL|TIM2_OR_ITR1_RMP_Pos|macro|TIM2_OR_ITR1_RMP_Pos
DECL|TIM2_OR_ITR1_RMP|macro|TIM2_OR_ITR1_RMP
DECL|TIM2|macro|TIM2
DECL|TIM3_BASE|macro|TIM3_BASE
DECL|TIM3_IRQn|enumerator|TIM3_IRQn = 29, /*!< TIM3 global Interrupt */
DECL|TIM3|macro|TIM3
DECL|TIM4_BASE|macro|TIM4_BASE
DECL|TIM4_IRQn|enumerator|TIM4_IRQn = 30, /*!< TIM4 global Interrupt */
DECL|TIM4|macro|TIM4
DECL|TIM5_BASE|macro|TIM5_BASE
DECL|TIM5_IRQn|enumerator|TIM5_IRQn = 50, /*!< TIM5 global Interrupt */
DECL|TIM5_OR_TI4_RMP_0|macro|TIM5_OR_TI4_RMP_0
DECL|TIM5_OR_TI4_RMP_1|macro|TIM5_OR_TI4_RMP_1
DECL|TIM5_OR_TI4_RMP_Msk|macro|TIM5_OR_TI4_RMP_Msk
DECL|TIM5_OR_TI4_RMP_Pos|macro|TIM5_OR_TI4_RMP_Pos
DECL|TIM5_OR_TI4_RMP|macro|TIM5_OR_TI4_RMP
DECL|TIM5|macro|TIM5
DECL|TIM6_BASE|macro|TIM6_BASE
DECL|TIM6_DAC_IRQn|enumerator|TIM6_DAC_IRQn = 54, /*!< TIM6 global and DAC1&2 underrun error interrupts */
DECL|TIM6|macro|TIM6
DECL|TIM7_BASE|macro|TIM7_BASE
DECL|TIM7_IRQn|enumerator|TIM7_IRQn = 55, /*!< TIM7 global interrupt */
DECL|TIM7|macro|TIM7
DECL|TIM8_BASE|macro|TIM8_BASE
DECL|TIM8_BRK_TIM12_IRQn|enumerator|TIM8_BRK_TIM12_IRQn = 43, /*!< TIM8 Break Interrupt and TIM12 global interrupt */
DECL|TIM8_CC_IRQn|enumerator|TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */
DECL|TIM8_TRG_COM_TIM14_IRQn|enumerator|TIM8_TRG_COM_TIM14_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
DECL|TIM8_UP_TIM13_IRQn|enumerator|TIM8_UP_TIM13_IRQn = 44, /*!< TIM8 Update Interrupt and TIM13 global interrupt */
DECL|TIM8|macro|TIM8
DECL|TIM9_BASE|macro|TIM9_BASE
DECL|TIM9|macro|TIM9
DECL|TIMEOUTR|member|__IO uint32_t TIMEOUTR; /*!< I2C Timeout register, Address offset: 0x14 */
DECL|TIMINGR|member|__IO uint32_t TIMINGR; /*!< I2C Timing register, Address offset: 0x10 */
DECL|TIM_ARR_ARR_Msk|macro|TIM_ARR_ARR_Msk
DECL|TIM_ARR_ARR_Pos|macro|TIM_ARR_ARR_Pos
DECL|TIM_ARR_ARR|macro|TIM_ARR_ARR
DECL|TIM_BDTR_AOE_Msk|macro|TIM_BDTR_AOE_Msk
DECL|TIM_BDTR_AOE_Pos|macro|TIM_BDTR_AOE_Pos
DECL|TIM_BDTR_AOE|macro|TIM_BDTR_AOE
DECL|TIM_BDTR_BK2E_Msk|macro|TIM_BDTR_BK2E_Msk
DECL|TIM_BDTR_BK2E_Pos|macro|TIM_BDTR_BK2E_Pos
DECL|TIM_BDTR_BK2E|macro|TIM_BDTR_BK2E
DECL|TIM_BDTR_BK2F_Msk|macro|TIM_BDTR_BK2F_Msk
DECL|TIM_BDTR_BK2F_Pos|macro|TIM_BDTR_BK2F_Pos
DECL|TIM_BDTR_BK2F|macro|TIM_BDTR_BK2F
DECL|TIM_BDTR_BK2P_Msk|macro|TIM_BDTR_BK2P_Msk
DECL|TIM_BDTR_BK2P_Pos|macro|TIM_BDTR_BK2P_Pos
DECL|TIM_BDTR_BK2P|macro|TIM_BDTR_BK2P
DECL|TIM_BDTR_BKE_Msk|macro|TIM_BDTR_BKE_Msk
DECL|TIM_BDTR_BKE_Pos|macro|TIM_BDTR_BKE_Pos
DECL|TIM_BDTR_BKE|macro|TIM_BDTR_BKE
DECL|TIM_BDTR_BKF_Msk|macro|TIM_BDTR_BKF_Msk
DECL|TIM_BDTR_BKF_Pos|macro|TIM_BDTR_BKF_Pos
DECL|TIM_BDTR_BKF|macro|TIM_BDTR_BKF
DECL|TIM_BDTR_BKP_Msk|macro|TIM_BDTR_BKP_Msk
DECL|TIM_BDTR_BKP_Pos|macro|TIM_BDTR_BKP_Pos
DECL|TIM_BDTR_BKP|macro|TIM_BDTR_BKP
DECL|TIM_BDTR_DTG_0|macro|TIM_BDTR_DTG_0
DECL|TIM_BDTR_DTG_1|macro|TIM_BDTR_DTG_1
DECL|TIM_BDTR_DTG_2|macro|TIM_BDTR_DTG_2
DECL|TIM_BDTR_DTG_3|macro|TIM_BDTR_DTG_3
DECL|TIM_BDTR_DTG_4|macro|TIM_BDTR_DTG_4
DECL|TIM_BDTR_DTG_5|macro|TIM_BDTR_DTG_5
DECL|TIM_BDTR_DTG_6|macro|TIM_BDTR_DTG_6
DECL|TIM_BDTR_DTG_7|macro|TIM_BDTR_DTG_7
DECL|TIM_BDTR_DTG_Msk|macro|TIM_BDTR_DTG_Msk
DECL|TIM_BDTR_DTG_Pos|macro|TIM_BDTR_DTG_Pos
DECL|TIM_BDTR_DTG|macro|TIM_BDTR_DTG
DECL|TIM_BDTR_LOCK_0|macro|TIM_BDTR_LOCK_0
DECL|TIM_BDTR_LOCK_1|macro|TIM_BDTR_LOCK_1
DECL|TIM_BDTR_LOCK_Msk|macro|TIM_BDTR_LOCK_Msk
DECL|TIM_BDTR_LOCK_Pos|macro|TIM_BDTR_LOCK_Pos
DECL|TIM_BDTR_LOCK|macro|TIM_BDTR_LOCK
DECL|TIM_BDTR_MOE_Msk|macro|TIM_BDTR_MOE_Msk
DECL|TIM_BDTR_MOE_Pos|macro|TIM_BDTR_MOE_Pos
DECL|TIM_BDTR_MOE|macro|TIM_BDTR_MOE
DECL|TIM_BDTR_OSSI_Msk|macro|TIM_BDTR_OSSI_Msk
DECL|TIM_BDTR_OSSI_Pos|macro|TIM_BDTR_OSSI_Pos
DECL|TIM_BDTR_OSSI|macro|TIM_BDTR_OSSI
DECL|TIM_BDTR_OSSR_Msk|macro|TIM_BDTR_OSSR_Msk
DECL|TIM_BDTR_OSSR_Pos|macro|TIM_BDTR_OSSR_Pos
DECL|TIM_BDTR_OSSR|macro|TIM_BDTR_OSSR
DECL|TIM_CCER_CC1E_Msk|macro|TIM_CCER_CC1E_Msk
DECL|TIM_CCER_CC1E_Pos|macro|TIM_CCER_CC1E_Pos
DECL|TIM_CCER_CC1E|macro|TIM_CCER_CC1E
DECL|TIM_CCER_CC1NE_Msk|macro|TIM_CCER_CC1NE_Msk
DECL|TIM_CCER_CC1NE_Pos|macro|TIM_CCER_CC1NE_Pos
DECL|TIM_CCER_CC1NE|macro|TIM_CCER_CC1NE
DECL|TIM_CCER_CC1NP_Msk|macro|TIM_CCER_CC1NP_Msk
DECL|TIM_CCER_CC1NP_Pos|macro|TIM_CCER_CC1NP_Pos
DECL|TIM_CCER_CC1NP|macro|TIM_CCER_CC1NP
DECL|TIM_CCER_CC1P_Msk|macro|TIM_CCER_CC1P_Msk
DECL|TIM_CCER_CC1P_Pos|macro|TIM_CCER_CC1P_Pos
DECL|TIM_CCER_CC1P|macro|TIM_CCER_CC1P
DECL|TIM_CCER_CC2E_Msk|macro|TIM_CCER_CC2E_Msk
DECL|TIM_CCER_CC2E_Pos|macro|TIM_CCER_CC2E_Pos
DECL|TIM_CCER_CC2E|macro|TIM_CCER_CC2E
DECL|TIM_CCER_CC2NE_Msk|macro|TIM_CCER_CC2NE_Msk
DECL|TIM_CCER_CC2NE_Pos|macro|TIM_CCER_CC2NE_Pos
DECL|TIM_CCER_CC2NE|macro|TIM_CCER_CC2NE
DECL|TIM_CCER_CC2NP_Msk|macro|TIM_CCER_CC2NP_Msk
DECL|TIM_CCER_CC2NP_Pos|macro|TIM_CCER_CC2NP_Pos
DECL|TIM_CCER_CC2NP|macro|TIM_CCER_CC2NP
DECL|TIM_CCER_CC2P_Msk|macro|TIM_CCER_CC2P_Msk
DECL|TIM_CCER_CC2P_Pos|macro|TIM_CCER_CC2P_Pos
DECL|TIM_CCER_CC2P|macro|TIM_CCER_CC2P
DECL|TIM_CCER_CC3E_Msk|macro|TIM_CCER_CC3E_Msk
DECL|TIM_CCER_CC3E_Pos|macro|TIM_CCER_CC3E_Pos
DECL|TIM_CCER_CC3E|macro|TIM_CCER_CC3E
DECL|TIM_CCER_CC3NE_Msk|macro|TIM_CCER_CC3NE_Msk
DECL|TIM_CCER_CC3NE_Pos|macro|TIM_CCER_CC3NE_Pos
DECL|TIM_CCER_CC3NE|macro|TIM_CCER_CC3NE
DECL|TIM_CCER_CC3NP_Msk|macro|TIM_CCER_CC3NP_Msk
DECL|TIM_CCER_CC3NP_Pos|macro|TIM_CCER_CC3NP_Pos
DECL|TIM_CCER_CC3NP|macro|TIM_CCER_CC3NP
DECL|TIM_CCER_CC3P_Msk|macro|TIM_CCER_CC3P_Msk
DECL|TIM_CCER_CC3P_Pos|macro|TIM_CCER_CC3P_Pos
DECL|TIM_CCER_CC3P|macro|TIM_CCER_CC3P
DECL|TIM_CCER_CC4E_Msk|macro|TIM_CCER_CC4E_Msk
DECL|TIM_CCER_CC4E_Pos|macro|TIM_CCER_CC4E_Pos
DECL|TIM_CCER_CC4E|macro|TIM_CCER_CC4E
DECL|TIM_CCER_CC4NP_Msk|macro|TIM_CCER_CC4NP_Msk
DECL|TIM_CCER_CC4NP_Pos|macro|TIM_CCER_CC4NP_Pos
DECL|TIM_CCER_CC4NP|macro|TIM_CCER_CC4NP
DECL|TIM_CCER_CC4P_Msk|macro|TIM_CCER_CC4P_Msk
DECL|TIM_CCER_CC4P_Pos|macro|TIM_CCER_CC4P_Pos
DECL|TIM_CCER_CC4P|macro|TIM_CCER_CC4P
DECL|TIM_CCER_CC5E_Msk|macro|TIM_CCER_CC5E_Msk
DECL|TIM_CCER_CC5E_Pos|macro|TIM_CCER_CC5E_Pos
DECL|TIM_CCER_CC5E|macro|TIM_CCER_CC5E
DECL|TIM_CCER_CC5P_Msk|macro|TIM_CCER_CC5P_Msk
DECL|TIM_CCER_CC5P_Pos|macro|TIM_CCER_CC5P_Pos
DECL|TIM_CCER_CC5P|macro|TIM_CCER_CC5P
DECL|TIM_CCER_CC6E_Msk|macro|TIM_CCER_CC6E_Msk
DECL|TIM_CCER_CC6E_Pos|macro|TIM_CCER_CC6E_Pos
DECL|TIM_CCER_CC6E|macro|TIM_CCER_CC6E
DECL|TIM_CCER_CC6P_Msk|macro|TIM_CCER_CC6P_Msk
DECL|TIM_CCER_CC6P_Pos|macro|TIM_CCER_CC6P_Pos
DECL|TIM_CCER_CC6P|macro|TIM_CCER_CC6P
DECL|TIM_CCMR1_CC1S_0|macro|TIM_CCMR1_CC1S_0
DECL|TIM_CCMR1_CC1S_1|macro|TIM_CCMR1_CC1S_1
DECL|TIM_CCMR1_CC1S_Msk|macro|TIM_CCMR1_CC1S_Msk
DECL|TIM_CCMR1_CC1S_Pos|macro|TIM_CCMR1_CC1S_Pos
DECL|TIM_CCMR1_CC1S|macro|TIM_CCMR1_CC1S
DECL|TIM_CCMR1_CC2S_0|macro|TIM_CCMR1_CC2S_0
DECL|TIM_CCMR1_CC2S_1|macro|TIM_CCMR1_CC2S_1
DECL|TIM_CCMR1_CC2S_Msk|macro|TIM_CCMR1_CC2S_Msk
DECL|TIM_CCMR1_CC2S_Pos|macro|TIM_CCMR1_CC2S_Pos
DECL|TIM_CCMR1_CC2S|macro|TIM_CCMR1_CC2S
DECL|TIM_CCMR1_IC1F_0|macro|TIM_CCMR1_IC1F_0
DECL|TIM_CCMR1_IC1F_1|macro|TIM_CCMR1_IC1F_1
DECL|TIM_CCMR1_IC1F_2|macro|TIM_CCMR1_IC1F_2
DECL|TIM_CCMR1_IC1F_3|macro|TIM_CCMR1_IC1F_3
DECL|TIM_CCMR1_IC1F_Msk|macro|TIM_CCMR1_IC1F_Msk
DECL|TIM_CCMR1_IC1F_Pos|macro|TIM_CCMR1_IC1F_Pos
DECL|TIM_CCMR1_IC1F|macro|TIM_CCMR1_IC1F
DECL|TIM_CCMR1_IC1PSC_0|macro|TIM_CCMR1_IC1PSC_0
DECL|TIM_CCMR1_IC1PSC_1|macro|TIM_CCMR1_IC1PSC_1
DECL|TIM_CCMR1_IC1PSC_Msk|macro|TIM_CCMR1_IC1PSC_Msk
DECL|TIM_CCMR1_IC1PSC_Pos|macro|TIM_CCMR1_IC1PSC_Pos
DECL|TIM_CCMR1_IC1PSC|macro|TIM_CCMR1_IC1PSC
DECL|TIM_CCMR1_IC2F_0|macro|TIM_CCMR1_IC2F_0
DECL|TIM_CCMR1_IC2F_1|macro|TIM_CCMR1_IC2F_1
DECL|TIM_CCMR1_IC2F_2|macro|TIM_CCMR1_IC2F_2
DECL|TIM_CCMR1_IC2F_3|macro|TIM_CCMR1_IC2F_3
DECL|TIM_CCMR1_IC2F_Msk|macro|TIM_CCMR1_IC2F_Msk
DECL|TIM_CCMR1_IC2F_Pos|macro|TIM_CCMR1_IC2F_Pos
DECL|TIM_CCMR1_IC2F|macro|TIM_CCMR1_IC2F
DECL|TIM_CCMR1_IC2PSC_0|macro|TIM_CCMR1_IC2PSC_0
DECL|TIM_CCMR1_IC2PSC_1|macro|TIM_CCMR1_IC2PSC_1
DECL|TIM_CCMR1_IC2PSC_Msk|macro|TIM_CCMR1_IC2PSC_Msk
DECL|TIM_CCMR1_IC2PSC_Pos|macro|TIM_CCMR1_IC2PSC_Pos
DECL|TIM_CCMR1_IC2PSC|macro|TIM_CCMR1_IC2PSC
DECL|TIM_CCMR1_OC1CE_Msk|macro|TIM_CCMR1_OC1CE_Msk
DECL|TIM_CCMR1_OC1CE_Pos|macro|TIM_CCMR1_OC1CE_Pos
DECL|TIM_CCMR1_OC1CE|macro|TIM_CCMR1_OC1CE
DECL|TIM_CCMR1_OC1FE_Msk|macro|TIM_CCMR1_OC1FE_Msk
DECL|TIM_CCMR1_OC1FE_Pos|macro|TIM_CCMR1_OC1FE_Pos
DECL|TIM_CCMR1_OC1FE|macro|TIM_CCMR1_OC1FE
DECL|TIM_CCMR1_OC1M_0|macro|TIM_CCMR1_OC1M_0
DECL|TIM_CCMR1_OC1M_1|macro|TIM_CCMR1_OC1M_1
DECL|TIM_CCMR1_OC1M_2|macro|TIM_CCMR1_OC1M_2
DECL|TIM_CCMR1_OC1M_3|macro|TIM_CCMR1_OC1M_3
DECL|TIM_CCMR1_OC1M_Msk|macro|TIM_CCMR1_OC1M_Msk
DECL|TIM_CCMR1_OC1M_Pos|macro|TIM_CCMR1_OC1M_Pos
DECL|TIM_CCMR1_OC1M|macro|TIM_CCMR1_OC1M
DECL|TIM_CCMR1_OC1PE_Msk|macro|TIM_CCMR1_OC1PE_Msk
DECL|TIM_CCMR1_OC1PE_Pos|macro|TIM_CCMR1_OC1PE_Pos
DECL|TIM_CCMR1_OC1PE|macro|TIM_CCMR1_OC1PE
DECL|TIM_CCMR1_OC2CE_Msk|macro|TIM_CCMR1_OC2CE_Msk
DECL|TIM_CCMR1_OC2CE_Pos|macro|TIM_CCMR1_OC2CE_Pos
DECL|TIM_CCMR1_OC2CE|macro|TIM_CCMR1_OC2CE
DECL|TIM_CCMR1_OC2FE_Msk|macro|TIM_CCMR1_OC2FE_Msk
DECL|TIM_CCMR1_OC2FE_Pos|macro|TIM_CCMR1_OC2FE_Pos
DECL|TIM_CCMR1_OC2FE|macro|TIM_CCMR1_OC2FE
DECL|TIM_CCMR1_OC2M_0|macro|TIM_CCMR1_OC2M_0
DECL|TIM_CCMR1_OC2M_1|macro|TIM_CCMR1_OC2M_1
DECL|TIM_CCMR1_OC2M_2|macro|TIM_CCMR1_OC2M_2
DECL|TIM_CCMR1_OC2M_3|macro|TIM_CCMR1_OC2M_3
DECL|TIM_CCMR1_OC2M_Msk|macro|TIM_CCMR1_OC2M_Msk
DECL|TIM_CCMR1_OC2M_Pos|macro|TIM_CCMR1_OC2M_Pos
DECL|TIM_CCMR1_OC2M|macro|TIM_CCMR1_OC2M
DECL|TIM_CCMR1_OC2PE_Msk|macro|TIM_CCMR1_OC2PE_Msk
DECL|TIM_CCMR1_OC2PE_Pos|macro|TIM_CCMR1_OC2PE_Pos
DECL|TIM_CCMR1_OC2PE|macro|TIM_CCMR1_OC2PE
DECL|TIM_CCMR2_CC3S_0|macro|TIM_CCMR2_CC3S_0
DECL|TIM_CCMR2_CC3S_1|macro|TIM_CCMR2_CC3S_1
DECL|TIM_CCMR2_CC3S_Msk|macro|TIM_CCMR2_CC3S_Msk
DECL|TIM_CCMR2_CC3S_Pos|macro|TIM_CCMR2_CC3S_Pos
DECL|TIM_CCMR2_CC3S|macro|TIM_CCMR2_CC3S
DECL|TIM_CCMR2_CC4S_0|macro|TIM_CCMR2_CC4S_0
DECL|TIM_CCMR2_CC4S_1|macro|TIM_CCMR2_CC4S_1
DECL|TIM_CCMR2_CC4S_Msk|macro|TIM_CCMR2_CC4S_Msk
DECL|TIM_CCMR2_CC4S_Pos|macro|TIM_CCMR2_CC4S_Pos
DECL|TIM_CCMR2_CC4S|macro|TIM_CCMR2_CC4S
DECL|TIM_CCMR2_IC3F_0|macro|TIM_CCMR2_IC3F_0
DECL|TIM_CCMR2_IC3F_1|macro|TIM_CCMR2_IC3F_1
DECL|TIM_CCMR2_IC3F_2|macro|TIM_CCMR2_IC3F_2
DECL|TIM_CCMR2_IC3F_3|macro|TIM_CCMR2_IC3F_3
DECL|TIM_CCMR2_IC3F_Msk|macro|TIM_CCMR2_IC3F_Msk
DECL|TIM_CCMR2_IC3F_Pos|macro|TIM_CCMR2_IC3F_Pos
DECL|TIM_CCMR2_IC3F|macro|TIM_CCMR2_IC3F
DECL|TIM_CCMR2_IC3PSC_0|macro|TIM_CCMR2_IC3PSC_0
DECL|TIM_CCMR2_IC3PSC_1|macro|TIM_CCMR2_IC3PSC_1
DECL|TIM_CCMR2_IC3PSC_Msk|macro|TIM_CCMR2_IC3PSC_Msk
DECL|TIM_CCMR2_IC3PSC_Pos|macro|TIM_CCMR2_IC3PSC_Pos
DECL|TIM_CCMR2_IC3PSC|macro|TIM_CCMR2_IC3PSC
DECL|TIM_CCMR2_IC4F_0|macro|TIM_CCMR2_IC4F_0
DECL|TIM_CCMR2_IC4F_1|macro|TIM_CCMR2_IC4F_1
DECL|TIM_CCMR2_IC4F_2|macro|TIM_CCMR2_IC4F_2
DECL|TIM_CCMR2_IC4F_3|macro|TIM_CCMR2_IC4F_3
DECL|TIM_CCMR2_IC4F_Msk|macro|TIM_CCMR2_IC4F_Msk
DECL|TIM_CCMR2_IC4F_Pos|macro|TIM_CCMR2_IC4F_Pos
DECL|TIM_CCMR2_IC4F|macro|TIM_CCMR2_IC4F
DECL|TIM_CCMR2_IC4PSC_0|macro|TIM_CCMR2_IC4PSC_0
DECL|TIM_CCMR2_IC4PSC_1|macro|TIM_CCMR2_IC4PSC_1
DECL|TIM_CCMR2_IC4PSC_Msk|macro|TIM_CCMR2_IC4PSC_Msk
DECL|TIM_CCMR2_IC4PSC_Pos|macro|TIM_CCMR2_IC4PSC_Pos
DECL|TIM_CCMR2_IC4PSC|macro|TIM_CCMR2_IC4PSC
DECL|TIM_CCMR2_OC3CE_Msk|macro|TIM_CCMR2_OC3CE_Msk
DECL|TIM_CCMR2_OC3CE_Pos|macro|TIM_CCMR2_OC3CE_Pos
DECL|TIM_CCMR2_OC3CE|macro|TIM_CCMR2_OC3CE
DECL|TIM_CCMR2_OC3FE_Msk|macro|TIM_CCMR2_OC3FE_Msk
DECL|TIM_CCMR2_OC3FE_Pos|macro|TIM_CCMR2_OC3FE_Pos
DECL|TIM_CCMR2_OC3FE|macro|TIM_CCMR2_OC3FE
DECL|TIM_CCMR2_OC3M_0|macro|TIM_CCMR2_OC3M_0
DECL|TIM_CCMR2_OC3M_1|macro|TIM_CCMR2_OC3M_1
DECL|TIM_CCMR2_OC3M_2|macro|TIM_CCMR2_OC3M_2
DECL|TIM_CCMR2_OC3M_3|macro|TIM_CCMR2_OC3M_3
DECL|TIM_CCMR2_OC3M_Msk|macro|TIM_CCMR2_OC3M_Msk
DECL|TIM_CCMR2_OC3M_Pos|macro|TIM_CCMR2_OC3M_Pos
DECL|TIM_CCMR2_OC3M|macro|TIM_CCMR2_OC3M
DECL|TIM_CCMR2_OC3PE_Msk|macro|TIM_CCMR2_OC3PE_Msk
DECL|TIM_CCMR2_OC3PE_Pos|macro|TIM_CCMR2_OC3PE_Pos
DECL|TIM_CCMR2_OC3PE|macro|TIM_CCMR2_OC3PE
DECL|TIM_CCMR2_OC4CE_Msk|macro|TIM_CCMR2_OC4CE_Msk
DECL|TIM_CCMR2_OC4CE_Pos|macro|TIM_CCMR2_OC4CE_Pos
DECL|TIM_CCMR2_OC4CE|macro|TIM_CCMR2_OC4CE
DECL|TIM_CCMR2_OC4FE_Msk|macro|TIM_CCMR2_OC4FE_Msk
DECL|TIM_CCMR2_OC4FE_Pos|macro|TIM_CCMR2_OC4FE_Pos
DECL|TIM_CCMR2_OC4FE|macro|TIM_CCMR2_OC4FE
DECL|TIM_CCMR2_OC4M_0|macro|TIM_CCMR2_OC4M_0
DECL|TIM_CCMR2_OC4M_1|macro|TIM_CCMR2_OC4M_1
DECL|TIM_CCMR2_OC4M_2|macro|TIM_CCMR2_OC4M_2
DECL|TIM_CCMR2_OC4M_3|macro|TIM_CCMR2_OC4M_3
DECL|TIM_CCMR2_OC4M_Msk|macro|TIM_CCMR2_OC4M_Msk
DECL|TIM_CCMR2_OC4M_Pos|macro|TIM_CCMR2_OC4M_Pos
DECL|TIM_CCMR2_OC4M|macro|TIM_CCMR2_OC4M
DECL|TIM_CCMR2_OC4PE_Msk|macro|TIM_CCMR2_OC4PE_Msk
DECL|TIM_CCMR2_OC4PE_Pos|macro|TIM_CCMR2_OC4PE_Pos
DECL|TIM_CCMR2_OC4PE|macro|TIM_CCMR2_OC4PE
DECL|TIM_CCMR3_OC5CE_Msk|macro|TIM_CCMR3_OC5CE_Msk
DECL|TIM_CCMR3_OC5CE_Pos|macro|TIM_CCMR3_OC5CE_Pos
DECL|TIM_CCMR3_OC5CE|macro|TIM_CCMR3_OC5CE
DECL|TIM_CCMR3_OC5FE_Msk|macro|TIM_CCMR3_OC5FE_Msk
DECL|TIM_CCMR3_OC5FE_Pos|macro|TIM_CCMR3_OC5FE_Pos
DECL|TIM_CCMR3_OC5FE|macro|TIM_CCMR3_OC5FE
DECL|TIM_CCMR3_OC5M_0|macro|TIM_CCMR3_OC5M_0
DECL|TIM_CCMR3_OC5M_1|macro|TIM_CCMR3_OC5M_1
DECL|TIM_CCMR3_OC5M_2|macro|TIM_CCMR3_OC5M_2
DECL|TIM_CCMR3_OC5M_3|macro|TIM_CCMR3_OC5M_3
DECL|TIM_CCMR3_OC5M_Msk|macro|TIM_CCMR3_OC5M_Msk
DECL|TIM_CCMR3_OC5M_Pos|macro|TIM_CCMR3_OC5M_Pos
DECL|TIM_CCMR3_OC5M|macro|TIM_CCMR3_OC5M
DECL|TIM_CCMR3_OC5PE_Msk|macro|TIM_CCMR3_OC5PE_Msk
DECL|TIM_CCMR3_OC5PE_Pos|macro|TIM_CCMR3_OC5PE_Pos
DECL|TIM_CCMR3_OC5PE|macro|TIM_CCMR3_OC5PE
DECL|TIM_CCMR3_OC6CE_Msk|macro|TIM_CCMR3_OC6CE_Msk
DECL|TIM_CCMR3_OC6CE_Pos|macro|TIM_CCMR3_OC6CE_Pos
DECL|TIM_CCMR3_OC6CE|macro|TIM_CCMR3_OC6CE
DECL|TIM_CCMR3_OC6FE_Msk|macro|TIM_CCMR3_OC6FE_Msk
DECL|TIM_CCMR3_OC6FE_Pos|macro|TIM_CCMR3_OC6FE_Pos
DECL|TIM_CCMR3_OC6FE|macro|TIM_CCMR3_OC6FE
DECL|TIM_CCMR3_OC6M_0|macro|TIM_CCMR3_OC6M_0
DECL|TIM_CCMR3_OC6M_1|macro|TIM_CCMR3_OC6M_1
DECL|TIM_CCMR3_OC6M_2|macro|TIM_CCMR3_OC6M_2
DECL|TIM_CCMR3_OC6M_3|macro|TIM_CCMR3_OC6M_3
DECL|TIM_CCMR3_OC6M_Msk|macro|TIM_CCMR3_OC6M_Msk
DECL|TIM_CCMR3_OC6M_Pos|macro|TIM_CCMR3_OC6M_Pos
DECL|TIM_CCMR3_OC6M|macro|TIM_CCMR3_OC6M
DECL|TIM_CCMR3_OC6PE_Msk|macro|TIM_CCMR3_OC6PE_Msk
DECL|TIM_CCMR3_OC6PE_Pos|macro|TIM_CCMR3_OC6PE_Pos
DECL|TIM_CCMR3_OC6PE|macro|TIM_CCMR3_OC6PE
DECL|TIM_CCR1_CCR1_Msk|macro|TIM_CCR1_CCR1_Msk
DECL|TIM_CCR1_CCR1_Pos|macro|TIM_CCR1_CCR1_Pos
DECL|TIM_CCR1_CCR1|macro|TIM_CCR1_CCR1
DECL|TIM_CCR2_CCR2_Msk|macro|TIM_CCR2_CCR2_Msk
DECL|TIM_CCR2_CCR2_Pos|macro|TIM_CCR2_CCR2_Pos
DECL|TIM_CCR2_CCR2|macro|TIM_CCR2_CCR2
DECL|TIM_CCR3_CCR3_Msk|macro|TIM_CCR3_CCR3_Msk
DECL|TIM_CCR3_CCR3_Pos|macro|TIM_CCR3_CCR3_Pos
DECL|TIM_CCR3_CCR3|macro|TIM_CCR3_CCR3
DECL|TIM_CCR4_CCR4_Msk|macro|TIM_CCR4_CCR4_Msk
DECL|TIM_CCR4_CCR4_Pos|macro|TIM_CCR4_CCR4_Pos
DECL|TIM_CCR4_CCR4|macro|TIM_CCR4_CCR4
DECL|TIM_CCR5_CCR5_Msk|macro|TIM_CCR5_CCR5_Msk
DECL|TIM_CCR5_CCR5_Pos|macro|TIM_CCR5_CCR5_Pos
DECL|TIM_CCR5_CCR5|macro|TIM_CCR5_CCR5
DECL|TIM_CCR5_GC5C1_Msk|macro|TIM_CCR5_GC5C1_Msk
DECL|TIM_CCR5_GC5C1_Pos|macro|TIM_CCR5_GC5C1_Pos
DECL|TIM_CCR5_GC5C1|macro|TIM_CCR5_GC5C1
DECL|TIM_CCR5_GC5C2_Msk|macro|TIM_CCR5_GC5C2_Msk
DECL|TIM_CCR5_GC5C2_Pos|macro|TIM_CCR5_GC5C2_Pos
DECL|TIM_CCR5_GC5C2|macro|TIM_CCR5_GC5C2
DECL|TIM_CCR5_GC5C3_Msk|macro|TIM_CCR5_GC5C3_Msk
DECL|TIM_CCR5_GC5C3_Pos|macro|TIM_CCR5_GC5C3_Pos
DECL|TIM_CCR5_GC5C3|macro|TIM_CCR5_GC5C3
DECL|TIM_CCR6_CCR6|macro|TIM_CCR6_CCR6
DECL|TIM_CNT_CNT_Msk|macro|TIM_CNT_CNT_Msk
DECL|TIM_CNT_CNT_Pos|macro|TIM_CNT_CNT_Pos
DECL|TIM_CNT_CNT|macro|TIM_CNT_CNT
DECL|TIM_CNT_UIFCPY_Msk|macro|TIM_CNT_UIFCPY_Msk
DECL|TIM_CNT_UIFCPY_Pos|macro|TIM_CNT_UIFCPY_Pos
DECL|TIM_CNT_UIFCPY|macro|TIM_CNT_UIFCPY
DECL|TIM_CR1_ARPE_Msk|macro|TIM_CR1_ARPE_Msk
DECL|TIM_CR1_ARPE_Pos|macro|TIM_CR1_ARPE_Pos
DECL|TIM_CR1_ARPE|macro|TIM_CR1_ARPE
DECL|TIM_CR1_CEN_Msk|macro|TIM_CR1_CEN_Msk
DECL|TIM_CR1_CEN_Pos|macro|TIM_CR1_CEN_Pos
DECL|TIM_CR1_CEN|macro|TIM_CR1_CEN
DECL|TIM_CR1_CKD_0|macro|TIM_CR1_CKD_0
DECL|TIM_CR1_CKD_1|macro|TIM_CR1_CKD_1
DECL|TIM_CR1_CKD_Msk|macro|TIM_CR1_CKD_Msk
DECL|TIM_CR1_CKD_Pos|macro|TIM_CR1_CKD_Pos
DECL|TIM_CR1_CKD|macro|TIM_CR1_CKD
DECL|TIM_CR1_CMS_0|macro|TIM_CR1_CMS_0
DECL|TIM_CR1_CMS_1|macro|TIM_CR1_CMS_1
DECL|TIM_CR1_CMS_Msk|macro|TIM_CR1_CMS_Msk
DECL|TIM_CR1_CMS_Pos|macro|TIM_CR1_CMS_Pos
DECL|TIM_CR1_CMS|macro|TIM_CR1_CMS
DECL|TIM_CR1_DIR_Msk|macro|TIM_CR1_DIR_Msk
DECL|TIM_CR1_DIR_Pos|macro|TIM_CR1_DIR_Pos
DECL|TIM_CR1_DIR|macro|TIM_CR1_DIR
DECL|TIM_CR1_OPM_Msk|macro|TIM_CR1_OPM_Msk
DECL|TIM_CR1_OPM_Pos|macro|TIM_CR1_OPM_Pos
DECL|TIM_CR1_OPM|macro|TIM_CR1_OPM
DECL|TIM_CR1_UDIS_Msk|macro|TIM_CR1_UDIS_Msk
DECL|TIM_CR1_UDIS_Pos|macro|TIM_CR1_UDIS_Pos
DECL|TIM_CR1_UDIS|macro|TIM_CR1_UDIS
DECL|TIM_CR1_UIFREMAP_Msk|macro|TIM_CR1_UIFREMAP_Msk
DECL|TIM_CR1_UIFREMAP_Pos|macro|TIM_CR1_UIFREMAP_Pos
DECL|TIM_CR1_UIFREMAP|macro|TIM_CR1_UIFREMAP
DECL|TIM_CR1_URS_Msk|macro|TIM_CR1_URS_Msk
DECL|TIM_CR1_URS_Pos|macro|TIM_CR1_URS_Pos
DECL|TIM_CR1_URS|macro|TIM_CR1_URS
DECL|TIM_CR2_CCDS_Msk|macro|TIM_CR2_CCDS_Msk
DECL|TIM_CR2_CCDS_Pos|macro|TIM_CR2_CCDS_Pos
DECL|TIM_CR2_CCDS|macro|TIM_CR2_CCDS
DECL|TIM_CR2_CCPC_Msk|macro|TIM_CR2_CCPC_Msk
DECL|TIM_CR2_CCPC_Pos|macro|TIM_CR2_CCPC_Pos
DECL|TIM_CR2_CCPC|macro|TIM_CR2_CCPC
DECL|TIM_CR2_CCUS_Msk|macro|TIM_CR2_CCUS_Msk
DECL|TIM_CR2_CCUS_Pos|macro|TIM_CR2_CCUS_Pos
DECL|TIM_CR2_CCUS|macro|TIM_CR2_CCUS
DECL|TIM_CR2_MMS2_0|macro|TIM_CR2_MMS2_0
DECL|TIM_CR2_MMS2_1|macro|TIM_CR2_MMS2_1
DECL|TIM_CR2_MMS2_2|macro|TIM_CR2_MMS2_2
DECL|TIM_CR2_MMS2_3|macro|TIM_CR2_MMS2_3
DECL|TIM_CR2_MMS2_Msk|macro|TIM_CR2_MMS2_Msk
DECL|TIM_CR2_MMS2_Pos|macro|TIM_CR2_MMS2_Pos
DECL|TIM_CR2_MMS2|macro|TIM_CR2_MMS2
DECL|TIM_CR2_MMS_0|macro|TIM_CR2_MMS_0
DECL|TIM_CR2_MMS_1|macro|TIM_CR2_MMS_1
DECL|TIM_CR2_MMS_2|macro|TIM_CR2_MMS_2
DECL|TIM_CR2_MMS_Msk|macro|TIM_CR2_MMS_Msk
DECL|TIM_CR2_MMS_Pos|macro|TIM_CR2_MMS_Pos
DECL|TIM_CR2_MMS|macro|TIM_CR2_MMS
DECL|TIM_CR2_OIS1N_Msk|macro|TIM_CR2_OIS1N_Msk
DECL|TIM_CR2_OIS1N_Pos|macro|TIM_CR2_OIS1N_Pos
DECL|TIM_CR2_OIS1N|macro|TIM_CR2_OIS1N
DECL|TIM_CR2_OIS1_Msk|macro|TIM_CR2_OIS1_Msk
DECL|TIM_CR2_OIS1_Pos|macro|TIM_CR2_OIS1_Pos
DECL|TIM_CR2_OIS1|macro|TIM_CR2_OIS1
DECL|TIM_CR2_OIS2N_Msk|macro|TIM_CR2_OIS2N_Msk
DECL|TIM_CR2_OIS2N_Pos|macro|TIM_CR2_OIS2N_Pos
DECL|TIM_CR2_OIS2N|macro|TIM_CR2_OIS2N
DECL|TIM_CR2_OIS2_Msk|macro|TIM_CR2_OIS2_Msk
DECL|TIM_CR2_OIS2_Pos|macro|TIM_CR2_OIS2_Pos
DECL|TIM_CR2_OIS2|macro|TIM_CR2_OIS2
DECL|TIM_CR2_OIS3N_Msk|macro|TIM_CR2_OIS3N_Msk
DECL|TIM_CR2_OIS3N_Pos|macro|TIM_CR2_OIS3N_Pos
DECL|TIM_CR2_OIS3N|macro|TIM_CR2_OIS3N
DECL|TIM_CR2_OIS3_Msk|macro|TIM_CR2_OIS3_Msk
DECL|TIM_CR2_OIS3_Pos|macro|TIM_CR2_OIS3_Pos
DECL|TIM_CR2_OIS3|macro|TIM_CR2_OIS3
DECL|TIM_CR2_OIS4_Msk|macro|TIM_CR2_OIS4_Msk
DECL|TIM_CR2_OIS4_Pos|macro|TIM_CR2_OIS4_Pos
DECL|TIM_CR2_OIS4|macro|TIM_CR2_OIS4
DECL|TIM_CR2_OIS5_Msk|macro|TIM_CR2_OIS5_Msk
DECL|TIM_CR2_OIS5_Pos|macro|TIM_CR2_OIS5_Pos
DECL|TIM_CR2_OIS5|macro|TIM_CR2_OIS5
DECL|TIM_CR2_OIS6_Msk|macro|TIM_CR2_OIS6_Msk
DECL|TIM_CR2_OIS6_Pos|macro|TIM_CR2_OIS6_Pos
DECL|TIM_CR2_OIS6|macro|TIM_CR2_OIS6
DECL|TIM_CR2_TI1S_Msk|macro|TIM_CR2_TI1S_Msk
DECL|TIM_CR2_TI1S_Pos|macro|TIM_CR2_TI1S_Pos
DECL|TIM_CR2_TI1S|macro|TIM_CR2_TI1S
DECL|TIM_DCR_DBA_0|macro|TIM_DCR_DBA_0
DECL|TIM_DCR_DBA_1|macro|TIM_DCR_DBA_1
DECL|TIM_DCR_DBA_2|macro|TIM_DCR_DBA_2
DECL|TIM_DCR_DBA_3|macro|TIM_DCR_DBA_3
DECL|TIM_DCR_DBA_4|macro|TIM_DCR_DBA_4
DECL|TIM_DCR_DBA_Msk|macro|TIM_DCR_DBA_Msk
DECL|TIM_DCR_DBA_Pos|macro|TIM_DCR_DBA_Pos
DECL|TIM_DCR_DBA|macro|TIM_DCR_DBA
DECL|TIM_DCR_DBL_0|macro|TIM_DCR_DBL_0
DECL|TIM_DCR_DBL_1|macro|TIM_DCR_DBL_1
DECL|TIM_DCR_DBL_2|macro|TIM_DCR_DBL_2
DECL|TIM_DCR_DBL_3|macro|TIM_DCR_DBL_3
DECL|TIM_DCR_DBL_4|macro|TIM_DCR_DBL_4
DECL|TIM_DCR_DBL_Msk|macro|TIM_DCR_DBL_Msk
DECL|TIM_DCR_DBL_Pos|macro|TIM_DCR_DBL_Pos
DECL|TIM_DCR_DBL|macro|TIM_DCR_DBL
DECL|TIM_DIER_BIE_Msk|macro|TIM_DIER_BIE_Msk
DECL|TIM_DIER_BIE_Pos|macro|TIM_DIER_BIE_Pos
DECL|TIM_DIER_BIE|macro|TIM_DIER_BIE
DECL|TIM_DIER_CC1DE_Msk|macro|TIM_DIER_CC1DE_Msk
DECL|TIM_DIER_CC1DE_Pos|macro|TIM_DIER_CC1DE_Pos
DECL|TIM_DIER_CC1DE|macro|TIM_DIER_CC1DE
DECL|TIM_DIER_CC1IE_Msk|macro|TIM_DIER_CC1IE_Msk
DECL|TIM_DIER_CC1IE_Pos|macro|TIM_DIER_CC1IE_Pos
DECL|TIM_DIER_CC1IE|macro|TIM_DIER_CC1IE
DECL|TIM_DIER_CC2DE_Msk|macro|TIM_DIER_CC2DE_Msk
DECL|TIM_DIER_CC2DE_Pos|macro|TIM_DIER_CC2DE_Pos
DECL|TIM_DIER_CC2DE|macro|TIM_DIER_CC2DE
DECL|TIM_DIER_CC2IE_Msk|macro|TIM_DIER_CC2IE_Msk
DECL|TIM_DIER_CC2IE_Pos|macro|TIM_DIER_CC2IE_Pos
DECL|TIM_DIER_CC2IE|macro|TIM_DIER_CC2IE
DECL|TIM_DIER_CC3DE_Msk|macro|TIM_DIER_CC3DE_Msk
DECL|TIM_DIER_CC3DE_Pos|macro|TIM_DIER_CC3DE_Pos
DECL|TIM_DIER_CC3DE|macro|TIM_DIER_CC3DE
DECL|TIM_DIER_CC3IE_Msk|macro|TIM_DIER_CC3IE_Msk
DECL|TIM_DIER_CC3IE_Pos|macro|TIM_DIER_CC3IE_Pos
DECL|TIM_DIER_CC3IE|macro|TIM_DIER_CC3IE
DECL|TIM_DIER_CC4DE_Msk|macro|TIM_DIER_CC4DE_Msk
DECL|TIM_DIER_CC4DE_Pos|macro|TIM_DIER_CC4DE_Pos
DECL|TIM_DIER_CC4DE|macro|TIM_DIER_CC4DE
DECL|TIM_DIER_CC4IE_Msk|macro|TIM_DIER_CC4IE_Msk
DECL|TIM_DIER_CC4IE_Pos|macro|TIM_DIER_CC4IE_Pos
DECL|TIM_DIER_CC4IE|macro|TIM_DIER_CC4IE
DECL|TIM_DIER_COMDE_Msk|macro|TIM_DIER_COMDE_Msk
DECL|TIM_DIER_COMDE_Pos|macro|TIM_DIER_COMDE_Pos
DECL|TIM_DIER_COMDE|macro|TIM_DIER_COMDE
DECL|TIM_DIER_COMIE_Msk|macro|TIM_DIER_COMIE_Msk
DECL|TIM_DIER_COMIE_Pos|macro|TIM_DIER_COMIE_Pos
DECL|TIM_DIER_COMIE|macro|TIM_DIER_COMIE
DECL|TIM_DIER_TDE_Msk|macro|TIM_DIER_TDE_Msk
DECL|TIM_DIER_TDE_Pos|macro|TIM_DIER_TDE_Pos
DECL|TIM_DIER_TDE|macro|TIM_DIER_TDE
DECL|TIM_DIER_TIE_Msk|macro|TIM_DIER_TIE_Msk
DECL|TIM_DIER_TIE_Pos|macro|TIM_DIER_TIE_Pos
DECL|TIM_DIER_TIE|macro|TIM_DIER_TIE
DECL|TIM_DIER_UDE_Msk|macro|TIM_DIER_UDE_Msk
DECL|TIM_DIER_UDE_Pos|macro|TIM_DIER_UDE_Pos
DECL|TIM_DIER_UDE|macro|TIM_DIER_UDE
DECL|TIM_DIER_UIE_Msk|macro|TIM_DIER_UIE_Msk
DECL|TIM_DIER_UIE_Pos|macro|TIM_DIER_UIE_Pos
DECL|TIM_DIER_UIE|macro|TIM_DIER_UIE
DECL|TIM_DMAR_DMAB_Msk|macro|TIM_DMAR_DMAB_Msk
DECL|TIM_DMAR_DMAB_Pos|macro|TIM_DMAR_DMAB_Pos
DECL|TIM_DMAR_DMAB|macro|TIM_DMAR_DMAB
DECL|TIM_EGR_B2G_Msk|macro|TIM_EGR_B2G_Msk
DECL|TIM_EGR_B2G_Pos|macro|TIM_EGR_B2G_Pos
DECL|TIM_EGR_B2G|macro|TIM_EGR_B2G
DECL|TIM_EGR_BG_Msk|macro|TIM_EGR_BG_Msk
DECL|TIM_EGR_BG_Pos|macro|TIM_EGR_BG_Pos
DECL|TIM_EGR_BG|macro|TIM_EGR_BG
DECL|TIM_EGR_CC1G_Msk|macro|TIM_EGR_CC1G_Msk
DECL|TIM_EGR_CC1G_Pos|macro|TIM_EGR_CC1G_Pos
DECL|TIM_EGR_CC1G|macro|TIM_EGR_CC1G
DECL|TIM_EGR_CC2G_Msk|macro|TIM_EGR_CC2G_Msk
DECL|TIM_EGR_CC2G_Pos|macro|TIM_EGR_CC2G_Pos
DECL|TIM_EGR_CC2G|macro|TIM_EGR_CC2G
DECL|TIM_EGR_CC3G_Msk|macro|TIM_EGR_CC3G_Msk
DECL|TIM_EGR_CC3G_Pos|macro|TIM_EGR_CC3G_Pos
DECL|TIM_EGR_CC3G|macro|TIM_EGR_CC3G
DECL|TIM_EGR_CC4G_Msk|macro|TIM_EGR_CC4G_Msk
DECL|TIM_EGR_CC4G_Pos|macro|TIM_EGR_CC4G_Pos
DECL|TIM_EGR_CC4G|macro|TIM_EGR_CC4G
DECL|TIM_EGR_COMG_Msk|macro|TIM_EGR_COMG_Msk
DECL|TIM_EGR_COMG_Pos|macro|TIM_EGR_COMG_Pos
DECL|TIM_EGR_COMG|macro|TIM_EGR_COMG
DECL|TIM_EGR_TG_Msk|macro|TIM_EGR_TG_Msk
DECL|TIM_EGR_TG_Pos|macro|TIM_EGR_TG_Pos
DECL|TIM_EGR_TG|macro|TIM_EGR_TG
DECL|TIM_EGR_UG_Msk|macro|TIM_EGR_UG_Msk
DECL|TIM_EGR_UG_Pos|macro|TIM_EGR_UG_Pos
DECL|TIM_EGR_UG|macro|TIM_EGR_UG
DECL|TIM_OR_ITR1_RMP_0|macro|TIM_OR_ITR1_RMP_0
DECL|TIM_OR_ITR1_RMP_1|macro|TIM_OR_ITR1_RMP_1
DECL|TIM_OR_ITR1_RMP_Msk|macro|TIM_OR_ITR1_RMP_Msk
DECL|TIM_OR_ITR1_RMP_Pos|macro|TIM_OR_ITR1_RMP_Pos
DECL|TIM_OR_ITR1_RMP|macro|TIM_OR_ITR1_RMP
DECL|TIM_OR_TI4_RMP_0|macro|TIM_OR_TI4_RMP_0
DECL|TIM_OR_TI4_RMP_1|macro|TIM_OR_TI4_RMP_1
DECL|TIM_OR_TI4_RMP_Msk|macro|TIM_OR_TI4_RMP_Msk
DECL|TIM_OR_TI4_RMP_Pos|macro|TIM_OR_TI4_RMP_Pos
DECL|TIM_OR_TI4_RMP|macro|TIM_OR_TI4_RMP
DECL|TIM_PSC_PSC_Msk|macro|TIM_PSC_PSC_Msk
DECL|TIM_PSC_PSC_Pos|macro|TIM_PSC_PSC_Pos
DECL|TIM_PSC_PSC|macro|TIM_PSC_PSC
DECL|TIM_RCR_REP_Msk|macro|TIM_RCR_REP_Msk
DECL|TIM_RCR_REP_Pos|macro|TIM_RCR_REP_Pos
DECL|TIM_RCR_REP|macro|TIM_RCR_REP
DECL|TIM_SMCR_ECE_Msk|macro|TIM_SMCR_ECE_Msk
DECL|TIM_SMCR_ECE_Pos|macro|TIM_SMCR_ECE_Pos
DECL|TIM_SMCR_ECE|macro|TIM_SMCR_ECE
DECL|TIM_SMCR_ETF_0|macro|TIM_SMCR_ETF_0
DECL|TIM_SMCR_ETF_1|macro|TIM_SMCR_ETF_1
DECL|TIM_SMCR_ETF_2|macro|TIM_SMCR_ETF_2
DECL|TIM_SMCR_ETF_3|macro|TIM_SMCR_ETF_3
DECL|TIM_SMCR_ETF_Msk|macro|TIM_SMCR_ETF_Msk
DECL|TIM_SMCR_ETF_Pos|macro|TIM_SMCR_ETF_Pos
DECL|TIM_SMCR_ETF|macro|TIM_SMCR_ETF
DECL|TIM_SMCR_ETPS_0|macro|TIM_SMCR_ETPS_0
DECL|TIM_SMCR_ETPS_1|macro|TIM_SMCR_ETPS_1
DECL|TIM_SMCR_ETPS_Msk|macro|TIM_SMCR_ETPS_Msk
DECL|TIM_SMCR_ETPS_Pos|macro|TIM_SMCR_ETPS_Pos
DECL|TIM_SMCR_ETPS|macro|TIM_SMCR_ETPS
DECL|TIM_SMCR_ETP_Msk|macro|TIM_SMCR_ETP_Msk
DECL|TIM_SMCR_ETP_Pos|macro|TIM_SMCR_ETP_Pos
DECL|TIM_SMCR_ETP|macro|TIM_SMCR_ETP
DECL|TIM_SMCR_MSM_Msk|macro|TIM_SMCR_MSM_Msk
DECL|TIM_SMCR_MSM_Pos|macro|TIM_SMCR_MSM_Pos
DECL|TIM_SMCR_MSM|macro|TIM_SMCR_MSM
DECL|TIM_SMCR_SMS_0|macro|TIM_SMCR_SMS_0
DECL|TIM_SMCR_SMS_1|macro|TIM_SMCR_SMS_1
DECL|TIM_SMCR_SMS_2|macro|TIM_SMCR_SMS_2
DECL|TIM_SMCR_SMS_3|macro|TIM_SMCR_SMS_3
DECL|TIM_SMCR_SMS_Msk|macro|TIM_SMCR_SMS_Msk
DECL|TIM_SMCR_SMS_Pos|macro|TIM_SMCR_SMS_Pos
DECL|TIM_SMCR_SMS|macro|TIM_SMCR_SMS
DECL|TIM_SMCR_TS_0|macro|TIM_SMCR_TS_0
DECL|TIM_SMCR_TS_1|macro|TIM_SMCR_TS_1
DECL|TIM_SMCR_TS_2|macro|TIM_SMCR_TS_2
DECL|TIM_SMCR_TS_Msk|macro|TIM_SMCR_TS_Msk
DECL|TIM_SMCR_TS_Pos|macro|TIM_SMCR_TS_Pos
DECL|TIM_SMCR_TS|macro|TIM_SMCR_TS
DECL|TIM_SR_B2IF_Msk|macro|TIM_SR_B2IF_Msk
DECL|TIM_SR_B2IF_Pos|macro|TIM_SR_B2IF_Pos
DECL|TIM_SR_B2IF|macro|TIM_SR_B2IF
DECL|TIM_SR_BIF_Msk|macro|TIM_SR_BIF_Msk
DECL|TIM_SR_BIF_Pos|macro|TIM_SR_BIF_Pos
DECL|TIM_SR_BIF|macro|TIM_SR_BIF
DECL|TIM_SR_CC1IF_Msk|macro|TIM_SR_CC1IF_Msk
DECL|TIM_SR_CC1IF_Pos|macro|TIM_SR_CC1IF_Pos
DECL|TIM_SR_CC1IF|macro|TIM_SR_CC1IF
DECL|TIM_SR_CC1OF_Msk|macro|TIM_SR_CC1OF_Msk
DECL|TIM_SR_CC1OF_Pos|macro|TIM_SR_CC1OF_Pos
DECL|TIM_SR_CC1OF|macro|TIM_SR_CC1OF
DECL|TIM_SR_CC2IF_Msk|macro|TIM_SR_CC2IF_Msk
DECL|TIM_SR_CC2IF_Pos|macro|TIM_SR_CC2IF_Pos
DECL|TIM_SR_CC2IF|macro|TIM_SR_CC2IF
DECL|TIM_SR_CC2OF_Msk|macro|TIM_SR_CC2OF_Msk
DECL|TIM_SR_CC2OF_Pos|macro|TIM_SR_CC2OF_Pos
DECL|TIM_SR_CC2OF|macro|TIM_SR_CC2OF
DECL|TIM_SR_CC3IF_Msk|macro|TIM_SR_CC3IF_Msk
DECL|TIM_SR_CC3IF_Pos|macro|TIM_SR_CC3IF_Pos
DECL|TIM_SR_CC3IF|macro|TIM_SR_CC3IF
DECL|TIM_SR_CC3OF_Msk|macro|TIM_SR_CC3OF_Msk
DECL|TIM_SR_CC3OF_Pos|macro|TIM_SR_CC3OF_Pos
DECL|TIM_SR_CC3OF|macro|TIM_SR_CC3OF
DECL|TIM_SR_CC4IF_Msk|macro|TIM_SR_CC4IF_Msk
DECL|TIM_SR_CC4IF_Pos|macro|TIM_SR_CC4IF_Pos
DECL|TIM_SR_CC4IF|macro|TIM_SR_CC4IF
DECL|TIM_SR_CC4OF_Msk|macro|TIM_SR_CC4OF_Msk
DECL|TIM_SR_CC4OF_Pos|macro|TIM_SR_CC4OF_Pos
DECL|TIM_SR_CC4OF|macro|TIM_SR_CC4OF
DECL|TIM_SR_CC5IF_Msk|macro|TIM_SR_CC5IF_Msk
DECL|TIM_SR_CC5IF_Pos|macro|TIM_SR_CC5IF_Pos
DECL|TIM_SR_CC5IF|macro|TIM_SR_CC5IF
DECL|TIM_SR_CC6IF_Msk|macro|TIM_SR_CC6IF_Msk
DECL|TIM_SR_CC6IF_Pos|macro|TIM_SR_CC6IF_Pos
DECL|TIM_SR_CC6IF|macro|TIM_SR_CC6IF
DECL|TIM_SR_COMIF_Msk|macro|TIM_SR_COMIF_Msk
DECL|TIM_SR_COMIF_Pos|macro|TIM_SR_COMIF_Pos
DECL|TIM_SR_COMIF|macro|TIM_SR_COMIF
DECL|TIM_SR_SBIF_Msk|macro|TIM_SR_SBIF_Msk
DECL|TIM_SR_SBIF_Pos|macro|TIM_SR_SBIF_Pos
DECL|TIM_SR_SBIF|macro|TIM_SR_SBIF
DECL|TIM_SR_TIF_Msk|macro|TIM_SR_TIF_Msk
DECL|TIM_SR_TIF_Pos|macro|TIM_SR_TIF_Pos
DECL|TIM_SR_TIF|macro|TIM_SR_TIF
DECL|TIM_SR_UIF_Msk|macro|TIM_SR_UIF_Msk
DECL|TIM_SR_UIF_Pos|macro|TIM_SR_UIF_Pos
DECL|TIM_SR_UIF|macro|TIM_SR_UIF
DECL|TIM_TypeDef|typedef|} TIM_TypeDef;
DECL|TIR|member|__IO uint32_t TIR; /*!< CAN TX mailbox identifier register */
DECL|TR|member|__IO uint32_t TR; /*!< RTC time register, Address offset: 0x00 */
DECL|TSDR|member|__IO uint32_t TSDR; /*!< RTC time stamp date register, Address offset: 0x34 */
DECL|TSR|member|__IO uint32_t TSR; /*!< CAN transmit status register, Address offset: 0x08 */
DECL|TSSSR|member|__IO uint32_t TSSSR; /*!< RTC time-stamp sub second register, Address offset: 0x38 */
DECL|TSTR|member|__IO uint32_t TSTR; /*!< RTC time stamp time register, Address offset: 0x30 */
DECL|TXCRCR|member|__IO uint32_t TXCRCR; /*!< SPI TX CRC register (not used in I2S mode), Address offset: 0x18 */
DECL|TXDR|member|__IO uint32_t TXDR; /*!< I2C Transmit data register, Address offset: 0x28 */
DECL|UART4_BASE|macro|UART4_BASE
DECL|UART4_IRQn|enumerator|UART4_IRQn = 52, /*!< UART4 global Interrupt */
DECL|UART4|macro|UART4
DECL|UART5_BASE|macro|UART5_BASE
DECL|UART5_IRQn|enumerator|UART5_IRQn = 53, /*!< UART5 global Interrupt */
DECL|UART5|macro|UART5
DECL|UART7_BASE|macro|UART7_BASE
DECL|UART7_IRQn|enumerator|UART7_IRQn = 82, /*!< UART7 global interrupt */
DECL|UART7|macro|UART7
DECL|UART8_BASE|macro|UART8_BASE
DECL|UART8_IRQn|enumerator|UART8_IRQn = 83, /*!< UART8 global interrupt */
DECL|UART8|macro|UART8
DECL|UID_BASE|macro|UID_BASE
DECL|USART1_BASE|macro|USART1_BASE
DECL|USART1_IRQn|enumerator|USART1_IRQn = 37, /*!< USART1 global Interrupt */
DECL|USART1|macro|USART1
DECL|USART2_BASE|macro|USART2_BASE
DECL|USART2_IRQn|enumerator|USART2_IRQn = 38, /*!< USART2 global Interrupt */
DECL|USART2|macro|USART2
DECL|USART3_BASE|macro|USART3_BASE
DECL|USART3_IRQn|enumerator|USART3_IRQn = 39, /*!< USART3 global Interrupt */
DECL|USART3|macro|USART3
DECL|USART6_BASE|macro|USART6_BASE
DECL|USART6_IRQn|enumerator|USART6_IRQn = 71, /*!< USART6 global interrupt */
DECL|USART6|macro|USART6
DECL|USART_BRR_DIV_FRACTION_Msk|macro|USART_BRR_DIV_FRACTION_Msk
DECL|USART_BRR_DIV_FRACTION_Pos|macro|USART_BRR_DIV_FRACTION_Pos
DECL|USART_BRR_DIV_FRACTION|macro|USART_BRR_DIV_FRACTION
DECL|USART_BRR_DIV_MANTISSA_Msk|macro|USART_BRR_DIV_MANTISSA_Msk
DECL|USART_BRR_DIV_MANTISSA_Pos|macro|USART_BRR_DIV_MANTISSA_Pos
DECL|USART_BRR_DIV_MANTISSA|macro|USART_BRR_DIV_MANTISSA
DECL|USART_CR1_CMIE_Msk|macro|USART_CR1_CMIE_Msk
DECL|USART_CR1_CMIE_Pos|macro|USART_CR1_CMIE_Pos
DECL|USART_CR1_CMIE|macro|USART_CR1_CMIE
DECL|USART_CR1_DEAT_0|macro|USART_CR1_DEAT_0
DECL|USART_CR1_DEAT_1|macro|USART_CR1_DEAT_1
DECL|USART_CR1_DEAT_2|macro|USART_CR1_DEAT_2
DECL|USART_CR1_DEAT_3|macro|USART_CR1_DEAT_3
DECL|USART_CR1_DEAT_4|macro|USART_CR1_DEAT_4
DECL|USART_CR1_DEAT_Msk|macro|USART_CR1_DEAT_Msk
DECL|USART_CR1_DEAT_Pos|macro|USART_CR1_DEAT_Pos
DECL|USART_CR1_DEAT|macro|USART_CR1_DEAT
DECL|USART_CR1_DEDT_0|macro|USART_CR1_DEDT_0
DECL|USART_CR1_DEDT_1|macro|USART_CR1_DEDT_1
DECL|USART_CR1_DEDT_2|macro|USART_CR1_DEDT_2
DECL|USART_CR1_DEDT_3|macro|USART_CR1_DEDT_3
DECL|USART_CR1_DEDT_4|macro|USART_CR1_DEDT_4
DECL|USART_CR1_DEDT_Msk|macro|USART_CR1_DEDT_Msk
DECL|USART_CR1_DEDT_Pos|macro|USART_CR1_DEDT_Pos
DECL|USART_CR1_DEDT|macro|USART_CR1_DEDT
DECL|USART_CR1_EOBIE_Msk|macro|USART_CR1_EOBIE_Msk
DECL|USART_CR1_EOBIE_Pos|macro|USART_CR1_EOBIE_Pos
DECL|USART_CR1_EOBIE|macro|USART_CR1_EOBIE
DECL|USART_CR1_IDLEIE_Msk|macro|USART_CR1_IDLEIE_Msk
DECL|USART_CR1_IDLEIE_Pos|macro|USART_CR1_IDLEIE_Pos
DECL|USART_CR1_IDLEIE|macro|USART_CR1_IDLEIE
DECL|USART_CR1_M0|macro|USART_CR1_M0
DECL|USART_CR1_M1|macro|USART_CR1_M1
DECL|USART_CR1_MME_Msk|macro|USART_CR1_MME_Msk
DECL|USART_CR1_MME_Pos|macro|USART_CR1_MME_Pos
DECL|USART_CR1_MME|macro|USART_CR1_MME
DECL|USART_CR1_M_0|macro|USART_CR1_M_0
DECL|USART_CR1_M_1|macro|USART_CR1_M_1
DECL|USART_CR1_M_Msk|macro|USART_CR1_M_Msk
DECL|USART_CR1_M_Pos|macro|USART_CR1_M_Pos
DECL|USART_CR1_M|macro|USART_CR1_M
DECL|USART_CR1_OVER8_Msk|macro|USART_CR1_OVER8_Msk
DECL|USART_CR1_OVER8_Pos|macro|USART_CR1_OVER8_Pos
DECL|USART_CR1_OVER8|macro|USART_CR1_OVER8
DECL|USART_CR1_PCE_Msk|macro|USART_CR1_PCE_Msk
DECL|USART_CR1_PCE_Pos|macro|USART_CR1_PCE_Pos
DECL|USART_CR1_PCE|macro|USART_CR1_PCE
DECL|USART_CR1_PEIE_Msk|macro|USART_CR1_PEIE_Msk
DECL|USART_CR1_PEIE_Pos|macro|USART_CR1_PEIE_Pos
DECL|USART_CR1_PEIE|macro|USART_CR1_PEIE
DECL|USART_CR1_PS_Msk|macro|USART_CR1_PS_Msk
DECL|USART_CR1_PS_Pos|macro|USART_CR1_PS_Pos
DECL|USART_CR1_PS|macro|USART_CR1_PS
DECL|USART_CR1_RE_Msk|macro|USART_CR1_RE_Msk
DECL|USART_CR1_RE_Pos|macro|USART_CR1_RE_Pos
DECL|USART_CR1_RE|macro|USART_CR1_RE
DECL|USART_CR1_RTOIE_Msk|macro|USART_CR1_RTOIE_Msk
DECL|USART_CR1_RTOIE_Pos|macro|USART_CR1_RTOIE_Pos
DECL|USART_CR1_RTOIE|macro|USART_CR1_RTOIE
DECL|USART_CR1_RXNEIE_Msk|macro|USART_CR1_RXNEIE_Msk
DECL|USART_CR1_RXNEIE_Pos|macro|USART_CR1_RXNEIE_Pos
DECL|USART_CR1_RXNEIE|macro|USART_CR1_RXNEIE
DECL|USART_CR1_TCIE_Msk|macro|USART_CR1_TCIE_Msk
DECL|USART_CR1_TCIE_Pos|macro|USART_CR1_TCIE_Pos
DECL|USART_CR1_TCIE|macro|USART_CR1_TCIE
DECL|USART_CR1_TE_Msk|macro|USART_CR1_TE_Msk
DECL|USART_CR1_TE_Pos|macro|USART_CR1_TE_Pos
DECL|USART_CR1_TE|macro|USART_CR1_TE
DECL|USART_CR1_TXEIE_Msk|macro|USART_CR1_TXEIE_Msk
DECL|USART_CR1_TXEIE_Pos|macro|USART_CR1_TXEIE_Pos
DECL|USART_CR1_TXEIE|macro|USART_CR1_TXEIE
DECL|USART_CR1_UE_Msk|macro|USART_CR1_UE_Msk
DECL|USART_CR1_UE_Pos|macro|USART_CR1_UE_Pos
DECL|USART_CR1_UE|macro|USART_CR1_UE
DECL|USART_CR1_WAKE_Msk|macro|USART_CR1_WAKE_Msk
DECL|USART_CR1_WAKE_Pos|macro|USART_CR1_WAKE_Pos
DECL|USART_CR1_WAKE|macro|USART_CR1_WAKE
DECL|USART_CR2_ABREN_Msk|macro|USART_CR2_ABREN_Msk
DECL|USART_CR2_ABREN_Pos|macro|USART_CR2_ABREN_Pos
DECL|USART_CR2_ABREN|macro|USART_CR2_ABREN
DECL|USART_CR2_ABRMODE_0|macro|USART_CR2_ABRMODE_0
DECL|USART_CR2_ABRMODE_1|macro|USART_CR2_ABRMODE_1
DECL|USART_CR2_ABRMODE_Msk|macro|USART_CR2_ABRMODE_Msk
DECL|USART_CR2_ABRMODE_Pos|macro|USART_CR2_ABRMODE_Pos
DECL|USART_CR2_ABRMODE|macro|USART_CR2_ABRMODE
DECL|USART_CR2_ADDM7_Msk|macro|USART_CR2_ADDM7_Msk
DECL|USART_CR2_ADDM7_Pos|macro|USART_CR2_ADDM7_Pos
DECL|USART_CR2_ADDM7|macro|USART_CR2_ADDM7
DECL|USART_CR2_ADD_Msk|macro|USART_CR2_ADD_Msk
DECL|USART_CR2_ADD_Pos|macro|USART_CR2_ADD_Pos
DECL|USART_CR2_ADD|macro|USART_CR2_ADD
DECL|USART_CR2_CLKEN_Msk|macro|USART_CR2_CLKEN_Msk
DECL|USART_CR2_CLKEN_Pos|macro|USART_CR2_CLKEN_Pos
DECL|USART_CR2_CLKEN|macro|USART_CR2_CLKEN
DECL|USART_CR2_CPHA_Msk|macro|USART_CR2_CPHA_Msk
DECL|USART_CR2_CPHA_Pos|macro|USART_CR2_CPHA_Pos
DECL|USART_CR2_CPHA|macro|USART_CR2_CPHA
DECL|USART_CR2_CPOL_Msk|macro|USART_CR2_CPOL_Msk
DECL|USART_CR2_CPOL_Pos|macro|USART_CR2_CPOL_Pos
DECL|USART_CR2_CPOL|macro|USART_CR2_CPOL
DECL|USART_CR2_DATAINV_Msk|macro|USART_CR2_DATAINV_Msk
DECL|USART_CR2_DATAINV_Pos|macro|USART_CR2_DATAINV_Pos
DECL|USART_CR2_DATAINV|macro|USART_CR2_DATAINV
DECL|USART_CR2_LBCL_Msk|macro|USART_CR2_LBCL_Msk
DECL|USART_CR2_LBCL_Pos|macro|USART_CR2_LBCL_Pos
DECL|USART_CR2_LBCL|macro|USART_CR2_LBCL
DECL|USART_CR2_LBDIE_Msk|macro|USART_CR2_LBDIE_Msk
DECL|USART_CR2_LBDIE_Pos|macro|USART_CR2_LBDIE_Pos
DECL|USART_CR2_LBDIE|macro|USART_CR2_LBDIE
DECL|USART_CR2_LBDL_Msk|macro|USART_CR2_LBDL_Msk
DECL|USART_CR2_LBDL_Pos|macro|USART_CR2_LBDL_Pos
DECL|USART_CR2_LBDL|macro|USART_CR2_LBDL
DECL|USART_CR2_LINEN_Msk|macro|USART_CR2_LINEN_Msk
DECL|USART_CR2_LINEN_Pos|macro|USART_CR2_LINEN_Pos
DECL|USART_CR2_LINEN|macro|USART_CR2_LINEN
DECL|USART_CR2_MSBFIRST_Msk|macro|USART_CR2_MSBFIRST_Msk
DECL|USART_CR2_MSBFIRST_Pos|macro|USART_CR2_MSBFIRST_Pos
DECL|USART_CR2_MSBFIRST|macro|USART_CR2_MSBFIRST
DECL|USART_CR2_RTOEN_Msk|macro|USART_CR2_RTOEN_Msk
DECL|USART_CR2_RTOEN_Pos|macro|USART_CR2_RTOEN_Pos
DECL|USART_CR2_RTOEN|macro|USART_CR2_RTOEN
DECL|USART_CR2_RXINV_Msk|macro|USART_CR2_RXINV_Msk
DECL|USART_CR2_RXINV_Pos|macro|USART_CR2_RXINV_Pos
DECL|USART_CR2_RXINV|macro|USART_CR2_RXINV
DECL|USART_CR2_STOP_0|macro|USART_CR2_STOP_0
DECL|USART_CR2_STOP_1|macro|USART_CR2_STOP_1
DECL|USART_CR2_STOP_Msk|macro|USART_CR2_STOP_Msk
DECL|USART_CR2_STOP_Pos|macro|USART_CR2_STOP_Pos
DECL|USART_CR2_STOP|macro|USART_CR2_STOP
DECL|USART_CR2_SWAP_Msk|macro|USART_CR2_SWAP_Msk
DECL|USART_CR2_SWAP_Pos|macro|USART_CR2_SWAP_Pos
DECL|USART_CR2_SWAP|macro|USART_CR2_SWAP
DECL|USART_CR2_TXINV_Msk|macro|USART_CR2_TXINV_Msk
DECL|USART_CR2_TXINV_Pos|macro|USART_CR2_TXINV_Pos
DECL|USART_CR2_TXINV|macro|USART_CR2_TXINV
DECL|USART_CR3_CTSE_Msk|macro|USART_CR3_CTSE_Msk
DECL|USART_CR3_CTSE_Pos|macro|USART_CR3_CTSE_Pos
DECL|USART_CR3_CTSE|macro|USART_CR3_CTSE
DECL|USART_CR3_CTSIE_Msk|macro|USART_CR3_CTSIE_Msk
DECL|USART_CR3_CTSIE_Pos|macro|USART_CR3_CTSIE_Pos
DECL|USART_CR3_CTSIE|macro|USART_CR3_CTSIE
DECL|USART_CR3_DDRE_Msk|macro|USART_CR3_DDRE_Msk
DECL|USART_CR3_DDRE_Pos|macro|USART_CR3_DDRE_Pos
DECL|USART_CR3_DDRE|macro|USART_CR3_DDRE
DECL|USART_CR3_DEM_Msk|macro|USART_CR3_DEM_Msk
DECL|USART_CR3_DEM_Pos|macro|USART_CR3_DEM_Pos
DECL|USART_CR3_DEM|macro|USART_CR3_DEM
DECL|USART_CR3_DEP_Msk|macro|USART_CR3_DEP_Msk
DECL|USART_CR3_DEP_Pos|macro|USART_CR3_DEP_Pos
DECL|USART_CR3_DEP|macro|USART_CR3_DEP
DECL|USART_CR3_DMAR_Msk|macro|USART_CR3_DMAR_Msk
DECL|USART_CR3_DMAR_Pos|macro|USART_CR3_DMAR_Pos
DECL|USART_CR3_DMAR|macro|USART_CR3_DMAR
DECL|USART_CR3_DMAT_Msk|macro|USART_CR3_DMAT_Msk
DECL|USART_CR3_DMAT_Pos|macro|USART_CR3_DMAT_Pos
DECL|USART_CR3_DMAT|macro|USART_CR3_DMAT
DECL|USART_CR3_EIE_Msk|macro|USART_CR3_EIE_Msk
DECL|USART_CR3_EIE_Pos|macro|USART_CR3_EIE_Pos
DECL|USART_CR3_EIE|macro|USART_CR3_EIE
DECL|USART_CR3_HDSEL_Msk|macro|USART_CR3_HDSEL_Msk
DECL|USART_CR3_HDSEL_Pos|macro|USART_CR3_HDSEL_Pos
DECL|USART_CR3_HDSEL|macro|USART_CR3_HDSEL
DECL|USART_CR3_IREN_Msk|macro|USART_CR3_IREN_Msk
DECL|USART_CR3_IREN_Pos|macro|USART_CR3_IREN_Pos
DECL|USART_CR3_IREN|macro|USART_CR3_IREN
DECL|USART_CR3_IRLP_Msk|macro|USART_CR3_IRLP_Msk
DECL|USART_CR3_IRLP_Pos|macro|USART_CR3_IRLP_Pos
DECL|USART_CR3_IRLP|macro|USART_CR3_IRLP
DECL|USART_CR3_NACK_Msk|macro|USART_CR3_NACK_Msk
DECL|USART_CR3_NACK_Pos|macro|USART_CR3_NACK_Pos
DECL|USART_CR3_NACK|macro|USART_CR3_NACK
DECL|USART_CR3_ONEBIT_Msk|macro|USART_CR3_ONEBIT_Msk
DECL|USART_CR3_ONEBIT_Pos|macro|USART_CR3_ONEBIT_Pos
DECL|USART_CR3_ONEBIT|macro|USART_CR3_ONEBIT
DECL|USART_CR3_OVRDIS_Msk|macro|USART_CR3_OVRDIS_Msk
DECL|USART_CR3_OVRDIS_Pos|macro|USART_CR3_OVRDIS_Pos
DECL|USART_CR3_OVRDIS|macro|USART_CR3_OVRDIS
DECL|USART_CR3_RTSE_Msk|macro|USART_CR3_RTSE_Msk
DECL|USART_CR3_RTSE_Pos|macro|USART_CR3_RTSE_Pos
DECL|USART_CR3_RTSE|macro|USART_CR3_RTSE
DECL|USART_CR3_SCARCNT_0|macro|USART_CR3_SCARCNT_0
DECL|USART_CR3_SCARCNT_1|macro|USART_CR3_SCARCNT_1
DECL|USART_CR3_SCARCNT_2|macro|USART_CR3_SCARCNT_2
DECL|USART_CR3_SCARCNT_Msk|macro|USART_CR3_SCARCNT_Msk
DECL|USART_CR3_SCARCNT_Pos|macro|USART_CR3_SCARCNT_Pos
DECL|USART_CR3_SCARCNT|macro|USART_CR3_SCARCNT
DECL|USART_CR3_SCEN_Msk|macro|USART_CR3_SCEN_Msk
DECL|USART_CR3_SCEN_Pos|macro|USART_CR3_SCEN_Pos
DECL|USART_CR3_SCEN|macro|USART_CR3_SCEN
DECL|USART_CR3_TCBGTIE_Msk|macro|USART_CR3_TCBGTIE_Msk
DECL|USART_CR3_TCBGTIE_Pos|macro|USART_CR3_TCBGTIE_Pos
DECL|USART_CR3_TCBGTIE|macro|USART_CR3_TCBGTIE
DECL|USART_GTPR_GT_Msk|macro|USART_GTPR_GT_Msk
DECL|USART_GTPR_GT_Pos|macro|USART_GTPR_GT_Pos
DECL|USART_GTPR_GT|macro|USART_GTPR_GT
DECL|USART_GTPR_PSC_Msk|macro|USART_GTPR_PSC_Msk
DECL|USART_GTPR_PSC_Pos|macro|USART_GTPR_PSC_Pos
DECL|USART_GTPR_PSC|macro|USART_GTPR_PSC
DECL|USART_ICR_CMCF_Msk|macro|USART_ICR_CMCF_Msk
DECL|USART_ICR_CMCF_Pos|macro|USART_ICR_CMCF_Pos
DECL|USART_ICR_CMCF|macro|USART_ICR_CMCF
DECL|USART_ICR_CTSCF_Msk|macro|USART_ICR_CTSCF_Msk
DECL|USART_ICR_CTSCF_Pos|macro|USART_ICR_CTSCF_Pos
DECL|USART_ICR_CTSCF|macro|USART_ICR_CTSCF
DECL|USART_ICR_EOBCF_Msk|macro|USART_ICR_EOBCF_Msk
DECL|USART_ICR_EOBCF_Pos|macro|USART_ICR_EOBCF_Pos
DECL|USART_ICR_EOBCF|macro|USART_ICR_EOBCF
DECL|USART_ICR_FECF_Msk|macro|USART_ICR_FECF_Msk
DECL|USART_ICR_FECF_Pos|macro|USART_ICR_FECF_Pos
DECL|USART_ICR_FECF|macro|USART_ICR_FECF
DECL|USART_ICR_IDLECF_Msk|macro|USART_ICR_IDLECF_Msk
DECL|USART_ICR_IDLECF_Pos|macro|USART_ICR_IDLECF_Pos
DECL|USART_ICR_IDLECF|macro|USART_ICR_IDLECF
DECL|USART_ICR_LBDCF_Msk|macro|USART_ICR_LBDCF_Msk
DECL|USART_ICR_LBDCF_Pos|macro|USART_ICR_LBDCF_Pos
DECL|USART_ICR_LBDCF|macro|USART_ICR_LBDCF
DECL|USART_ICR_NCF_Msk|macro|USART_ICR_NCF_Msk
DECL|USART_ICR_NCF_Pos|macro|USART_ICR_NCF_Pos
DECL|USART_ICR_NCF|macro|USART_ICR_NCF
DECL|USART_ICR_ORECF_Msk|macro|USART_ICR_ORECF_Msk
DECL|USART_ICR_ORECF_Pos|macro|USART_ICR_ORECF_Pos
DECL|USART_ICR_ORECF|macro|USART_ICR_ORECF
DECL|USART_ICR_PECF_Msk|macro|USART_ICR_PECF_Msk
DECL|USART_ICR_PECF_Pos|macro|USART_ICR_PECF_Pos
DECL|USART_ICR_PECF|macro|USART_ICR_PECF
DECL|USART_ICR_RTOCF_Msk|macro|USART_ICR_RTOCF_Msk
DECL|USART_ICR_RTOCF_Pos|macro|USART_ICR_RTOCF_Pos
DECL|USART_ICR_RTOCF|macro|USART_ICR_RTOCF
DECL|USART_ICR_TCBGTCF_Msk|macro|USART_ICR_TCBGTCF_Msk
DECL|USART_ICR_TCBGTCF_Pos|macro|USART_ICR_TCBGTCF_Pos
DECL|USART_ICR_TCBGTCF|macro|USART_ICR_TCBGTCF
DECL|USART_ICR_TCCF_Msk|macro|USART_ICR_TCCF_Msk
DECL|USART_ICR_TCCF_Pos|macro|USART_ICR_TCCF_Pos
DECL|USART_ICR_TCCF|macro|USART_ICR_TCCF
DECL|USART_ISR_ABRE_Msk|macro|USART_ISR_ABRE_Msk
DECL|USART_ISR_ABRE_Pos|macro|USART_ISR_ABRE_Pos
DECL|USART_ISR_ABRE|macro|USART_ISR_ABRE
DECL|USART_ISR_ABRF_Msk|macro|USART_ISR_ABRF_Msk
DECL|USART_ISR_ABRF_Pos|macro|USART_ISR_ABRF_Pos
DECL|USART_ISR_ABRF|macro|USART_ISR_ABRF
DECL|USART_ISR_BUSY_Msk|macro|USART_ISR_BUSY_Msk
DECL|USART_ISR_BUSY_Pos|macro|USART_ISR_BUSY_Pos
DECL|USART_ISR_BUSY|macro|USART_ISR_BUSY
DECL|USART_ISR_CMF_Msk|macro|USART_ISR_CMF_Msk
DECL|USART_ISR_CMF_Pos|macro|USART_ISR_CMF_Pos
DECL|USART_ISR_CMF|macro|USART_ISR_CMF
DECL|USART_ISR_CTSIF_Msk|macro|USART_ISR_CTSIF_Msk
DECL|USART_ISR_CTSIF_Pos|macro|USART_ISR_CTSIF_Pos
DECL|USART_ISR_CTSIF|macro|USART_ISR_CTSIF
DECL|USART_ISR_CTS_Msk|macro|USART_ISR_CTS_Msk
DECL|USART_ISR_CTS_Pos|macro|USART_ISR_CTS_Pos
DECL|USART_ISR_CTS|macro|USART_ISR_CTS
DECL|USART_ISR_EOBF_Msk|macro|USART_ISR_EOBF_Msk
DECL|USART_ISR_EOBF_Pos|macro|USART_ISR_EOBF_Pos
DECL|USART_ISR_EOBF|macro|USART_ISR_EOBF
DECL|USART_ISR_FE_Msk|macro|USART_ISR_FE_Msk
DECL|USART_ISR_FE_Pos|macro|USART_ISR_FE_Pos
DECL|USART_ISR_FE|macro|USART_ISR_FE
DECL|USART_ISR_IDLE_Msk|macro|USART_ISR_IDLE_Msk
DECL|USART_ISR_IDLE_Pos|macro|USART_ISR_IDLE_Pos
DECL|USART_ISR_IDLE|macro|USART_ISR_IDLE
DECL|USART_ISR_LBDF_Msk|macro|USART_ISR_LBDF_Msk
DECL|USART_ISR_LBDF_Pos|macro|USART_ISR_LBDF_Pos
DECL|USART_ISR_LBDF|macro|USART_ISR_LBDF
DECL|USART_ISR_NE_Msk|macro|USART_ISR_NE_Msk
DECL|USART_ISR_NE_Pos|macro|USART_ISR_NE_Pos
DECL|USART_ISR_NE|macro|USART_ISR_NE
DECL|USART_ISR_ORE_Msk|macro|USART_ISR_ORE_Msk
DECL|USART_ISR_ORE_Pos|macro|USART_ISR_ORE_Pos
DECL|USART_ISR_ORE|macro|USART_ISR_ORE
DECL|USART_ISR_PE_Msk|macro|USART_ISR_PE_Msk
DECL|USART_ISR_PE_Pos|macro|USART_ISR_PE_Pos
DECL|USART_ISR_PE|macro|USART_ISR_PE
DECL|USART_ISR_RTOF_Msk|macro|USART_ISR_RTOF_Msk
DECL|USART_ISR_RTOF_Pos|macro|USART_ISR_RTOF_Pos
DECL|USART_ISR_RTOF|macro|USART_ISR_RTOF
DECL|USART_ISR_RWU_Msk|macro|USART_ISR_RWU_Msk
DECL|USART_ISR_RWU_Pos|macro|USART_ISR_RWU_Pos
DECL|USART_ISR_RWU|macro|USART_ISR_RWU
DECL|USART_ISR_RXNE_Msk|macro|USART_ISR_RXNE_Msk
DECL|USART_ISR_RXNE_Pos|macro|USART_ISR_RXNE_Pos
DECL|USART_ISR_RXNE|macro|USART_ISR_RXNE
DECL|USART_ISR_SBKF_Msk|macro|USART_ISR_SBKF_Msk
DECL|USART_ISR_SBKF_Pos|macro|USART_ISR_SBKF_Pos
DECL|USART_ISR_SBKF|macro|USART_ISR_SBKF
DECL|USART_ISR_TCBGT_Msk|macro|USART_ISR_TCBGT_Msk
DECL|USART_ISR_TCBGT_Pos|macro|USART_ISR_TCBGT_Pos
DECL|USART_ISR_TCBGT|macro|USART_ISR_TCBGT
DECL|USART_ISR_TC_Msk|macro|USART_ISR_TC_Msk
DECL|USART_ISR_TC_Pos|macro|USART_ISR_TC_Pos
DECL|USART_ISR_TC|macro|USART_ISR_TC
DECL|USART_ISR_TEACK_Msk|macro|USART_ISR_TEACK_Msk
DECL|USART_ISR_TEACK_Pos|macro|USART_ISR_TEACK_Pos
DECL|USART_ISR_TEACK|macro|USART_ISR_TEACK
DECL|USART_ISR_TXE_Msk|macro|USART_ISR_TXE_Msk
DECL|USART_ISR_TXE_Pos|macro|USART_ISR_TXE_Pos
DECL|USART_ISR_TXE|macro|USART_ISR_TXE
DECL|USART_RDR_RDR_Msk|macro|USART_RDR_RDR_Msk
DECL|USART_RDR_RDR_Pos|macro|USART_RDR_RDR_Pos
DECL|USART_RDR_RDR|macro|USART_RDR_RDR
DECL|USART_RQR_ABRRQ_Msk|macro|USART_RQR_ABRRQ_Msk
DECL|USART_RQR_ABRRQ_Pos|macro|USART_RQR_ABRRQ_Pos
DECL|USART_RQR_ABRRQ|macro|USART_RQR_ABRRQ
DECL|USART_RQR_MMRQ_Msk|macro|USART_RQR_MMRQ_Msk
DECL|USART_RQR_MMRQ_Pos|macro|USART_RQR_MMRQ_Pos
DECL|USART_RQR_MMRQ|macro|USART_RQR_MMRQ
DECL|USART_RQR_RXFRQ_Msk|macro|USART_RQR_RXFRQ_Msk
DECL|USART_RQR_RXFRQ_Pos|macro|USART_RQR_RXFRQ_Pos
DECL|USART_RQR_RXFRQ|macro|USART_RQR_RXFRQ
DECL|USART_RQR_SBKRQ_Msk|macro|USART_RQR_SBKRQ_Msk
DECL|USART_RQR_SBKRQ_Pos|macro|USART_RQR_SBKRQ_Pos
DECL|USART_RQR_SBKRQ|macro|USART_RQR_SBKRQ
DECL|USART_RQR_TXFRQ_Msk|macro|USART_RQR_TXFRQ_Msk
DECL|USART_RQR_TXFRQ_Pos|macro|USART_RQR_TXFRQ_Pos
DECL|USART_RQR_TXFRQ|macro|USART_RQR_TXFRQ
DECL|USART_RTOR_BLEN_Msk|macro|USART_RTOR_BLEN_Msk
DECL|USART_RTOR_BLEN_Pos|macro|USART_RTOR_BLEN_Pos
DECL|USART_RTOR_BLEN|macro|USART_RTOR_BLEN
DECL|USART_RTOR_RTO_Msk|macro|USART_RTOR_RTO_Msk
DECL|USART_RTOR_RTO_Pos|macro|USART_RTOR_RTO_Pos
DECL|USART_RTOR_RTO|macro|USART_RTOR_RTO
DECL|USART_TCBGT_SUPPORT|macro|USART_TCBGT_SUPPORT
DECL|USART_TDR_TDR_Msk|macro|USART_TDR_TDR_Msk
DECL|USART_TDR_TDR_Pos|macro|USART_TDR_TDR_Pos
DECL|USART_TDR_TDR|macro|USART_TDR_TDR
DECL|USART_TypeDef|typedef|} USART_TypeDef;
DECL|USB_OTG_BCNT_Msk|macro|USB_OTG_BCNT_Msk
DECL|USB_OTG_BCNT_Msk|macro|USB_OTG_BCNT_Msk
DECL|USB_OTG_BCNT_Pos|macro|USB_OTG_BCNT_Pos
DECL|USB_OTG_BCNT_Pos|macro|USB_OTG_BCNT_Pos
DECL|USB_OTG_BCNT|macro|USB_OTG_BCNT
DECL|USB_OTG_BCNT|macro|USB_OTG_BCNT
DECL|USB_OTG_CHNUM_0|macro|USB_OTG_CHNUM_0
DECL|USB_OTG_CHNUM_0|macro|USB_OTG_CHNUM_0
DECL|USB_OTG_CHNUM_1|macro|USB_OTG_CHNUM_1
DECL|USB_OTG_CHNUM_1|macro|USB_OTG_CHNUM_1
DECL|USB_OTG_CHNUM_2|macro|USB_OTG_CHNUM_2
DECL|USB_OTG_CHNUM_2|macro|USB_OTG_CHNUM_2
DECL|USB_OTG_CHNUM_3|macro|USB_OTG_CHNUM_3
DECL|USB_OTG_CHNUM_3|macro|USB_OTG_CHNUM_3
DECL|USB_OTG_CHNUM_Msk|macro|USB_OTG_CHNUM_Msk
DECL|USB_OTG_CHNUM_Msk|macro|USB_OTG_CHNUM_Msk
DECL|USB_OTG_CHNUM_Pos|macro|USB_OTG_CHNUM_Pos
DECL|USB_OTG_CHNUM_Pos|macro|USB_OTG_CHNUM_Pos
DECL|USB_OTG_CHNUM|macro|USB_OTG_CHNUM
DECL|USB_OTG_CHNUM|macro|USB_OTG_CHNUM
DECL|USB_OTG_CID_PRODUCT_ID_Msk|macro|USB_OTG_CID_PRODUCT_ID_Msk
DECL|USB_OTG_CID_PRODUCT_ID_Pos|macro|USB_OTG_CID_PRODUCT_ID_Pos
DECL|USB_OTG_CID_PRODUCT_ID|macro|USB_OTG_CID_PRODUCT_ID
DECL|USB_OTG_DAINTMSK_IEPM_Msk|macro|USB_OTG_DAINTMSK_IEPM_Msk
DECL|USB_OTG_DAINTMSK_IEPM_Pos|macro|USB_OTG_DAINTMSK_IEPM_Pos
DECL|USB_OTG_DAINTMSK_IEPM|macro|USB_OTG_DAINTMSK_IEPM
DECL|USB_OTG_DAINTMSK_OEPM_Msk|macro|USB_OTG_DAINTMSK_OEPM_Msk
DECL|USB_OTG_DAINTMSK_OEPM_Pos|macro|USB_OTG_DAINTMSK_OEPM_Pos
DECL|USB_OTG_DAINTMSK_OEPM|macro|USB_OTG_DAINTMSK_OEPM
DECL|USB_OTG_DAINT_IEPINT_Msk|macro|USB_OTG_DAINT_IEPINT_Msk
DECL|USB_OTG_DAINT_IEPINT_Pos|macro|USB_OTG_DAINT_IEPINT_Pos
DECL|USB_OTG_DAINT_IEPINT|macro|USB_OTG_DAINT_IEPINT
DECL|USB_OTG_DAINT_OEPINT_Msk|macro|USB_OTG_DAINT_OEPINT_Msk
DECL|USB_OTG_DAINT_OEPINT_Pos|macro|USB_OTG_DAINT_OEPINT_Pos
DECL|USB_OTG_DAINT_OEPINT|macro|USB_OTG_DAINT_OEPINT
DECL|USB_OTG_DCFG_DAD_0|macro|USB_OTG_DCFG_DAD_0
DECL|USB_OTG_DCFG_DAD_1|macro|USB_OTG_DCFG_DAD_1
DECL|USB_OTG_DCFG_DAD_2|macro|USB_OTG_DCFG_DAD_2
DECL|USB_OTG_DCFG_DAD_3|macro|USB_OTG_DCFG_DAD_3
DECL|USB_OTG_DCFG_DAD_4|macro|USB_OTG_DCFG_DAD_4
DECL|USB_OTG_DCFG_DAD_5|macro|USB_OTG_DCFG_DAD_5
DECL|USB_OTG_DCFG_DAD_6|macro|USB_OTG_DCFG_DAD_6
DECL|USB_OTG_DCFG_DAD_Msk|macro|USB_OTG_DCFG_DAD_Msk
DECL|USB_OTG_DCFG_DAD_Pos|macro|USB_OTG_DCFG_DAD_Pos
DECL|USB_OTG_DCFG_DAD|macro|USB_OTG_DCFG_DAD
DECL|USB_OTG_DCFG_DSPD_0|macro|USB_OTG_DCFG_DSPD_0
DECL|USB_OTG_DCFG_DSPD_1|macro|USB_OTG_DCFG_DSPD_1
DECL|USB_OTG_DCFG_DSPD_Msk|macro|USB_OTG_DCFG_DSPD_Msk
DECL|USB_OTG_DCFG_DSPD_Pos|macro|USB_OTG_DCFG_DSPD_Pos
DECL|USB_OTG_DCFG_DSPD|macro|USB_OTG_DCFG_DSPD
DECL|USB_OTG_DCFG_NZLSOHSK_Msk|macro|USB_OTG_DCFG_NZLSOHSK_Msk
DECL|USB_OTG_DCFG_NZLSOHSK_Pos|macro|USB_OTG_DCFG_NZLSOHSK_Pos
DECL|USB_OTG_DCFG_NZLSOHSK|macro|USB_OTG_DCFG_NZLSOHSK
DECL|USB_OTG_DCFG_PERSCHIVL_0|macro|USB_OTG_DCFG_PERSCHIVL_0
DECL|USB_OTG_DCFG_PERSCHIVL_1|macro|USB_OTG_DCFG_PERSCHIVL_1
DECL|USB_OTG_DCFG_PERSCHIVL_Msk|macro|USB_OTG_DCFG_PERSCHIVL_Msk
DECL|USB_OTG_DCFG_PERSCHIVL_Pos|macro|USB_OTG_DCFG_PERSCHIVL_Pos
DECL|USB_OTG_DCFG_PERSCHIVL|macro|USB_OTG_DCFG_PERSCHIVL
DECL|USB_OTG_DCFG_PFIVL_0|macro|USB_OTG_DCFG_PFIVL_0
DECL|USB_OTG_DCFG_PFIVL_1|macro|USB_OTG_DCFG_PFIVL_1
DECL|USB_OTG_DCFG_PFIVL_Msk|macro|USB_OTG_DCFG_PFIVL_Msk
DECL|USB_OTG_DCFG_PFIVL_Pos|macro|USB_OTG_DCFG_PFIVL_Pos
DECL|USB_OTG_DCFG_PFIVL|macro|USB_OTG_DCFG_PFIVL
DECL|USB_OTG_DCTL_CGINAK_Msk|macro|USB_OTG_DCTL_CGINAK_Msk
DECL|USB_OTG_DCTL_CGINAK_Pos|macro|USB_OTG_DCTL_CGINAK_Pos
DECL|USB_OTG_DCTL_CGINAK|macro|USB_OTG_DCTL_CGINAK
DECL|USB_OTG_DCTL_CGONAK_Msk|macro|USB_OTG_DCTL_CGONAK_Msk
DECL|USB_OTG_DCTL_CGONAK_Pos|macro|USB_OTG_DCTL_CGONAK_Pos
DECL|USB_OTG_DCTL_CGONAK|macro|USB_OTG_DCTL_CGONAK
DECL|USB_OTG_DCTL_GINSTS_Msk|macro|USB_OTG_DCTL_GINSTS_Msk
DECL|USB_OTG_DCTL_GINSTS_Pos|macro|USB_OTG_DCTL_GINSTS_Pos
DECL|USB_OTG_DCTL_GINSTS|macro|USB_OTG_DCTL_GINSTS
DECL|USB_OTG_DCTL_GONSTS_Msk|macro|USB_OTG_DCTL_GONSTS_Msk
DECL|USB_OTG_DCTL_GONSTS_Pos|macro|USB_OTG_DCTL_GONSTS_Pos
DECL|USB_OTG_DCTL_GONSTS|macro|USB_OTG_DCTL_GONSTS
DECL|USB_OTG_DCTL_POPRGDNE_Msk|macro|USB_OTG_DCTL_POPRGDNE_Msk
DECL|USB_OTG_DCTL_POPRGDNE_Pos|macro|USB_OTG_DCTL_POPRGDNE_Pos
DECL|USB_OTG_DCTL_POPRGDNE|macro|USB_OTG_DCTL_POPRGDNE
DECL|USB_OTG_DCTL_RWUSIG_Msk|macro|USB_OTG_DCTL_RWUSIG_Msk
DECL|USB_OTG_DCTL_RWUSIG_Pos|macro|USB_OTG_DCTL_RWUSIG_Pos
DECL|USB_OTG_DCTL_RWUSIG|macro|USB_OTG_DCTL_RWUSIG
DECL|USB_OTG_DCTL_SDIS_Msk|macro|USB_OTG_DCTL_SDIS_Msk
DECL|USB_OTG_DCTL_SDIS_Pos|macro|USB_OTG_DCTL_SDIS_Pos
DECL|USB_OTG_DCTL_SDIS|macro|USB_OTG_DCTL_SDIS
DECL|USB_OTG_DCTL_SGINAK_Msk|macro|USB_OTG_DCTL_SGINAK_Msk
DECL|USB_OTG_DCTL_SGINAK_Pos|macro|USB_OTG_DCTL_SGINAK_Pos
DECL|USB_OTG_DCTL_SGINAK|macro|USB_OTG_DCTL_SGINAK
DECL|USB_OTG_DCTL_SGONAK_Msk|macro|USB_OTG_DCTL_SGONAK_Msk
DECL|USB_OTG_DCTL_SGONAK_Pos|macro|USB_OTG_DCTL_SGONAK_Pos
DECL|USB_OTG_DCTL_SGONAK|macro|USB_OTG_DCTL_SGONAK
DECL|USB_OTG_DCTL_TCTL_0|macro|USB_OTG_DCTL_TCTL_0
DECL|USB_OTG_DCTL_TCTL_1|macro|USB_OTG_DCTL_TCTL_1
DECL|USB_OTG_DCTL_TCTL_2|macro|USB_OTG_DCTL_TCTL_2
DECL|USB_OTG_DCTL_TCTL_Msk|macro|USB_OTG_DCTL_TCTL_Msk
DECL|USB_OTG_DCTL_TCTL_Pos|macro|USB_OTG_DCTL_TCTL_Pos
DECL|USB_OTG_DCTL_TCTL|macro|USB_OTG_DCTL_TCTL
DECL|USB_OTG_DEACHINTMSK_IEP1INTM_Msk|macro|USB_OTG_DEACHINTMSK_IEP1INTM_Msk
DECL|USB_OTG_DEACHINTMSK_IEP1INTM_Pos|macro|USB_OTG_DEACHINTMSK_IEP1INTM_Pos
DECL|USB_OTG_DEACHINTMSK_IEP1INTM|macro|USB_OTG_DEACHINTMSK_IEP1INTM
DECL|USB_OTG_DEACHINTMSK_OEP1INTM_Msk|macro|USB_OTG_DEACHINTMSK_OEP1INTM_Msk
DECL|USB_OTG_DEACHINTMSK_OEP1INTM_Pos|macro|USB_OTG_DEACHINTMSK_OEP1INTM_Pos
DECL|USB_OTG_DEACHINTMSK_OEP1INTM|macro|USB_OTG_DEACHINTMSK_OEP1INTM
DECL|USB_OTG_DEACHINT_IEP1INT_Msk|macro|USB_OTG_DEACHINT_IEP1INT_Msk
DECL|USB_OTG_DEACHINT_IEP1INT_Pos|macro|USB_OTG_DEACHINT_IEP1INT_Pos
DECL|USB_OTG_DEACHINT_IEP1INT|macro|USB_OTG_DEACHINT_IEP1INT
DECL|USB_OTG_DEACHINT_OEP1INT_Msk|macro|USB_OTG_DEACHINT_OEP1INT_Msk
DECL|USB_OTG_DEACHINT_OEP1INT_Pos|macro|USB_OTG_DEACHINT_OEP1INT_Pos
DECL|USB_OTG_DEACHINT_OEP1INT|macro|USB_OTG_DEACHINT_OEP1INT
DECL|USB_OTG_DEVICE_BASE|macro|USB_OTG_DEVICE_BASE
DECL|USB_OTG_DIEPCTL_CNAK_Msk|macro|USB_OTG_DIEPCTL_CNAK_Msk
DECL|USB_OTG_DIEPCTL_CNAK_Pos|macro|USB_OTG_DIEPCTL_CNAK_Pos
DECL|USB_OTG_DIEPCTL_CNAK|macro|USB_OTG_DIEPCTL_CNAK
DECL|USB_OTG_DIEPCTL_EONUM_DPID_Msk|macro|USB_OTG_DIEPCTL_EONUM_DPID_Msk
DECL|USB_OTG_DIEPCTL_EONUM_DPID_Pos|macro|USB_OTG_DIEPCTL_EONUM_DPID_Pos
DECL|USB_OTG_DIEPCTL_EONUM_DPID|macro|USB_OTG_DIEPCTL_EONUM_DPID
DECL|USB_OTG_DIEPCTL_EPDIS_Msk|macro|USB_OTG_DIEPCTL_EPDIS_Msk
DECL|USB_OTG_DIEPCTL_EPDIS_Pos|macro|USB_OTG_DIEPCTL_EPDIS_Pos
DECL|USB_OTG_DIEPCTL_EPDIS|macro|USB_OTG_DIEPCTL_EPDIS
DECL|USB_OTG_DIEPCTL_EPENA_Msk|macro|USB_OTG_DIEPCTL_EPENA_Msk
DECL|USB_OTG_DIEPCTL_EPENA_Pos|macro|USB_OTG_DIEPCTL_EPENA_Pos
DECL|USB_OTG_DIEPCTL_EPENA|macro|USB_OTG_DIEPCTL_EPENA
DECL|USB_OTG_DIEPCTL_EPTYP_0|macro|USB_OTG_DIEPCTL_EPTYP_0
DECL|USB_OTG_DIEPCTL_EPTYP_1|macro|USB_OTG_DIEPCTL_EPTYP_1
DECL|USB_OTG_DIEPCTL_EPTYP_Msk|macro|USB_OTG_DIEPCTL_EPTYP_Msk
DECL|USB_OTG_DIEPCTL_EPTYP_Pos|macro|USB_OTG_DIEPCTL_EPTYP_Pos
DECL|USB_OTG_DIEPCTL_EPTYP|macro|USB_OTG_DIEPCTL_EPTYP
DECL|USB_OTG_DIEPCTL_MPSIZ_Msk|macro|USB_OTG_DIEPCTL_MPSIZ_Msk
DECL|USB_OTG_DIEPCTL_MPSIZ_Pos|macro|USB_OTG_DIEPCTL_MPSIZ_Pos
DECL|USB_OTG_DIEPCTL_MPSIZ|macro|USB_OTG_DIEPCTL_MPSIZ
DECL|USB_OTG_DIEPCTL_NAKSTS_Msk|macro|USB_OTG_DIEPCTL_NAKSTS_Msk
DECL|USB_OTG_DIEPCTL_NAKSTS_Pos|macro|USB_OTG_DIEPCTL_NAKSTS_Pos
DECL|USB_OTG_DIEPCTL_NAKSTS|macro|USB_OTG_DIEPCTL_NAKSTS
DECL|USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk|macro|USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk
DECL|USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos|macro|USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos
DECL|USB_OTG_DIEPCTL_SD0PID_SEVNFRM|macro|USB_OTG_DIEPCTL_SD0PID_SEVNFRM
DECL|USB_OTG_DIEPCTL_SNAK_Msk|macro|USB_OTG_DIEPCTL_SNAK_Msk
DECL|USB_OTG_DIEPCTL_SNAK_Pos|macro|USB_OTG_DIEPCTL_SNAK_Pos
DECL|USB_OTG_DIEPCTL_SNAK|macro|USB_OTG_DIEPCTL_SNAK
DECL|USB_OTG_DIEPCTL_SODDFRM_Msk|macro|USB_OTG_DIEPCTL_SODDFRM_Msk
DECL|USB_OTG_DIEPCTL_SODDFRM_Pos|macro|USB_OTG_DIEPCTL_SODDFRM_Pos
DECL|USB_OTG_DIEPCTL_SODDFRM|macro|USB_OTG_DIEPCTL_SODDFRM
DECL|USB_OTG_DIEPCTL_STALL_Msk|macro|USB_OTG_DIEPCTL_STALL_Msk
DECL|USB_OTG_DIEPCTL_STALL_Pos|macro|USB_OTG_DIEPCTL_STALL_Pos
DECL|USB_OTG_DIEPCTL_STALL|macro|USB_OTG_DIEPCTL_STALL
DECL|USB_OTG_DIEPCTL_TXFNUM_0|macro|USB_OTG_DIEPCTL_TXFNUM_0
DECL|USB_OTG_DIEPCTL_TXFNUM_1|macro|USB_OTG_DIEPCTL_TXFNUM_1
DECL|USB_OTG_DIEPCTL_TXFNUM_2|macro|USB_OTG_DIEPCTL_TXFNUM_2
DECL|USB_OTG_DIEPCTL_TXFNUM_3|macro|USB_OTG_DIEPCTL_TXFNUM_3
DECL|USB_OTG_DIEPCTL_TXFNUM_Msk|macro|USB_OTG_DIEPCTL_TXFNUM_Msk
DECL|USB_OTG_DIEPCTL_TXFNUM_Pos|macro|USB_OTG_DIEPCTL_TXFNUM_Pos
DECL|USB_OTG_DIEPCTL_TXFNUM|macro|USB_OTG_DIEPCTL_TXFNUM
DECL|USB_OTG_DIEPCTL_USBAEP_Msk|macro|USB_OTG_DIEPCTL_USBAEP_Msk
DECL|USB_OTG_DIEPCTL_USBAEP_Pos|macro|USB_OTG_DIEPCTL_USBAEP_Pos
DECL|USB_OTG_DIEPCTL_USBAEP|macro|USB_OTG_DIEPCTL_USBAEP
DECL|USB_OTG_DIEPDMA_DMAADDR_Msk|macro|USB_OTG_DIEPDMA_DMAADDR_Msk
DECL|USB_OTG_DIEPDMA_DMAADDR_Pos|macro|USB_OTG_DIEPDMA_DMAADDR_Pos
DECL|USB_OTG_DIEPDMA_DMAADDR|macro|USB_OTG_DIEPDMA_DMAADDR
DECL|USB_OTG_DIEPEACHMSK1_BIM_Msk|macro|USB_OTG_DIEPEACHMSK1_BIM_Msk
DECL|USB_OTG_DIEPEACHMSK1_BIM_Pos|macro|USB_OTG_DIEPEACHMSK1_BIM_Pos
DECL|USB_OTG_DIEPEACHMSK1_BIM|macro|USB_OTG_DIEPEACHMSK1_BIM
DECL|USB_OTG_DIEPEACHMSK1_EPDM_Msk|macro|USB_OTG_DIEPEACHMSK1_EPDM_Msk
DECL|USB_OTG_DIEPEACHMSK1_EPDM_Pos|macro|USB_OTG_DIEPEACHMSK1_EPDM_Pos
DECL|USB_OTG_DIEPEACHMSK1_EPDM|macro|USB_OTG_DIEPEACHMSK1_EPDM
DECL|USB_OTG_DIEPEACHMSK1_INEPNEM_Msk|macro|USB_OTG_DIEPEACHMSK1_INEPNEM_Msk
DECL|USB_OTG_DIEPEACHMSK1_INEPNEM_Pos|macro|USB_OTG_DIEPEACHMSK1_INEPNEM_Pos
DECL|USB_OTG_DIEPEACHMSK1_INEPNEM|macro|USB_OTG_DIEPEACHMSK1_INEPNEM
DECL|USB_OTG_DIEPEACHMSK1_INEPNMM_Msk|macro|USB_OTG_DIEPEACHMSK1_INEPNMM_Msk
DECL|USB_OTG_DIEPEACHMSK1_INEPNMM_Pos|macro|USB_OTG_DIEPEACHMSK1_INEPNMM_Pos
DECL|USB_OTG_DIEPEACHMSK1_INEPNMM|macro|USB_OTG_DIEPEACHMSK1_INEPNMM
DECL|USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk|macro|USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk
DECL|USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos|macro|USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos
DECL|USB_OTG_DIEPEACHMSK1_ITTXFEMSK|macro|USB_OTG_DIEPEACHMSK1_ITTXFEMSK
DECL|USB_OTG_DIEPEACHMSK1_NAKM_Msk|macro|USB_OTG_DIEPEACHMSK1_NAKM_Msk
DECL|USB_OTG_DIEPEACHMSK1_NAKM_Pos|macro|USB_OTG_DIEPEACHMSK1_NAKM_Pos
DECL|USB_OTG_DIEPEACHMSK1_NAKM|macro|USB_OTG_DIEPEACHMSK1_NAKM
DECL|USB_OTG_DIEPEACHMSK1_TOM_Msk|macro|USB_OTG_DIEPEACHMSK1_TOM_Msk
DECL|USB_OTG_DIEPEACHMSK1_TOM_Pos|macro|USB_OTG_DIEPEACHMSK1_TOM_Pos
DECL|USB_OTG_DIEPEACHMSK1_TOM|macro|USB_OTG_DIEPEACHMSK1_TOM
DECL|USB_OTG_DIEPEACHMSK1_TXFURM_Msk|macro|USB_OTG_DIEPEACHMSK1_TXFURM_Msk
DECL|USB_OTG_DIEPEACHMSK1_TXFURM_Pos|macro|USB_OTG_DIEPEACHMSK1_TXFURM_Pos
DECL|USB_OTG_DIEPEACHMSK1_TXFURM|macro|USB_OTG_DIEPEACHMSK1_TXFURM
DECL|USB_OTG_DIEPEACHMSK1_XFRCM_Msk|macro|USB_OTG_DIEPEACHMSK1_XFRCM_Msk
DECL|USB_OTG_DIEPEACHMSK1_XFRCM_Pos|macro|USB_OTG_DIEPEACHMSK1_XFRCM_Pos
DECL|USB_OTG_DIEPEACHMSK1_XFRCM|macro|USB_OTG_DIEPEACHMSK1_XFRCM
DECL|USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk|macro|USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk
DECL|USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos|macro|USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos
DECL|USB_OTG_DIEPEMPMSK_INEPTXFEM|macro|USB_OTG_DIEPEMPMSK_INEPTXFEM
DECL|USB_OTG_DIEPINT_BERR_Msk|macro|USB_OTG_DIEPINT_BERR_Msk
DECL|USB_OTG_DIEPINT_BERR_Pos|macro|USB_OTG_DIEPINT_BERR_Pos
DECL|USB_OTG_DIEPINT_BERR|macro|USB_OTG_DIEPINT_BERR
DECL|USB_OTG_DIEPINT_BNA_Msk|macro|USB_OTG_DIEPINT_BNA_Msk
DECL|USB_OTG_DIEPINT_BNA_Pos|macro|USB_OTG_DIEPINT_BNA_Pos
DECL|USB_OTG_DIEPINT_BNA|macro|USB_OTG_DIEPINT_BNA
DECL|USB_OTG_DIEPINT_EPDISD_Msk|macro|USB_OTG_DIEPINT_EPDISD_Msk
DECL|USB_OTG_DIEPINT_EPDISD_Pos|macro|USB_OTG_DIEPINT_EPDISD_Pos
DECL|USB_OTG_DIEPINT_EPDISD|macro|USB_OTG_DIEPINT_EPDISD
DECL|USB_OTG_DIEPINT_INEPNE_Msk|macro|USB_OTG_DIEPINT_INEPNE_Msk
DECL|USB_OTG_DIEPINT_INEPNE_Pos|macro|USB_OTG_DIEPINT_INEPNE_Pos
DECL|USB_OTG_DIEPINT_INEPNE|macro|USB_OTG_DIEPINT_INEPNE
DECL|USB_OTG_DIEPINT_ITTXFE_Msk|macro|USB_OTG_DIEPINT_ITTXFE_Msk
DECL|USB_OTG_DIEPINT_ITTXFE_Pos|macro|USB_OTG_DIEPINT_ITTXFE_Pos
DECL|USB_OTG_DIEPINT_ITTXFE|macro|USB_OTG_DIEPINT_ITTXFE
DECL|USB_OTG_DIEPINT_NAK_Msk|macro|USB_OTG_DIEPINT_NAK_Msk
DECL|USB_OTG_DIEPINT_NAK_Pos|macro|USB_OTG_DIEPINT_NAK_Pos
DECL|USB_OTG_DIEPINT_NAK|macro|USB_OTG_DIEPINT_NAK
DECL|USB_OTG_DIEPINT_PKTDRPSTS_Msk|macro|USB_OTG_DIEPINT_PKTDRPSTS_Msk
DECL|USB_OTG_DIEPINT_PKTDRPSTS_Pos|macro|USB_OTG_DIEPINT_PKTDRPSTS_Pos
DECL|USB_OTG_DIEPINT_PKTDRPSTS|macro|USB_OTG_DIEPINT_PKTDRPSTS
DECL|USB_OTG_DIEPINT_TOC_Msk|macro|USB_OTG_DIEPINT_TOC_Msk
DECL|USB_OTG_DIEPINT_TOC_Pos|macro|USB_OTG_DIEPINT_TOC_Pos
DECL|USB_OTG_DIEPINT_TOC|macro|USB_OTG_DIEPINT_TOC
DECL|USB_OTG_DIEPINT_TXFE_Msk|macro|USB_OTG_DIEPINT_TXFE_Msk
DECL|USB_OTG_DIEPINT_TXFE_Pos|macro|USB_OTG_DIEPINT_TXFE_Pos
DECL|USB_OTG_DIEPINT_TXFE|macro|USB_OTG_DIEPINT_TXFE
DECL|USB_OTG_DIEPINT_TXFIFOUDRN_Msk|macro|USB_OTG_DIEPINT_TXFIFOUDRN_Msk
DECL|USB_OTG_DIEPINT_TXFIFOUDRN_Pos|macro|USB_OTG_DIEPINT_TXFIFOUDRN_Pos
DECL|USB_OTG_DIEPINT_TXFIFOUDRN|macro|USB_OTG_DIEPINT_TXFIFOUDRN
DECL|USB_OTG_DIEPINT_XFRC_Msk|macro|USB_OTG_DIEPINT_XFRC_Msk
DECL|USB_OTG_DIEPINT_XFRC_Pos|macro|USB_OTG_DIEPINT_XFRC_Pos
DECL|USB_OTG_DIEPINT_XFRC|macro|USB_OTG_DIEPINT_XFRC
DECL|USB_OTG_DIEPMSK_BIM_Msk|macro|USB_OTG_DIEPMSK_BIM_Msk
DECL|USB_OTG_DIEPMSK_BIM_Pos|macro|USB_OTG_DIEPMSK_BIM_Pos
DECL|USB_OTG_DIEPMSK_BIM|macro|USB_OTG_DIEPMSK_BIM
DECL|USB_OTG_DIEPMSK_EPDM_Msk|macro|USB_OTG_DIEPMSK_EPDM_Msk
DECL|USB_OTG_DIEPMSK_EPDM_Pos|macro|USB_OTG_DIEPMSK_EPDM_Pos
DECL|USB_OTG_DIEPMSK_EPDM|macro|USB_OTG_DIEPMSK_EPDM
DECL|USB_OTG_DIEPMSK_INEPNEM_Msk|macro|USB_OTG_DIEPMSK_INEPNEM_Msk
DECL|USB_OTG_DIEPMSK_INEPNEM_Pos|macro|USB_OTG_DIEPMSK_INEPNEM_Pos
DECL|USB_OTG_DIEPMSK_INEPNEM|macro|USB_OTG_DIEPMSK_INEPNEM
DECL|USB_OTG_DIEPMSK_INEPNMM_Msk|macro|USB_OTG_DIEPMSK_INEPNMM_Msk
DECL|USB_OTG_DIEPMSK_INEPNMM_Pos|macro|USB_OTG_DIEPMSK_INEPNMM_Pos
DECL|USB_OTG_DIEPMSK_INEPNMM|macro|USB_OTG_DIEPMSK_INEPNMM
DECL|USB_OTG_DIEPMSK_ITTXFEMSK_Msk|macro|USB_OTG_DIEPMSK_ITTXFEMSK_Msk
DECL|USB_OTG_DIEPMSK_ITTXFEMSK_Pos|macro|USB_OTG_DIEPMSK_ITTXFEMSK_Pos
DECL|USB_OTG_DIEPMSK_ITTXFEMSK|macro|USB_OTG_DIEPMSK_ITTXFEMSK
DECL|USB_OTG_DIEPMSK_TOM_Msk|macro|USB_OTG_DIEPMSK_TOM_Msk
DECL|USB_OTG_DIEPMSK_TOM_Pos|macro|USB_OTG_DIEPMSK_TOM_Pos
DECL|USB_OTG_DIEPMSK_TOM|macro|USB_OTG_DIEPMSK_TOM
DECL|USB_OTG_DIEPMSK_TXFURM_Msk|macro|USB_OTG_DIEPMSK_TXFURM_Msk
DECL|USB_OTG_DIEPMSK_TXFURM_Pos|macro|USB_OTG_DIEPMSK_TXFURM_Pos
DECL|USB_OTG_DIEPMSK_TXFURM|macro|USB_OTG_DIEPMSK_TXFURM
DECL|USB_OTG_DIEPMSK_XFRCM_Msk|macro|USB_OTG_DIEPMSK_XFRCM_Msk
DECL|USB_OTG_DIEPMSK_XFRCM_Pos|macro|USB_OTG_DIEPMSK_XFRCM_Pos
DECL|USB_OTG_DIEPMSK_XFRCM|macro|USB_OTG_DIEPMSK_XFRCM
DECL|USB_OTG_DIEPTSIZ_MULCNT_Msk|macro|USB_OTG_DIEPTSIZ_MULCNT_Msk
DECL|USB_OTG_DIEPTSIZ_MULCNT_Pos|macro|USB_OTG_DIEPTSIZ_MULCNT_Pos
DECL|USB_OTG_DIEPTSIZ_MULCNT|macro|USB_OTG_DIEPTSIZ_MULCNT
DECL|USB_OTG_DIEPTSIZ_PKTCNT_Msk|macro|USB_OTG_DIEPTSIZ_PKTCNT_Msk
DECL|USB_OTG_DIEPTSIZ_PKTCNT_Pos|macro|USB_OTG_DIEPTSIZ_PKTCNT_Pos
DECL|USB_OTG_DIEPTSIZ_PKTCNT|macro|USB_OTG_DIEPTSIZ_PKTCNT
DECL|USB_OTG_DIEPTSIZ_XFRSIZ_Msk|macro|USB_OTG_DIEPTSIZ_XFRSIZ_Msk
DECL|USB_OTG_DIEPTSIZ_XFRSIZ_Pos|macro|USB_OTG_DIEPTSIZ_XFRSIZ_Pos
DECL|USB_OTG_DIEPTSIZ_XFRSIZ|macro|USB_OTG_DIEPTSIZ_XFRSIZ
DECL|USB_OTG_DIEPTXF_INEPTXFD_Msk|macro|USB_OTG_DIEPTXF_INEPTXFD_Msk
DECL|USB_OTG_DIEPTXF_INEPTXFD_Pos|macro|USB_OTG_DIEPTXF_INEPTXFD_Pos
DECL|USB_OTG_DIEPTXF_INEPTXFD|macro|USB_OTG_DIEPTXF_INEPTXFD
DECL|USB_OTG_DIEPTXF_INEPTXSA_Msk|macro|USB_OTG_DIEPTXF_INEPTXSA_Msk
DECL|USB_OTG_DIEPTXF_INEPTXSA_Pos|macro|USB_OTG_DIEPTXF_INEPTXSA_Pos
DECL|USB_OTG_DIEPTXF_INEPTXSA|macro|USB_OTG_DIEPTXF_INEPTXSA
DECL|USB_OTG_DOEPCTL_CNAK_Msk|macro|USB_OTG_DOEPCTL_CNAK_Msk
DECL|USB_OTG_DOEPCTL_CNAK_Pos|macro|USB_OTG_DOEPCTL_CNAK_Pos
DECL|USB_OTG_DOEPCTL_CNAK|macro|USB_OTG_DOEPCTL_CNAK
DECL|USB_OTG_DOEPCTL_EPDIS_Msk|macro|USB_OTG_DOEPCTL_EPDIS_Msk
DECL|USB_OTG_DOEPCTL_EPDIS_Pos|macro|USB_OTG_DOEPCTL_EPDIS_Pos
DECL|USB_OTG_DOEPCTL_EPDIS|macro|USB_OTG_DOEPCTL_EPDIS
DECL|USB_OTG_DOEPCTL_EPENA_Msk|macro|USB_OTG_DOEPCTL_EPENA_Msk
DECL|USB_OTG_DOEPCTL_EPENA_Pos|macro|USB_OTG_DOEPCTL_EPENA_Pos
DECL|USB_OTG_DOEPCTL_EPENA|macro|USB_OTG_DOEPCTL_EPENA
DECL|USB_OTG_DOEPCTL_EPTYP_0|macro|USB_OTG_DOEPCTL_EPTYP_0
DECL|USB_OTG_DOEPCTL_EPTYP_1|macro|USB_OTG_DOEPCTL_EPTYP_1
DECL|USB_OTG_DOEPCTL_EPTYP_Msk|macro|USB_OTG_DOEPCTL_EPTYP_Msk
DECL|USB_OTG_DOEPCTL_EPTYP_Pos|macro|USB_OTG_DOEPCTL_EPTYP_Pos
DECL|USB_OTG_DOEPCTL_EPTYP|macro|USB_OTG_DOEPCTL_EPTYP
DECL|USB_OTG_DOEPCTL_MPSIZ_Msk|macro|USB_OTG_DOEPCTL_MPSIZ_Msk
DECL|USB_OTG_DOEPCTL_MPSIZ_Pos|macro|USB_OTG_DOEPCTL_MPSIZ_Pos
DECL|USB_OTG_DOEPCTL_MPSIZ|macro|USB_OTG_DOEPCTL_MPSIZ
DECL|USB_OTG_DOEPCTL_NAKSTS_Msk|macro|USB_OTG_DOEPCTL_NAKSTS_Msk
DECL|USB_OTG_DOEPCTL_NAKSTS_Pos|macro|USB_OTG_DOEPCTL_NAKSTS_Pos
DECL|USB_OTG_DOEPCTL_NAKSTS|macro|USB_OTG_DOEPCTL_NAKSTS
DECL|USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk|macro|USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk
DECL|USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos|macro|USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos
DECL|USB_OTG_DOEPCTL_SD0PID_SEVNFRM|macro|USB_OTG_DOEPCTL_SD0PID_SEVNFRM
DECL|USB_OTG_DOEPCTL_SNAK_Msk|macro|USB_OTG_DOEPCTL_SNAK_Msk
DECL|USB_OTG_DOEPCTL_SNAK_Pos|macro|USB_OTG_DOEPCTL_SNAK_Pos
DECL|USB_OTG_DOEPCTL_SNAK|macro|USB_OTG_DOEPCTL_SNAK
DECL|USB_OTG_DOEPCTL_SNPM_Msk|macro|USB_OTG_DOEPCTL_SNPM_Msk
DECL|USB_OTG_DOEPCTL_SNPM_Pos|macro|USB_OTG_DOEPCTL_SNPM_Pos
DECL|USB_OTG_DOEPCTL_SNPM|macro|USB_OTG_DOEPCTL_SNPM
DECL|USB_OTG_DOEPCTL_SODDFRM_Msk|macro|USB_OTG_DOEPCTL_SODDFRM_Msk
DECL|USB_OTG_DOEPCTL_SODDFRM_Pos|macro|USB_OTG_DOEPCTL_SODDFRM_Pos
DECL|USB_OTG_DOEPCTL_SODDFRM|macro|USB_OTG_DOEPCTL_SODDFRM
DECL|USB_OTG_DOEPCTL_STALL_Msk|macro|USB_OTG_DOEPCTL_STALL_Msk
DECL|USB_OTG_DOEPCTL_STALL_Pos|macro|USB_OTG_DOEPCTL_STALL_Pos
DECL|USB_OTG_DOEPCTL_STALL|macro|USB_OTG_DOEPCTL_STALL
DECL|USB_OTG_DOEPCTL_USBAEP_Msk|macro|USB_OTG_DOEPCTL_USBAEP_Msk
DECL|USB_OTG_DOEPCTL_USBAEP_Pos|macro|USB_OTG_DOEPCTL_USBAEP_Pos
DECL|USB_OTG_DOEPCTL_USBAEP|macro|USB_OTG_DOEPCTL_USBAEP
DECL|USB_OTG_DOEPEACHMSK1_BERRM_Msk|macro|USB_OTG_DOEPEACHMSK1_BERRM_Msk
DECL|USB_OTG_DOEPEACHMSK1_BERRM_Pos|macro|USB_OTG_DOEPEACHMSK1_BERRM_Pos
DECL|USB_OTG_DOEPEACHMSK1_BERRM|macro|USB_OTG_DOEPEACHMSK1_BERRM
DECL|USB_OTG_DOEPEACHMSK1_BIM_Msk|macro|USB_OTG_DOEPEACHMSK1_BIM_Msk
DECL|USB_OTG_DOEPEACHMSK1_BIM_Pos|macro|USB_OTG_DOEPEACHMSK1_BIM_Pos
DECL|USB_OTG_DOEPEACHMSK1_BIM|macro|USB_OTG_DOEPEACHMSK1_BIM
DECL|USB_OTG_DOEPEACHMSK1_EPDM_Msk|macro|USB_OTG_DOEPEACHMSK1_EPDM_Msk
DECL|USB_OTG_DOEPEACHMSK1_EPDM_Pos|macro|USB_OTG_DOEPEACHMSK1_EPDM_Pos
DECL|USB_OTG_DOEPEACHMSK1_EPDM|macro|USB_OTG_DOEPEACHMSK1_EPDM
DECL|USB_OTG_DOEPEACHMSK1_INEPNEM_Msk|macro|USB_OTG_DOEPEACHMSK1_INEPNEM_Msk
DECL|USB_OTG_DOEPEACHMSK1_INEPNEM_Pos|macro|USB_OTG_DOEPEACHMSK1_INEPNEM_Pos
DECL|USB_OTG_DOEPEACHMSK1_INEPNEM|macro|USB_OTG_DOEPEACHMSK1_INEPNEM
DECL|USB_OTG_DOEPEACHMSK1_INEPNMM_Msk|macro|USB_OTG_DOEPEACHMSK1_INEPNMM_Msk
DECL|USB_OTG_DOEPEACHMSK1_INEPNMM_Pos|macro|USB_OTG_DOEPEACHMSK1_INEPNMM_Pos
DECL|USB_OTG_DOEPEACHMSK1_INEPNMM|macro|USB_OTG_DOEPEACHMSK1_INEPNMM
DECL|USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk|macro|USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk
DECL|USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos|macro|USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos
DECL|USB_OTG_DOEPEACHMSK1_ITTXFEMSK|macro|USB_OTG_DOEPEACHMSK1_ITTXFEMSK
DECL|USB_OTG_DOEPEACHMSK1_NAKM_Msk|macro|USB_OTG_DOEPEACHMSK1_NAKM_Msk
DECL|USB_OTG_DOEPEACHMSK1_NAKM_Pos|macro|USB_OTG_DOEPEACHMSK1_NAKM_Pos
DECL|USB_OTG_DOEPEACHMSK1_NAKM|macro|USB_OTG_DOEPEACHMSK1_NAKM
DECL|USB_OTG_DOEPEACHMSK1_NYETM_Msk|macro|USB_OTG_DOEPEACHMSK1_NYETM_Msk
DECL|USB_OTG_DOEPEACHMSK1_NYETM_Pos|macro|USB_OTG_DOEPEACHMSK1_NYETM_Pos
DECL|USB_OTG_DOEPEACHMSK1_NYETM|macro|USB_OTG_DOEPEACHMSK1_NYETM
DECL|USB_OTG_DOEPEACHMSK1_TOM_Msk|macro|USB_OTG_DOEPEACHMSK1_TOM_Msk
DECL|USB_OTG_DOEPEACHMSK1_TOM_Pos|macro|USB_OTG_DOEPEACHMSK1_TOM_Pos
DECL|USB_OTG_DOEPEACHMSK1_TOM|macro|USB_OTG_DOEPEACHMSK1_TOM
DECL|USB_OTG_DOEPEACHMSK1_TXFURM_Msk|macro|USB_OTG_DOEPEACHMSK1_TXFURM_Msk
DECL|USB_OTG_DOEPEACHMSK1_TXFURM_Pos|macro|USB_OTG_DOEPEACHMSK1_TXFURM_Pos
DECL|USB_OTG_DOEPEACHMSK1_TXFURM|macro|USB_OTG_DOEPEACHMSK1_TXFURM
DECL|USB_OTG_DOEPEACHMSK1_XFRCM_Msk|macro|USB_OTG_DOEPEACHMSK1_XFRCM_Msk
DECL|USB_OTG_DOEPEACHMSK1_XFRCM_Pos|macro|USB_OTG_DOEPEACHMSK1_XFRCM_Pos
DECL|USB_OTG_DOEPEACHMSK1_XFRCM|macro|USB_OTG_DOEPEACHMSK1_XFRCM
DECL|USB_OTG_DOEPINT_B2BSTUP_Msk|macro|USB_OTG_DOEPINT_B2BSTUP_Msk
DECL|USB_OTG_DOEPINT_B2BSTUP_Pos|macro|USB_OTG_DOEPINT_B2BSTUP_Pos
DECL|USB_OTG_DOEPINT_B2BSTUP|macro|USB_OTG_DOEPINT_B2BSTUP
DECL|USB_OTG_DOEPINT_EPDISD_Msk|macro|USB_OTG_DOEPINT_EPDISD_Msk
DECL|USB_OTG_DOEPINT_EPDISD_Pos|macro|USB_OTG_DOEPINT_EPDISD_Pos
DECL|USB_OTG_DOEPINT_EPDISD|macro|USB_OTG_DOEPINT_EPDISD
DECL|USB_OTG_DOEPINT_NYET_Msk|macro|USB_OTG_DOEPINT_NYET_Msk
DECL|USB_OTG_DOEPINT_NYET_Pos|macro|USB_OTG_DOEPINT_NYET_Pos
DECL|USB_OTG_DOEPINT_NYET|macro|USB_OTG_DOEPINT_NYET
DECL|USB_OTG_DOEPINT_OTEPDIS_Msk|macro|USB_OTG_DOEPINT_OTEPDIS_Msk
DECL|USB_OTG_DOEPINT_OTEPDIS_Pos|macro|USB_OTG_DOEPINT_OTEPDIS_Pos
DECL|USB_OTG_DOEPINT_OTEPDIS|macro|USB_OTG_DOEPINT_OTEPDIS
DECL|USB_OTG_DOEPINT_OTEPSPR_Msk|macro|USB_OTG_DOEPINT_OTEPSPR_Msk
DECL|USB_OTG_DOEPINT_OTEPSPR_Pos|macro|USB_OTG_DOEPINT_OTEPSPR_Pos
DECL|USB_OTG_DOEPINT_OTEPSPR|macro|USB_OTG_DOEPINT_OTEPSPR
DECL|USB_OTG_DOEPINT_STUP_Msk|macro|USB_OTG_DOEPINT_STUP_Msk
DECL|USB_OTG_DOEPINT_STUP_Pos|macro|USB_OTG_DOEPINT_STUP_Pos
DECL|USB_OTG_DOEPINT_STUP|macro|USB_OTG_DOEPINT_STUP
DECL|USB_OTG_DOEPINT_XFRC_Msk|macro|USB_OTG_DOEPINT_XFRC_Msk
DECL|USB_OTG_DOEPINT_XFRC_Pos|macro|USB_OTG_DOEPINT_XFRC_Pos
DECL|USB_OTG_DOEPINT_XFRC|macro|USB_OTG_DOEPINT_XFRC
DECL|USB_OTG_DOEPMSK_B2BSTUP_Msk|macro|USB_OTG_DOEPMSK_B2BSTUP_Msk
DECL|USB_OTG_DOEPMSK_B2BSTUP_Pos|macro|USB_OTG_DOEPMSK_B2BSTUP_Pos
DECL|USB_OTG_DOEPMSK_B2BSTUP|macro|USB_OTG_DOEPMSK_B2BSTUP
DECL|USB_OTG_DOEPMSK_BOIM_Msk|macro|USB_OTG_DOEPMSK_BOIM_Msk
DECL|USB_OTG_DOEPMSK_BOIM_Pos|macro|USB_OTG_DOEPMSK_BOIM_Pos
DECL|USB_OTG_DOEPMSK_BOIM|macro|USB_OTG_DOEPMSK_BOIM
DECL|USB_OTG_DOEPMSK_EPDM_Msk|macro|USB_OTG_DOEPMSK_EPDM_Msk
DECL|USB_OTG_DOEPMSK_EPDM_Pos|macro|USB_OTG_DOEPMSK_EPDM_Pos
DECL|USB_OTG_DOEPMSK_EPDM|macro|USB_OTG_DOEPMSK_EPDM
DECL|USB_OTG_DOEPMSK_OPEM_Msk|macro|USB_OTG_DOEPMSK_OPEM_Msk
DECL|USB_OTG_DOEPMSK_OPEM_Pos|macro|USB_OTG_DOEPMSK_OPEM_Pos
DECL|USB_OTG_DOEPMSK_OPEM|macro|USB_OTG_DOEPMSK_OPEM
DECL|USB_OTG_DOEPMSK_OTEPDM_Msk|macro|USB_OTG_DOEPMSK_OTEPDM_Msk
DECL|USB_OTG_DOEPMSK_OTEPDM_Pos|macro|USB_OTG_DOEPMSK_OTEPDM_Pos
DECL|USB_OTG_DOEPMSK_OTEPDM|macro|USB_OTG_DOEPMSK_OTEPDM
DECL|USB_OTG_DOEPMSK_OTEPSPRM_Msk|macro|USB_OTG_DOEPMSK_OTEPSPRM_Msk
DECL|USB_OTG_DOEPMSK_OTEPSPRM_Pos|macro|USB_OTG_DOEPMSK_OTEPSPRM_Pos
DECL|USB_OTG_DOEPMSK_OTEPSPRM|macro|USB_OTG_DOEPMSK_OTEPSPRM
DECL|USB_OTG_DOEPMSK_STUPM_Msk|macro|USB_OTG_DOEPMSK_STUPM_Msk
DECL|USB_OTG_DOEPMSK_STUPM_Pos|macro|USB_OTG_DOEPMSK_STUPM_Pos
DECL|USB_OTG_DOEPMSK_STUPM|macro|USB_OTG_DOEPMSK_STUPM
DECL|USB_OTG_DOEPMSK_XFRCM_Msk|macro|USB_OTG_DOEPMSK_XFRCM_Msk
DECL|USB_OTG_DOEPMSK_XFRCM_Pos|macro|USB_OTG_DOEPMSK_XFRCM_Pos
DECL|USB_OTG_DOEPMSK_XFRCM|macro|USB_OTG_DOEPMSK_XFRCM
DECL|USB_OTG_DOEPTSIZ_PKTCNT_Msk|macro|USB_OTG_DOEPTSIZ_PKTCNT_Msk
DECL|USB_OTG_DOEPTSIZ_PKTCNT_Pos|macro|USB_OTG_DOEPTSIZ_PKTCNT_Pos
DECL|USB_OTG_DOEPTSIZ_PKTCNT|macro|USB_OTG_DOEPTSIZ_PKTCNT
DECL|USB_OTG_DOEPTSIZ_STUPCNT_0|macro|USB_OTG_DOEPTSIZ_STUPCNT_0
DECL|USB_OTG_DOEPTSIZ_STUPCNT_1|macro|USB_OTG_DOEPTSIZ_STUPCNT_1
DECL|USB_OTG_DOEPTSIZ_STUPCNT_Msk|macro|USB_OTG_DOEPTSIZ_STUPCNT_Msk
DECL|USB_OTG_DOEPTSIZ_STUPCNT_Pos|macro|USB_OTG_DOEPTSIZ_STUPCNT_Pos
DECL|USB_OTG_DOEPTSIZ_STUPCNT|macro|USB_OTG_DOEPTSIZ_STUPCNT
DECL|USB_OTG_DOEPTSIZ_XFRSIZ_Msk|macro|USB_OTG_DOEPTSIZ_XFRSIZ_Msk
DECL|USB_OTG_DOEPTSIZ_XFRSIZ_Pos|macro|USB_OTG_DOEPTSIZ_XFRSIZ_Pos
DECL|USB_OTG_DOEPTSIZ_XFRSIZ|macro|USB_OTG_DOEPTSIZ_XFRSIZ
DECL|USB_OTG_DPID_0|macro|USB_OTG_DPID_0
DECL|USB_OTG_DPID_0|macro|USB_OTG_DPID_0
DECL|USB_OTG_DPID_1|macro|USB_OTG_DPID_1
DECL|USB_OTG_DPID_1|macro|USB_OTG_DPID_1
DECL|USB_OTG_DPID_Msk|macro|USB_OTG_DPID_Msk
DECL|USB_OTG_DPID_Msk|macro|USB_OTG_DPID_Msk
DECL|USB_OTG_DPID_Pos|macro|USB_OTG_DPID_Pos
DECL|USB_OTG_DPID_Pos|macro|USB_OTG_DPID_Pos
DECL|USB_OTG_DPID|macro|USB_OTG_DPID
DECL|USB_OTG_DPID|macro|USB_OTG_DPID
DECL|USB_OTG_DSTS_EERR_Msk|macro|USB_OTG_DSTS_EERR_Msk
DECL|USB_OTG_DSTS_EERR_Pos|macro|USB_OTG_DSTS_EERR_Pos
DECL|USB_OTG_DSTS_EERR|macro|USB_OTG_DSTS_EERR
DECL|USB_OTG_DSTS_ENUMSPD_0|macro|USB_OTG_DSTS_ENUMSPD_0
DECL|USB_OTG_DSTS_ENUMSPD_1|macro|USB_OTG_DSTS_ENUMSPD_1
DECL|USB_OTG_DSTS_ENUMSPD_Msk|macro|USB_OTG_DSTS_ENUMSPD_Msk
DECL|USB_OTG_DSTS_ENUMSPD_Pos|macro|USB_OTG_DSTS_ENUMSPD_Pos
DECL|USB_OTG_DSTS_ENUMSPD|macro|USB_OTG_DSTS_ENUMSPD
DECL|USB_OTG_DSTS_FNSOF_Msk|macro|USB_OTG_DSTS_FNSOF_Msk
DECL|USB_OTG_DSTS_FNSOF_Pos|macro|USB_OTG_DSTS_FNSOF_Pos
DECL|USB_OTG_DSTS_FNSOF|macro|USB_OTG_DSTS_FNSOF
DECL|USB_OTG_DSTS_SUSPSTS_Msk|macro|USB_OTG_DSTS_SUSPSTS_Msk
DECL|USB_OTG_DSTS_SUSPSTS_Pos|macro|USB_OTG_DSTS_SUSPSTS_Pos
DECL|USB_OTG_DSTS_SUSPSTS|macro|USB_OTG_DSTS_SUSPSTS
DECL|USB_OTG_DTHRCTL_ARPEN_Msk|macro|USB_OTG_DTHRCTL_ARPEN_Msk
DECL|USB_OTG_DTHRCTL_ARPEN_Pos|macro|USB_OTG_DTHRCTL_ARPEN_Pos
DECL|USB_OTG_DTHRCTL_ARPEN|macro|USB_OTG_DTHRCTL_ARPEN
DECL|USB_OTG_DTHRCTL_ISOTHREN_Msk|macro|USB_OTG_DTHRCTL_ISOTHREN_Msk
DECL|USB_OTG_DTHRCTL_ISOTHREN_Pos|macro|USB_OTG_DTHRCTL_ISOTHREN_Pos
DECL|USB_OTG_DTHRCTL_ISOTHREN|macro|USB_OTG_DTHRCTL_ISOTHREN
DECL|USB_OTG_DTHRCTL_NONISOTHREN_Msk|macro|USB_OTG_DTHRCTL_NONISOTHREN_Msk
DECL|USB_OTG_DTHRCTL_NONISOTHREN_Pos|macro|USB_OTG_DTHRCTL_NONISOTHREN_Pos
DECL|USB_OTG_DTHRCTL_NONISOTHREN|macro|USB_OTG_DTHRCTL_NONISOTHREN
DECL|USB_OTG_DTHRCTL_RXTHREN_Msk|macro|USB_OTG_DTHRCTL_RXTHREN_Msk
DECL|USB_OTG_DTHRCTL_RXTHREN_Pos|macro|USB_OTG_DTHRCTL_RXTHREN_Pos
DECL|USB_OTG_DTHRCTL_RXTHREN|macro|USB_OTG_DTHRCTL_RXTHREN
DECL|USB_OTG_DTHRCTL_RXTHRLEN_0|macro|USB_OTG_DTHRCTL_RXTHRLEN_0
DECL|USB_OTG_DTHRCTL_RXTHRLEN_1|macro|USB_OTG_DTHRCTL_RXTHRLEN_1
DECL|USB_OTG_DTHRCTL_RXTHRLEN_2|macro|USB_OTG_DTHRCTL_RXTHRLEN_2
DECL|USB_OTG_DTHRCTL_RXTHRLEN_3|macro|USB_OTG_DTHRCTL_RXTHRLEN_3
DECL|USB_OTG_DTHRCTL_RXTHRLEN_4|macro|USB_OTG_DTHRCTL_RXTHRLEN_4
DECL|USB_OTG_DTHRCTL_RXTHRLEN_5|macro|USB_OTG_DTHRCTL_RXTHRLEN_5
DECL|USB_OTG_DTHRCTL_RXTHRLEN_6|macro|USB_OTG_DTHRCTL_RXTHRLEN_6
DECL|USB_OTG_DTHRCTL_RXTHRLEN_7|macro|USB_OTG_DTHRCTL_RXTHRLEN_7
DECL|USB_OTG_DTHRCTL_RXTHRLEN_8|macro|USB_OTG_DTHRCTL_RXTHRLEN_8
DECL|USB_OTG_DTHRCTL_RXTHRLEN_Msk|macro|USB_OTG_DTHRCTL_RXTHRLEN_Msk
DECL|USB_OTG_DTHRCTL_RXTHRLEN_Pos|macro|USB_OTG_DTHRCTL_RXTHRLEN_Pos
DECL|USB_OTG_DTHRCTL_RXTHRLEN|macro|USB_OTG_DTHRCTL_RXTHRLEN
DECL|USB_OTG_DTHRCTL_TXTHRLEN_0|macro|USB_OTG_DTHRCTL_TXTHRLEN_0
DECL|USB_OTG_DTHRCTL_TXTHRLEN_1|macro|USB_OTG_DTHRCTL_TXTHRLEN_1
DECL|USB_OTG_DTHRCTL_TXTHRLEN_2|macro|USB_OTG_DTHRCTL_TXTHRLEN_2
DECL|USB_OTG_DTHRCTL_TXTHRLEN_3|macro|USB_OTG_DTHRCTL_TXTHRLEN_3
DECL|USB_OTG_DTHRCTL_TXTHRLEN_4|macro|USB_OTG_DTHRCTL_TXTHRLEN_4
DECL|USB_OTG_DTHRCTL_TXTHRLEN_5|macro|USB_OTG_DTHRCTL_TXTHRLEN_5
DECL|USB_OTG_DTHRCTL_TXTHRLEN_6|macro|USB_OTG_DTHRCTL_TXTHRLEN_6
DECL|USB_OTG_DTHRCTL_TXTHRLEN_7|macro|USB_OTG_DTHRCTL_TXTHRLEN_7
DECL|USB_OTG_DTHRCTL_TXTHRLEN_8|macro|USB_OTG_DTHRCTL_TXTHRLEN_8
DECL|USB_OTG_DTHRCTL_TXTHRLEN_Msk|macro|USB_OTG_DTHRCTL_TXTHRLEN_Msk
DECL|USB_OTG_DTHRCTL_TXTHRLEN_Pos|macro|USB_OTG_DTHRCTL_TXTHRLEN_Pos
DECL|USB_OTG_DTHRCTL_TXTHRLEN|macro|USB_OTG_DTHRCTL_TXTHRLEN
DECL|USB_OTG_DTXFSTS_INEPTFSAV_Msk|macro|USB_OTG_DTXFSTS_INEPTFSAV_Msk
DECL|USB_OTG_DTXFSTS_INEPTFSAV_Pos|macro|USB_OTG_DTXFSTS_INEPTFSAV_Pos
DECL|USB_OTG_DTXFSTS_INEPTFSAV|macro|USB_OTG_DTXFSTS_INEPTFSAV
DECL|USB_OTG_DVBUSDIS_VBUSDT_Msk|macro|USB_OTG_DVBUSDIS_VBUSDT_Msk
DECL|USB_OTG_DVBUSDIS_VBUSDT_Pos|macro|USB_OTG_DVBUSDIS_VBUSDT_Pos
DECL|USB_OTG_DVBUSDIS_VBUSDT|macro|USB_OTG_DVBUSDIS_VBUSDT
DECL|USB_OTG_DVBUSPULSE_DVBUSP_Msk|macro|USB_OTG_DVBUSPULSE_DVBUSP_Msk
DECL|USB_OTG_DVBUSPULSE_DVBUSP_Pos|macro|USB_OTG_DVBUSPULSE_DVBUSP_Pos
DECL|USB_OTG_DVBUSPULSE_DVBUSP|macro|USB_OTG_DVBUSPULSE_DVBUSP
DECL|USB_OTG_DeviceTypeDef|typedef|} USB_OTG_DeviceTypeDef;
DECL|USB_OTG_EPNUM_0|macro|USB_OTG_EPNUM_0
DECL|USB_OTG_EPNUM_0|macro|USB_OTG_EPNUM_0
DECL|USB_OTG_EPNUM_1|macro|USB_OTG_EPNUM_1
DECL|USB_OTG_EPNUM_1|macro|USB_OTG_EPNUM_1
DECL|USB_OTG_EPNUM_2|macro|USB_OTG_EPNUM_2
DECL|USB_OTG_EPNUM_2|macro|USB_OTG_EPNUM_2
DECL|USB_OTG_EPNUM_3|macro|USB_OTG_EPNUM_3
DECL|USB_OTG_EPNUM_3|macro|USB_OTG_EPNUM_3
DECL|USB_OTG_EPNUM_Msk|macro|USB_OTG_EPNUM_Msk
DECL|USB_OTG_EPNUM_Msk|macro|USB_OTG_EPNUM_Msk
DECL|USB_OTG_EPNUM_Pos|macro|USB_OTG_EPNUM_Pos
DECL|USB_OTG_EPNUM_Pos|macro|USB_OTG_EPNUM_Pos
DECL|USB_OTG_EPNUM|macro|USB_OTG_EPNUM
DECL|USB_OTG_EPNUM|macro|USB_OTG_EPNUM
DECL|USB_OTG_EP_REG_SIZE|macro|USB_OTG_EP_REG_SIZE
DECL|USB_OTG_FIFO_BASE|macro|USB_OTG_FIFO_BASE
DECL|USB_OTG_FIFO_SIZE|macro|USB_OTG_FIFO_SIZE
DECL|USB_OTG_FRMNUM_0|macro|USB_OTG_FRMNUM_0
DECL|USB_OTG_FRMNUM_0|macro|USB_OTG_FRMNUM_0
DECL|USB_OTG_FRMNUM_1|macro|USB_OTG_FRMNUM_1
DECL|USB_OTG_FRMNUM_1|macro|USB_OTG_FRMNUM_1
DECL|USB_OTG_FRMNUM_2|macro|USB_OTG_FRMNUM_2
DECL|USB_OTG_FRMNUM_2|macro|USB_OTG_FRMNUM_2
DECL|USB_OTG_FRMNUM_3|macro|USB_OTG_FRMNUM_3
DECL|USB_OTG_FRMNUM_3|macro|USB_OTG_FRMNUM_3
DECL|USB_OTG_FRMNUM_Msk|macro|USB_OTG_FRMNUM_Msk
DECL|USB_OTG_FRMNUM_Msk|macro|USB_OTG_FRMNUM_Msk
DECL|USB_OTG_FRMNUM_Pos|macro|USB_OTG_FRMNUM_Pos
DECL|USB_OTG_FRMNUM_Pos|macro|USB_OTG_FRMNUM_Pos
DECL|USB_OTG_FRMNUM|macro|USB_OTG_FRMNUM
DECL|USB_OTG_FRMNUM|macro|USB_OTG_FRMNUM
DECL|USB_OTG_FS_PERIPH_BASE|macro|USB_OTG_FS_PERIPH_BASE
DECL|USB_OTG_FS|macro|USB_OTG_FS
DECL|USB_OTG_GAHBCFG_DMAEN_Msk|macro|USB_OTG_GAHBCFG_DMAEN_Msk
DECL|USB_OTG_GAHBCFG_DMAEN_Pos|macro|USB_OTG_GAHBCFG_DMAEN_Pos
DECL|USB_OTG_GAHBCFG_DMAEN|macro|USB_OTG_GAHBCFG_DMAEN
DECL|USB_OTG_GAHBCFG_GINT_Msk|macro|USB_OTG_GAHBCFG_GINT_Msk
DECL|USB_OTG_GAHBCFG_GINT_Pos|macro|USB_OTG_GAHBCFG_GINT_Pos
DECL|USB_OTG_GAHBCFG_GINT|macro|USB_OTG_GAHBCFG_GINT
DECL|USB_OTG_GAHBCFG_HBSTLEN_0|macro|USB_OTG_GAHBCFG_HBSTLEN_0
DECL|USB_OTG_GAHBCFG_HBSTLEN_1|macro|USB_OTG_GAHBCFG_HBSTLEN_1
DECL|USB_OTG_GAHBCFG_HBSTLEN_2|macro|USB_OTG_GAHBCFG_HBSTLEN_2
DECL|USB_OTG_GAHBCFG_HBSTLEN_3|macro|USB_OTG_GAHBCFG_HBSTLEN_3
DECL|USB_OTG_GAHBCFG_HBSTLEN_4|macro|USB_OTG_GAHBCFG_HBSTLEN_4
DECL|USB_OTG_GAHBCFG_HBSTLEN_Msk|macro|USB_OTG_GAHBCFG_HBSTLEN_Msk
DECL|USB_OTG_GAHBCFG_HBSTLEN_Pos|macro|USB_OTG_GAHBCFG_HBSTLEN_Pos
DECL|USB_OTG_GAHBCFG_HBSTLEN|macro|USB_OTG_GAHBCFG_HBSTLEN
DECL|USB_OTG_GAHBCFG_PTXFELVL_Msk|macro|USB_OTG_GAHBCFG_PTXFELVL_Msk
DECL|USB_OTG_GAHBCFG_PTXFELVL_Pos|macro|USB_OTG_GAHBCFG_PTXFELVL_Pos
DECL|USB_OTG_GAHBCFG_PTXFELVL|macro|USB_OTG_GAHBCFG_PTXFELVL
DECL|USB_OTG_GAHBCFG_TXFELVL_Msk|macro|USB_OTG_GAHBCFG_TXFELVL_Msk
DECL|USB_OTG_GAHBCFG_TXFELVL_Pos|macro|USB_OTG_GAHBCFG_TXFELVL_Pos
DECL|USB_OTG_GAHBCFG_TXFELVL|macro|USB_OTG_GAHBCFG_TXFELVL
DECL|USB_OTG_GCCFG_PWRDWN_Msk|macro|USB_OTG_GCCFG_PWRDWN_Msk
DECL|USB_OTG_GCCFG_PWRDWN_Pos|macro|USB_OTG_GCCFG_PWRDWN_Pos
DECL|USB_OTG_GCCFG_PWRDWN|macro|USB_OTG_GCCFG_PWRDWN
DECL|USB_OTG_GCCFG_VBDEN_Msk|macro|USB_OTG_GCCFG_VBDEN_Msk
DECL|USB_OTG_GCCFG_VBDEN_Pos|macro|USB_OTG_GCCFG_VBDEN_Pos
DECL|USB_OTG_GCCFG_VBDEN|macro|USB_OTG_GCCFG_VBDEN
DECL|USB_OTG_GINTMSK_CIDSCHGM_Msk|macro|USB_OTG_GINTMSK_CIDSCHGM_Msk
DECL|USB_OTG_GINTMSK_CIDSCHGM_Pos|macro|USB_OTG_GINTMSK_CIDSCHGM_Pos
DECL|USB_OTG_GINTMSK_CIDSCHGM|macro|USB_OTG_GINTMSK_CIDSCHGM
DECL|USB_OTG_GINTMSK_DISCINT_Msk|macro|USB_OTG_GINTMSK_DISCINT_Msk
DECL|USB_OTG_GINTMSK_DISCINT_Pos|macro|USB_OTG_GINTMSK_DISCINT_Pos
DECL|USB_OTG_GINTMSK_DISCINT|macro|USB_OTG_GINTMSK_DISCINT
DECL|USB_OTG_GINTMSK_ENUMDNEM_Msk|macro|USB_OTG_GINTMSK_ENUMDNEM_Msk
DECL|USB_OTG_GINTMSK_ENUMDNEM_Pos|macro|USB_OTG_GINTMSK_ENUMDNEM_Pos
DECL|USB_OTG_GINTMSK_ENUMDNEM|macro|USB_OTG_GINTMSK_ENUMDNEM
DECL|USB_OTG_GINTMSK_EOPFM_Msk|macro|USB_OTG_GINTMSK_EOPFM_Msk
DECL|USB_OTG_GINTMSK_EOPFM_Pos|macro|USB_OTG_GINTMSK_EOPFM_Pos
DECL|USB_OTG_GINTMSK_EOPFM|macro|USB_OTG_GINTMSK_EOPFM
DECL|USB_OTG_GINTMSK_EPMISM_Msk|macro|USB_OTG_GINTMSK_EPMISM_Msk
DECL|USB_OTG_GINTMSK_EPMISM_Pos|macro|USB_OTG_GINTMSK_EPMISM_Pos
DECL|USB_OTG_GINTMSK_EPMISM|macro|USB_OTG_GINTMSK_EPMISM
DECL|USB_OTG_GINTMSK_ESUSPM_Msk|macro|USB_OTG_GINTMSK_ESUSPM_Msk
DECL|USB_OTG_GINTMSK_ESUSPM_Pos|macro|USB_OTG_GINTMSK_ESUSPM_Pos
DECL|USB_OTG_GINTMSK_ESUSPM|macro|USB_OTG_GINTMSK_ESUSPM
DECL|USB_OTG_GINTMSK_FSUSPM_Msk|macro|USB_OTG_GINTMSK_FSUSPM_Msk
DECL|USB_OTG_GINTMSK_FSUSPM_Pos|macro|USB_OTG_GINTMSK_FSUSPM_Pos
DECL|USB_OTG_GINTMSK_FSUSPM|macro|USB_OTG_GINTMSK_FSUSPM
DECL|USB_OTG_GINTMSK_GINAKEFFM_Msk|macro|USB_OTG_GINTMSK_GINAKEFFM_Msk
DECL|USB_OTG_GINTMSK_GINAKEFFM_Pos|macro|USB_OTG_GINTMSK_GINAKEFFM_Pos
DECL|USB_OTG_GINTMSK_GINAKEFFM|macro|USB_OTG_GINTMSK_GINAKEFFM
DECL|USB_OTG_GINTMSK_GONAKEFFM_Msk|macro|USB_OTG_GINTMSK_GONAKEFFM_Msk
DECL|USB_OTG_GINTMSK_GONAKEFFM_Pos|macro|USB_OTG_GINTMSK_GONAKEFFM_Pos
DECL|USB_OTG_GINTMSK_GONAKEFFM|macro|USB_OTG_GINTMSK_GONAKEFFM
DECL|USB_OTG_GINTMSK_HCIM_Msk|macro|USB_OTG_GINTMSK_HCIM_Msk
DECL|USB_OTG_GINTMSK_HCIM_Pos|macro|USB_OTG_GINTMSK_HCIM_Pos
DECL|USB_OTG_GINTMSK_HCIM|macro|USB_OTG_GINTMSK_HCIM
DECL|USB_OTG_GINTMSK_IEPINT_Msk|macro|USB_OTG_GINTMSK_IEPINT_Msk
DECL|USB_OTG_GINTMSK_IEPINT_Pos|macro|USB_OTG_GINTMSK_IEPINT_Pos
DECL|USB_OTG_GINTMSK_IEPINT|macro|USB_OTG_GINTMSK_IEPINT
DECL|USB_OTG_GINTMSK_IISOIXFRM_Msk|macro|USB_OTG_GINTMSK_IISOIXFRM_Msk
DECL|USB_OTG_GINTMSK_IISOIXFRM_Pos|macro|USB_OTG_GINTMSK_IISOIXFRM_Pos
DECL|USB_OTG_GINTMSK_IISOIXFRM|macro|USB_OTG_GINTMSK_IISOIXFRM
DECL|USB_OTG_GINTMSK_ISOODRPM_Msk|macro|USB_OTG_GINTMSK_ISOODRPM_Msk
DECL|USB_OTG_GINTMSK_ISOODRPM_Pos|macro|USB_OTG_GINTMSK_ISOODRPM_Pos
DECL|USB_OTG_GINTMSK_ISOODRPM|macro|USB_OTG_GINTMSK_ISOODRPM
DECL|USB_OTG_GINTMSK_LPMINTM_Msk|macro|USB_OTG_GINTMSK_LPMINTM_Msk
DECL|USB_OTG_GINTMSK_LPMINTM_Pos|macro|USB_OTG_GINTMSK_LPMINTM_Pos
DECL|USB_OTG_GINTMSK_LPMINTM|macro|USB_OTG_GINTMSK_LPMINTM
DECL|USB_OTG_GINTMSK_MMISM_Msk|macro|USB_OTG_GINTMSK_MMISM_Msk
DECL|USB_OTG_GINTMSK_MMISM_Pos|macro|USB_OTG_GINTMSK_MMISM_Pos
DECL|USB_OTG_GINTMSK_MMISM|macro|USB_OTG_GINTMSK_MMISM
DECL|USB_OTG_GINTMSK_NPTXFEM_Msk|macro|USB_OTG_GINTMSK_NPTXFEM_Msk
DECL|USB_OTG_GINTMSK_NPTXFEM_Pos|macro|USB_OTG_GINTMSK_NPTXFEM_Pos
DECL|USB_OTG_GINTMSK_NPTXFEM|macro|USB_OTG_GINTMSK_NPTXFEM
DECL|USB_OTG_GINTMSK_OEPINT_Msk|macro|USB_OTG_GINTMSK_OEPINT_Msk
DECL|USB_OTG_GINTMSK_OEPINT_Pos|macro|USB_OTG_GINTMSK_OEPINT_Pos
DECL|USB_OTG_GINTMSK_OEPINT|macro|USB_OTG_GINTMSK_OEPINT
DECL|USB_OTG_GINTMSK_OTGINT_Msk|macro|USB_OTG_GINTMSK_OTGINT_Msk
DECL|USB_OTG_GINTMSK_OTGINT_Pos|macro|USB_OTG_GINTMSK_OTGINT_Pos
DECL|USB_OTG_GINTMSK_OTGINT|macro|USB_OTG_GINTMSK_OTGINT
DECL|USB_OTG_GINTMSK_PRTIM_Msk|macro|USB_OTG_GINTMSK_PRTIM_Msk
DECL|USB_OTG_GINTMSK_PRTIM_Pos|macro|USB_OTG_GINTMSK_PRTIM_Pos
DECL|USB_OTG_GINTMSK_PRTIM|macro|USB_OTG_GINTMSK_PRTIM
DECL|USB_OTG_GINTMSK_PTXFEM_Msk|macro|USB_OTG_GINTMSK_PTXFEM_Msk
DECL|USB_OTG_GINTMSK_PTXFEM_Pos|macro|USB_OTG_GINTMSK_PTXFEM_Pos
DECL|USB_OTG_GINTMSK_PTXFEM|macro|USB_OTG_GINTMSK_PTXFEM
DECL|USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk|macro|USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk
DECL|USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos|macro|USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos
DECL|USB_OTG_GINTMSK_PXFRM_IISOOXFRM|macro|USB_OTG_GINTMSK_PXFRM_IISOOXFRM
DECL|USB_OTG_GINTMSK_RSTDEM_Msk|macro|USB_OTG_GINTMSK_RSTDEM_Msk
DECL|USB_OTG_GINTMSK_RSTDEM_Pos|macro|USB_OTG_GINTMSK_RSTDEM_Pos
DECL|USB_OTG_GINTMSK_RSTDEM|macro|USB_OTG_GINTMSK_RSTDEM
DECL|USB_OTG_GINTMSK_RXFLVLM_Msk|macro|USB_OTG_GINTMSK_RXFLVLM_Msk
DECL|USB_OTG_GINTMSK_RXFLVLM_Pos|macro|USB_OTG_GINTMSK_RXFLVLM_Pos
DECL|USB_OTG_GINTMSK_RXFLVLM|macro|USB_OTG_GINTMSK_RXFLVLM
DECL|USB_OTG_GINTMSK_SOFM_Msk|macro|USB_OTG_GINTMSK_SOFM_Msk
DECL|USB_OTG_GINTMSK_SOFM_Pos|macro|USB_OTG_GINTMSK_SOFM_Pos
DECL|USB_OTG_GINTMSK_SOFM|macro|USB_OTG_GINTMSK_SOFM
DECL|USB_OTG_GINTMSK_SRQIM_Msk|macro|USB_OTG_GINTMSK_SRQIM_Msk
DECL|USB_OTG_GINTMSK_SRQIM_Pos|macro|USB_OTG_GINTMSK_SRQIM_Pos
DECL|USB_OTG_GINTMSK_SRQIM|macro|USB_OTG_GINTMSK_SRQIM
DECL|USB_OTG_GINTMSK_USBRST_Msk|macro|USB_OTG_GINTMSK_USBRST_Msk
DECL|USB_OTG_GINTMSK_USBRST_Pos|macro|USB_OTG_GINTMSK_USBRST_Pos
DECL|USB_OTG_GINTMSK_USBRST|macro|USB_OTG_GINTMSK_USBRST
DECL|USB_OTG_GINTMSK_USBSUSPM_Msk|macro|USB_OTG_GINTMSK_USBSUSPM_Msk
DECL|USB_OTG_GINTMSK_USBSUSPM_Pos|macro|USB_OTG_GINTMSK_USBSUSPM_Pos
DECL|USB_OTG_GINTMSK_USBSUSPM|macro|USB_OTG_GINTMSK_USBSUSPM
DECL|USB_OTG_GINTMSK_WUIM_Msk|macro|USB_OTG_GINTMSK_WUIM_Msk
DECL|USB_OTG_GINTMSK_WUIM_Pos|macro|USB_OTG_GINTMSK_WUIM_Pos
DECL|USB_OTG_GINTMSK_WUIM|macro|USB_OTG_GINTMSK_WUIM
DECL|USB_OTG_GINTSTS_BOUTNAKEFF_Msk|macro|USB_OTG_GINTSTS_BOUTNAKEFF_Msk
DECL|USB_OTG_GINTSTS_BOUTNAKEFF_Pos|macro|USB_OTG_GINTSTS_BOUTNAKEFF_Pos
DECL|USB_OTG_GINTSTS_BOUTNAKEFF|macro|USB_OTG_GINTSTS_BOUTNAKEFF
DECL|USB_OTG_GINTSTS_CIDSCHG_Msk|macro|USB_OTG_GINTSTS_CIDSCHG_Msk
DECL|USB_OTG_GINTSTS_CIDSCHG_Pos|macro|USB_OTG_GINTSTS_CIDSCHG_Pos
DECL|USB_OTG_GINTSTS_CIDSCHG|macro|USB_OTG_GINTSTS_CIDSCHG
DECL|USB_OTG_GINTSTS_CMOD_Msk|macro|USB_OTG_GINTSTS_CMOD_Msk
DECL|USB_OTG_GINTSTS_CMOD_Pos|macro|USB_OTG_GINTSTS_CMOD_Pos
DECL|USB_OTG_GINTSTS_CMOD|macro|USB_OTG_GINTSTS_CMOD
DECL|USB_OTG_GINTSTS_DATAFSUSP_Msk|macro|USB_OTG_GINTSTS_DATAFSUSP_Msk
DECL|USB_OTG_GINTSTS_DATAFSUSP_Pos|macro|USB_OTG_GINTSTS_DATAFSUSP_Pos
DECL|USB_OTG_GINTSTS_DATAFSUSP|macro|USB_OTG_GINTSTS_DATAFSUSP
DECL|USB_OTG_GINTSTS_DISCINT_Msk|macro|USB_OTG_GINTSTS_DISCINT_Msk
DECL|USB_OTG_GINTSTS_DISCINT_Pos|macro|USB_OTG_GINTSTS_DISCINT_Pos
DECL|USB_OTG_GINTSTS_DISCINT|macro|USB_OTG_GINTSTS_DISCINT
DECL|USB_OTG_GINTSTS_ENUMDNE_Msk|macro|USB_OTG_GINTSTS_ENUMDNE_Msk
DECL|USB_OTG_GINTSTS_ENUMDNE_Pos|macro|USB_OTG_GINTSTS_ENUMDNE_Pos
DECL|USB_OTG_GINTSTS_ENUMDNE|macro|USB_OTG_GINTSTS_ENUMDNE
DECL|USB_OTG_GINTSTS_EOPF_Msk|macro|USB_OTG_GINTSTS_EOPF_Msk
DECL|USB_OTG_GINTSTS_EOPF_Pos|macro|USB_OTG_GINTSTS_EOPF_Pos
DECL|USB_OTG_GINTSTS_EOPF|macro|USB_OTG_GINTSTS_EOPF
DECL|USB_OTG_GINTSTS_ESUSP_Msk|macro|USB_OTG_GINTSTS_ESUSP_Msk
DECL|USB_OTG_GINTSTS_ESUSP_Pos|macro|USB_OTG_GINTSTS_ESUSP_Pos
DECL|USB_OTG_GINTSTS_ESUSP|macro|USB_OTG_GINTSTS_ESUSP
DECL|USB_OTG_GINTSTS_GINAKEFF_Msk|macro|USB_OTG_GINTSTS_GINAKEFF_Msk
DECL|USB_OTG_GINTSTS_GINAKEFF_Pos|macro|USB_OTG_GINTSTS_GINAKEFF_Pos
DECL|USB_OTG_GINTSTS_GINAKEFF|macro|USB_OTG_GINTSTS_GINAKEFF
DECL|USB_OTG_GINTSTS_HCINT_Msk|macro|USB_OTG_GINTSTS_HCINT_Msk
DECL|USB_OTG_GINTSTS_HCINT_Pos|macro|USB_OTG_GINTSTS_HCINT_Pos
DECL|USB_OTG_GINTSTS_HCINT|macro|USB_OTG_GINTSTS_HCINT
DECL|USB_OTG_GINTSTS_HPRTINT_Msk|macro|USB_OTG_GINTSTS_HPRTINT_Msk
DECL|USB_OTG_GINTSTS_HPRTINT_Pos|macro|USB_OTG_GINTSTS_HPRTINT_Pos
DECL|USB_OTG_GINTSTS_HPRTINT|macro|USB_OTG_GINTSTS_HPRTINT
DECL|USB_OTG_GINTSTS_IEPINT_Msk|macro|USB_OTG_GINTSTS_IEPINT_Msk
DECL|USB_OTG_GINTSTS_IEPINT_Pos|macro|USB_OTG_GINTSTS_IEPINT_Pos
DECL|USB_OTG_GINTSTS_IEPINT|macro|USB_OTG_GINTSTS_IEPINT
DECL|USB_OTG_GINTSTS_IISOIXFR_Msk|macro|USB_OTG_GINTSTS_IISOIXFR_Msk
DECL|USB_OTG_GINTSTS_IISOIXFR_Pos|macro|USB_OTG_GINTSTS_IISOIXFR_Pos
DECL|USB_OTG_GINTSTS_IISOIXFR|macro|USB_OTG_GINTSTS_IISOIXFR
DECL|USB_OTG_GINTSTS_ISOODRP_Msk|macro|USB_OTG_GINTSTS_ISOODRP_Msk
DECL|USB_OTG_GINTSTS_ISOODRP_Pos|macro|USB_OTG_GINTSTS_ISOODRP_Pos
DECL|USB_OTG_GINTSTS_ISOODRP|macro|USB_OTG_GINTSTS_ISOODRP
DECL|USB_OTG_GINTSTS_LPMINT_Msk|macro|USB_OTG_GINTSTS_LPMINT_Msk
DECL|USB_OTG_GINTSTS_LPMINT_Pos|macro|USB_OTG_GINTSTS_LPMINT_Pos
DECL|USB_OTG_GINTSTS_LPMINT|macro|USB_OTG_GINTSTS_LPMINT
DECL|USB_OTG_GINTSTS_MMIS_Msk|macro|USB_OTG_GINTSTS_MMIS_Msk
DECL|USB_OTG_GINTSTS_MMIS_Pos|macro|USB_OTG_GINTSTS_MMIS_Pos
DECL|USB_OTG_GINTSTS_MMIS|macro|USB_OTG_GINTSTS_MMIS
DECL|USB_OTG_GINTSTS_NPTXFE_Msk|macro|USB_OTG_GINTSTS_NPTXFE_Msk
DECL|USB_OTG_GINTSTS_NPTXFE_Pos|macro|USB_OTG_GINTSTS_NPTXFE_Pos
DECL|USB_OTG_GINTSTS_NPTXFE|macro|USB_OTG_GINTSTS_NPTXFE
DECL|USB_OTG_GINTSTS_OEPINT_Msk|macro|USB_OTG_GINTSTS_OEPINT_Msk
DECL|USB_OTG_GINTSTS_OEPINT_Pos|macro|USB_OTG_GINTSTS_OEPINT_Pos
DECL|USB_OTG_GINTSTS_OEPINT|macro|USB_OTG_GINTSTS_OEPINT
DECL|USB_OTG_GINTSTS_OTGINT_Msk|macro|USB_OTG_GINTSTS_OTGINT_Msk
DECL|USB_OTG_GINTSTS_OTGINT_Pos|macro|USB_OTG_GINTSTS_OTGINT_Pos
DECL|USB_OTG_GINTSTS_OTGINT|macro|USB_OTG_GINTSTS_OTGINT
DECL|USB_OTG_GINTSTS_PTXFE_Msk|macro|USB_OTG_GINTSTS_PTXFE_Msk
DECL|USB_OTG_GINTSTS_PTXFE_Pos|macro|USB_OTG_GINTSTS_PTXFE_Pos
DECL|USB_OTG_GINTSTS_PTXFE|macro|USB_OTG_GINTSTS_PTXFE
DECL|USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk|macro|USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk
DECL|USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos|macro|USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos
DECL|USB_OTG_GINTSTS_PXFR_INCOMPISOOUT|macro|USB_OTG_GINTSTS_PXFR_INCOMPISOOUT
DECL|USB_OTG_GINTSTS_RSTDET_Msk|macro|USB_OTG_GINTSTS_RSTDET_Msk
DECL|USB_OTG_GINTSTS_RSTDET_Pos|macro|USB_OTG_GINTSTS_RSTDET_Pos
DECL|USB_OTG_GINTSTS_RSTDET|macro|USB_OTG_GINTSTS_RSTDET
DECL|USB_OTG_GINTSTS_RXFLVL_Msk|macro|USB_OTG_GINTSTS_RXFLVL_Msk
DECL|USB_OTG_GINTSTS_RXFLVL_Pos|macro|USB_OTG_GINTSTS_RXFLVL_Pos
DECL|USB_OTG_GINTSTS_RXFLVL|macro|USB_OTG_GINTSTS_RXFLVL
DECL|USB_OTG_GINTSTS_SOF_Msk|macro|USB_OTG_GINTSTS_SOF_Msk
DECL|USB_OTG_GINTSTS_SOF_Pos|macro|USB_OTG_GINTSTS_SOF_Pos
DECL|USB_OTG_GINTSTS_SOF|macro|USB_OTG_GINTSTS_SOF
DECL|USB_OTG_GINTSTS_SRQINT_Msk|macro|USB_OTG_GINTSTS_SRQINT_Msk
DECL|USB_OTG_GINTSTS_SRQINT_Pos|macro|USB_OTG_GINTSTS_SRQINT_Pos
DECL|USB_OTG_GINTSTS_SRQINT|macro|USB_OTG_GINTSTS_SRQINT
DECL|USB_OTG_GINTSTS_USBRST_Msk|macro|USB_OTG_GINTSTS_USBRST_Msk
DECL|USB_OTG_GINTSTS_USBRST_Pos|macro|USB_OTG_GINTSTS_USBRST_Pos
DECL|USB_OTG_GINTSTS_USBRST|macro|USB_OTG_GINTSTS_USBRST
DECL|USB_OTG_GINTSTS_USBSUSP_Msk|macro|USB_OTG_GINTSTS_USBSUSP_Msk
DECL|USB_OTG_GINTSTS_USBSUSP_Pos|macro|USB_OTG_GINTSTS_USBSUSP_Pos
DECL|USB_OTG_GINTSTS_USBSUSP|macro|USB_OTG_GINTSTS_USBSUSP
DECL|USB_OTG_GINTSTS_WKUINT_Msk|macro|USB_OTG_GINTSTS_WKUINT_Msk
DECL|USB_OTG_GINTSTS_WKUINT_Pos|macro|USB_OTG_GINTSTS_WKUINT_Pos
DECL|USB_OTG_GINTSTS_WKUINT|macro|USB_OTG_GINTSTS_WKUINT
DECL|USB_OTG_GLOBAL_BASE|macro|USB_OTG_GLOBAL_BASE
DECL|USB_OTG_GLPMCFG_BESLTHRS_Msk|macro|USB_OTG_GLPMCFG_BESLTHRS_Msk
DECL|USB_OTG_GLPMCFG_BESLTHRS_Pos|macro|USB_OTG_GLPMCFG_BESLTHRS_Pos
DECL|USB_OTG_GLPMCFG_BESLTHRS|macro|USB_OTG_GLPMCFG_BESLTHRS
DECL|USB_OTG_GLPMCFG_BESL_Msk|macro|USB_OTG_GLPMCFG_BESL_Msk
DECL|USB_OTG_GLPMCFG_BESL_Pos|macro|USB_OTG_GLPMCFG_BESL_Pos
DECL|USB_OTG_GLPMCFG_BESL|macro|USB_OTG_GLPMCFG_BESL
DECL|USB_OTG_GLPMCFG_ENBESL_Msk|macro|USB_OTG_GLPMCFG_ENBESL_Msk
DECL|USB_OTG_GLPMCFG_ENBESL_Pos|macro|USB_OTG_GLPMCFG_ENBESL_Pos
DECL|USB_OTG_GLPMCFG_ENBESL|macro|USB_OTG_GLPMCFG_ENBESL
DECL|USB_OTG_GLPMCFG_L1DSEN_Msk|macro|USB_OTG_GLPMCFG_L1DSEN_Msk
DECL|USB_OTG_GLPMCFG_L1DSEN_Pos|macro|USB_OTG_GLPMCFG_L1DSEN_Pos
DECL|USB_OTG_GLPMCFG_L1DSEN|macro|USB_OTG_GLPMCFG_L1DSEN
DECL|USB_OTG_GLPMCFG_L1RSMOK_Msk|macro|USB_OTG_GLPMCFG_L1RSMOK_Msk
DECL|USB_OTG_GLPMCFG_L1RSMOK_Pos|macro|USB_OTG_GLPMCFG_L1RSMOK_Pos
DECL|USB_OTG_GLPMCFG_L1RSMOK|macro|USB_OTG_GLPMCFG_L1RSMOK
DECL|USB_OTG_GLPMCFG_L1SSEN_Msk|macro|USB_OTG_GLPMCFG_L1SSEN_Msk
DECL|USB_OTG_GLPMCFG_L1SSEN_Pos|macro|USB_OTG_GLPMCFG_L1SSEN_Pos
DECL|USB_OTG_GLPMCFG_L1SSEN|macro|USB_OTG_GLPMCFG_L1SSEN
DECL|USB_OTG_GLPMCFG_LPMACK_Msk|macro|USB_OTG_GLPMCFG_LPMACK_Msk
DECL|USB_OTG_GLPMCFG_LPMACK_Pos|macro|USB_OTG_GLPMCFG_LPMACK_Pos
DECL|USB_OTG_GLPMCFG_LPMACK|macro|USB_OTG_GLPMCFG_LPMACK
DECL|USB_OTG_GLPMCFG_LPMCHIDX_Msk|macro|USB_OTG_GLPMCFG_LPMCHIDX_Msk
DECL|USB_OTG_GLPMCFG_LPMCHIDX_Pos|macro|USB_OTG_GLPMCFG_LPMCHIDX_Pos
DECL|USB_OTG_GLPMCFG_LPMCHIDX|macro|USB_OTG_GLPMCFG_LPMCHIDX
DECL|USB_OTG_GLPMCFG_LPMEN_Msk|macro|USB_OTG_GLPMCFG_LPMEN_Msk
DECL|USB_OTG_GLPMCFG_LPMEN_Pos|macro|USB_OTG_GLPMCFG_LPMEN_Pos
DECL|USB_OTG_GLPMCFG_LPMEN|macro|USB_OTG_GLPMCFG_LPMEN
DECL|USB_OTG_GLPMCFG_LPMRCNTSTS_Msk|macro|USB_OTG_GLPMCFG_LPMRCNTSTS_Msk
DECL|USB_OTG_GLPMCFG_LPMRCNTSTS_Pos|macro|USB_OTG_GLPMCFG_LPMRCNTSTS_Pos
DECL|USB_OTG_GLPMCFG_LPMRCNTSTS|macro|USB_OTG_GLPMCFG_LPMRCNTSTS
DECL|USB_OTG_GLPMCFG_LPMRCNT_Msk|macro|USB_OTG_GLPMCFG_LPMRCNT_Msk
DECL|USB_OTG_GLPMCFG_LPMRCNT_Pos|macro|USB_OTG_GLPMCFG_LPMRCNT_Pos
DECL|USB_OTG_GLPMCFG_LPMRCNT|macro|USB_OTG_GLPMCFG_LPMRCNT
DECL|USB_OTG_GLPMCFG_LPMRSP_Msk|macro|USB_OTG_GLPMCFG_LPMRSP_Msk
DECL|USB_OTG_GLPMCFG_LPMRSP_Pos|macro|USB_OTG_GLPMCFG_LPMRSP_Pos
DECL|USB_OTG_GLPMCFG_LPMRSP|macro|USB_OTG_GLPMCFG_LPMRSP
DECL|USB_OTG_GLPMCFG_REMWAKE_Msk|macro|USB_OTG_GLPMCFG_REMWAKE_Msk
DECL|USB_OTG_GLPMCFG_REMWAKE_Pos|macro|USB_OTG_GLPMCFG_REMWAKE_Pos
DECL|USB_OTG_GLPMCFG_REMWAKE|macro|USB_OTG_GLPMCFG_REMWAKE
DECL|USB_OTG_GLPMCFG_SLPSTS_Msk|macro|USB_OTG_GLPMCFG_SLPSTS_Msk
DECL|USB_OTG_GLPMCFG_SLPSTS_Pos|macro|USB_OTG_GLPMCFG_SLPSTS_Pos
DECL|USB_OTG_GLPMCFG_SLPSTS|macro|USB_OTG_GLPMCFG_SLPSTS
DECL|USB_OTG_GLPMCFG_SNDLPM_Msk|macro|USB_OTG_GLPMCFG_SNDLPM_Msk
DECL|USB_OTG_GLPMCFG_SNDLPM_Pos|macro|USB_OTG_GLPMCFG_SNDLPM_Pos
DECL|USB_OTG_GLPMCFG_SNDLPM|macro|USB_OTG_GLPMCFG_SNDLPM
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_0|macro|USB_OTG_GNPTXSTS_NPTQXSAV_0
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_1|macro|USB_OTG_GNPTXSTS_NPTQXSAV_1
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_2|macro|USB_OTG_GNPTXSTS_NPTQXSAV_2
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_3|macro|USB_OTG_GNPTXSTS_NPTQXSAV_3
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_4|macro|USB_OTG_GNPTXSTS_NPTQXSAV_4
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_5|macro|USB_OTG_GNPTXSTS_NPTQXSAV_5
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_6|macro|USB_OTG_GNPTXSTS_NPTQXSAV_6
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_7|macro|USB_OTG_GNPTXSTS_NPTQXSAV_7
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_Msk|macro|USB_OTG_GNPTXSTS_NPTQXSAV_Msk
DECL|USB_OTG_GNPTXSTS_NPTQXSAV_Pos|macro|USB_OTG_GNPTXSTS_NPTQXSAV_Pos
DECL|USB_OTG_GNPTXSTS_NPTQXSAV|macro|USB_OTG_GNPTXSTS_NPTQXSAV
DECL|USB_OTG_GNPTXSTS_NPTXFSAV_Msk|macro|USB_OTG_GNPTXSTS_NPTXFSAV_Msk
DECL|USB_OTG_GNPTXSTS_NPTXFSAV_Pos|macro|USB_OTG_GNPTXSTS_NPTXFSAV_Pos
DECL|USB_OTG_GNPTXSTS_NPTXFSAV|macro|USB_OTG_GNPTXSTS_NPTXFSAV
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_0|macro|USB_OTG_GNPTXSTS_NPTXQTOP_0
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_1|macro|USB_OTG_GNPTXSTS_NPTXQTOP_1
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_2|macro|USB_OTG_GNPTXSTS_NPTXQTOP_2
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_3|macro|USB_OTG_GNPTXSTS_NPTXQTOP_3
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_4|macro|USB_OTG_GNPTXSTS_NPTXQTOP_4
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_5|macro|USB_OTG_GNPTXSTS_NPTXQTOP_5
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_6|macro|USB_OTG_GNPTXSTS_NPTXQTOP_6
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_Msk|macro|USB_OTG_GNPTXSTS_NPTXQTOP_Msk
DECL|USB_OTG_GNPTXSTS_NPTXQTOP_Pos|macro|USB_OTG_GNPTXSTS_NPTXQTOP_Pos
DECL|USB_OTG_GNPTXSTS_NPTXQTOP|macro|USB_OTG_GNPTXSTS_NPTXQTOP
DECL|USB_OTG_GOTGCTL_ASVLD_Msk|macro|USB_OTG_GOTGCTL_ASVLD_Msk
DECL|USB_OTG_GOTGCTL_ASVLD_Pos|macro|USB_OTG_GOTGCTL_ASVLD_Pos
DECL|USB_OTG_GOTGCTL_ASVLD|macro|USB_OTG_GOTGCTL_ASVLD
DECL|USB_OTG_GOTGCTL_AVALOEN_Msk|macro|USB_OTG_GOTGCTL_AVALOEN_Msk
DECL|USB_OTG_GOTGCTL_AVALOEN_Pos|macro|USB_OTG_GOTGCTL_AVALOEN_Pos
DECL|USB_OTG_GOTGCTL_AVALOEN|macro|USB_OTG_GOTGCTL_AVALOEN
DECL|USB_OTG_GOTGCTL_AVALOVAL_Msk|macro|USB_OTG_GOTGCTL_AVALOVAL_Msk
DECL|USB_OTG_GOTGCTL_AVALOVAL_Pos|macro|USB_OTG_GOTGCTL_AVALOVAL_Pos
DECL|USB_OTG_GOTGCTL_AVALOVAL|macro|USB_OTG_GOTGCTL_AVALOVAL
DECL|USB_OTG_GOTGCTL_BSESVLD_Msk|macro|USB_OTG_GOTGCTL_BSESVLD_Msk
DECL|USB_OTG_GOTGCTL_BSESVLD_Pos|macro|USB_OTG_GOTGCTL_BSESVLD_Pos
DECL|USB_OTG_GOTGCTL_BSESVLD|macro|USB_OTG_GOTGCTL_BSESVLD
DECL|USB_OTG_GOTGCTL_BVALOEN_Msk|macro|USB_OTG_GOTGCTL_BVALOEN_Msk
DECL|USB_OTG_GOTGCTL_BVALOEN_Pos|macro|USB_OTG_GOTGCTL_BVALOEN_Pos
DECL|USB_OTG_GOTGCTL_BVALOEN|macro|USB_OTG_GOTGCTL_BVALOEN
DECL|USB_OTG_GOTGCTL_BVALOVAL_Msk|macro|USB_OTG_GOTGCTL_BVALOVAL_Msk
DECL|USB_OTG_GOTGCTL_BVALOVAL_Pos|macro|USB_OTG_GOTGCTL_BVALOVAL_Pos
DECL|USB_OTG_GOTGCTL_BVALOVAL|macro|USB_OTG_GOTGCTL_BVALOVAL
DECL|USB_OTG_GOTGCTL_CIDSTS_Msk|macro|USB_OTG_GOTGCTL_CIDSTS_Msk
DECL|USB_OTG_GOTGCTL_CIDSTS_Pos|macro|USB_OTG_GOTGCTL_CIDSTS_Pos
DECL|USB_OTG_GOTGCTL_CIDSTS|macro|USB_OTG_GOTGCTL_CIDSTS
DECL|USB_OTG_GOTGCTL_DBCT_Msk|macro|USB_OTG_GOTGCTL_DBCT_Msk
DECL|USB_OTG_GOTGCTL_DBCT_Pos|macro|USB_OTG_GOTGCTL_DBCT_Pos
DECL|USB_OTG_GOTGCTL_DBCT|macro|USB_OTG_GOTGCTL_DBCT
DECL|USB_OTG_GOTGCTL_DHNPEN_Msk|macro|USB_OTG_GOTGCTL_DHNPEN_Msk
DECL|USB_OTG_GOTGCTL_DHNPEN_Pos|macro|USB_OTG_GOTGCTL_DHNPEN_Pos
DECL|USB_OTG_GOTGCTL_DHNPEN|macro|USB_OTG_GOTGCTL_DHNPEN
DECL|USB_OTG_GOTGCTL_EHEN_Msk|macro|USB_OTG_GOTGCTL_EHEN_Msk
DECL|USB_OTG_GOTGCTL_EHEN_Pos|macro|USB_OTG_GOTGCTL_EHEN_Pos
DECL|USB_OTG_GOTGCTL_EHEN|macro|USB_OTG_GOTGCTL_EHEN
DECL|USB_OTG_GOTGCTL_HNGSCS_Msk|macro|USB_OTG_GOTGCTL_HNGSCS_Msk
DECL|USB_OTG_GOTGCTL_HNGSCS_Pos|macro|USB_OTG_GOTGCTL_HNGSCS_Pos
DECL|USB_OTG_GOTGCTL_HNGSCS|macro|USB_OTG_GOTGCTL_HNGSCS
DECL|USB_OTG_GOTGCTL_HNPRQ_Msk|macro|USB_OTG_GOTGCTL_HNPRQ_Msk
DECL|USB_OTG_GOTGCTL_HNPRQ_Pos|macro|USB_OTG_GOTGCTL_HNPRQ_Pos
DECL|USB_OTG_GOTGCTL_HNPRQ|macro|USB_OTG_GOTGCTL_HNPRQ
DECL|USB_OTG_GOTGCTL_HSHNPEN_Msk|macro|USB_OTG_GOTGCTL_HSHNPEN_Msk
DECL|USB_OTG_GOTGCTL_HSHNPEN_Pos|macro|USB_OTG_GOTGCTL_HSHNPEN_Pos
DECL|USB_OTG_GOTGCTL_HSHNPEN|macro|USB_OTG_GOTGCTL_HSHNPEN
DECL|USB_OTG_GOTGCTL_OTGVER_Msk|macro|USB_OTG_GOTGCTL_OTGVER_Msk
DECL|USB_OTG_GOTGCTL_OTGVER_Pos|macro|USB_OTG_GOTGCTL_OTGVER_Pos
DECL|USB_OTG_GOTGCTL_OTGVER|macro|USB_OTG_GOTGCTL_OTGVER
DECL|USB_OTG_GOTGCTL_SRQSCS_Msk|macro|USB_OTG_GOTGCTL_SRQSCS_Msk
DECL|USB_OTG_GOTGCTL_SRQSCS_Pos|macro|USB_OTG_GOTGCTL_SRQSCS_Pos
DECL|USB_OTG_GOTGCTL_SRQSCS|macro|USB_OTG_GOTGCTL_SRQSCS
DECL|USB_OTG_GOTGCTL_SRQ_Msk|macro|USB_OTG_GOTGCTL_SRQ_Msk
DECL|USB_OTG_GOTGCTL_SRQ_Pos|macro|USB_OTG_GOTGCTL_SRQ_Pos
DECL|USB_OTG_GOTGCTL_SRQ|macro|USB_OTG_GOTGCTL_SRQ
DECL|USB_OTG_GOTGCTL_VBVALOEN_Msk|macro|USB_OTG_GOTGCTL_VBVALOEN_Msk
DECL|USB_OTG_GOTGCTL_VBVALOEN_Pos|macro|USB_OTG_GOTGCTL_VBVALOEN_Pos
DECL|USB_OTG_GOTGCTL_VBVALOEN|macro|USB_OTG_GOTGCTL_VBVALOEN
DECL|USB_OTG_GOTGCTL_VBVALOVAL_Msk|macro|USB_OTG_GOTGCTL_VBVALOVAL_Msk
DECL|USB_OTG_GOTGCTL_VBVALOVAL_Pos|macro|USB_OTG_GOTGCTL_VBVALOVAL_Pos
DECL|USB_OTG_GOTGCTL_VBVALOVAL|macro|USB_OTG_GOTGCTL_VBVALOVAL
DECL|USB_OTG_GOTGINT_ADTOCHG_Msk|macro|USB_OTG_GOTGINT_ADTOCHG_Msk
DECL|USB_OTG_GOTGINT_ADTOCHG_Pos|macro|USB_OTG_GOTGINT_ADTOCHG_Pos
DECL|USB_OTG_GOTGINT_ADTOCHG|macro|USB_OTG_GOTGINT_ADTOCHG
DECL|USB_OTG_GOTGINT_DBCDNE_Msk|macro|USB_OTG_GOTGINT_DBCDNE_Msk
DECL|USB_OTG_GOTGINT_DBCDNE_Pos|macro|USB_OTG_GOTGINT_DBCDNE_Pos
DECL|USB_OTG_GOTGINT_DBCDNE|macro|USB_OTG_GOTGINT_DBCDNE
DECL|USB_OTG_GOTGINT_HNGDET_Msk|macro|USB_OTG_GOTGINT_HNGDET_Msk
DECL|USB_OTG_GOTGINT_HNGDET_Pos|macro|USB_OTG_GOTGINT_HNGDET_Pos
DECL|USB_OTG_GOTGINT_HNGDET|macro|USB_OTG_GOTGINT_HNGDET
DECL|USB_OTG_GOTGINT_HNSSCHG_Msk|macro|USB_OTG_GOTGINT_HNSSCHG_Msk
DECL|USB_OTG_GOTGINT_HNSSCHG_Pos|macro|USB_OTG_GOTGINT_HNSSCHG_Pos
DECL|USB_OTG_GOTGINT_HNSSCHG|macro|USB_OTG_GOTGINT_HNSSCHG
DECL|USB_OTG_GOTGINT_IDCHNG_Msk|macro|USB_OTG_GOTGINT_IDCHNG_Msk
DECL|USB_OTG_GOTGINT_IDCHNG_Pos|macro|USB_OTG_GOTGINT_IDCHNG_Pos
DECL|USB_OTG_GOTGINT_IDCHNG|macro|USB_OTG_GOTGINT_IDCHNG
DECL|USB_OTG_GOTGINT_SEDET_Msk|macro|USB_OTG_GOTGINT_SEDET_Msk
DECL|USB_OTG_GOTGINT_SEDET_Pos|macro|USB_OTG_GOTGINT_SEDET_Pos
DECL|USB_OTG_GOTGINT_SEDET|macro|USB_OTG_GOTGINT_SEDET
DECL|USB_OTG_GOTGINT_SRSSCHG_Msk|macro|USB_OTG_GOTGINT_SRSSCHG_Msk
DECL|USB_OTG_GOTGINT_SRSSCHG_Pos|macro|USB_OTG_GOTGINT_SRSSCHG_Pos
DECL|USB_OTG_GOTGINT_SRSSCHG|macro|USB_OTG_GOTGINT_SRSSCHG
DECL|USB_OTG_GPWRDN_ADPIF_Msk|macro|USB_OTG_GPWRDN_ADPIF_Msk
DECL|USB_OTG_GPWRDN_ADPIF_Pos|macro|USB_OTG_GPWRDN_ADPIF_Pos
DECL|USB_OTG_GPWRDN_ADPIF|macro|USB_OTG_GPWRDN_ADPIF
DECL|USB_OTG_GPWRDN_ADPMEN_Msk|macro|USB_OTG_GPWRDN_ADPMEN_Msk
DECL|USB_OTG_GPWRDN_ADPMEN_Pos|macro|USB_OTG_GPWRDN_ADPMEN_Pos
DECL|USB_OTG_GPWRDN_ADPMEN|macro|USB_OTG_GPWRDN_ADPMEN
DECL|USB_OTG_GRSTCTL_AHBIDL_Msk|macro|USB_OTG_GRSTCTL_AHBIDL_Msk
DECL|USB_OTG_GRSTCTL_AHBIDL_Pos|macro|USB_OTG_GRSTCTL_AHBIDL_Pos
DECL|USB_OTG_GRSTCTL_AHBIDL|macro|USB_OTG_GRSTCTL_AHBIDL
DECL|USB_OTG_GRSTCTL_CSRST_Msk|macro|USB_OTG_GRSTCTL_CSRST_Msk
DECL|USB_OTG_GRSTCTL_CSRST_Pos|macro|USB_OTG_GRSTCTL_CSRST_Pos
DECL|USB_OTG_GRSTCTL_CSRST|macro|USB_OTG_GRSTCTL_CSRST
DECL|USB_OTG_GRSTCTL_DMAREQ_Msk|macro|USB_OTG_GRSTCTL_DMAREQ_Msk
DECL|USB_OTG_GRSTCTL_DMAREQ_Pos|macro|USB_OTG_GRSTCTL_DMAREQ_Pos
DECL|USB_OTG_GRSTCTL_DMAREQ|macro|USB_OTG_GRSTCTL_DMAREQ
DECL|USB_OTG_GRSTCTL_FCRST_Msk|macro|USB_OTG_GRSTCTL_FCRST_Msk
DECL|USB_OTG_GRSTCTL_FCRST_Pos|macro|USB_OTG_GRSTCTL_FCRST_Pos
DECL|USB_OTG_GRSTCTL_FCRST|macro|USB_OTG_GRSTCTL_FCRST
DECL|USB_OTG_GRSTCTL_HSRST_Msk|macro|USB_OTG_GRSTCTL_HSRST_Msk
DECL|USB_OTG_GRSTCTL_HSRST_Pos|macro|USB_OTG_GRSTCTL_HSRST_Pos
DECL|USB_OTG_GRSTCTL_HSRST|macro|USB_OTG_GRSTCTL_HSRST
DECL|USB_OTG_GRSTCTL_RXFFLSH_Msk|macro|USB_OTG_GRSTCTL_RXFFLSH_Msk
DECL|USB_OTG_GRSTCTL_RXFFLSH_Pos|macro|USB_OTG_GRSTCTL_RXFFLSH_Pos
DECL|USB_OTG_GRSTCTL_RXFFLSH|macro|USB_OTG_GRSTCTL_RXFFLSH
DECL|USB_OTG_GRSTCTL_TXFFLSH_Msk|macro|USB_OTG_GRSTCTL_TXFFLSH_Msk
DECL|USB_OTG_GRSTCTL_TXFFLSH_Pos|macro|USB_OTG_GRSTCTL_TXFFLSH_Pos
DECL|USB_OTG_GRSTCTL_TXFFLSH|macro|USB_OTG_GRSTCTL_TXFFLSH
DECL|USB_OTG_GRSTCTL_TXFNUM_0|macro|USB_OTG_GRSTCTL_TXFNUM_0
DECL|USB_OTG_GRSTCTL_TXFNUM_1|macro|USB_OTG_GRSTCTL_TXFNUM_1
DECL|USB_OTG_GRSTCTL_TXFNUM_2|macro|USB_OTG_GRSTCTL_TXFNUM_2
DECL|USB_OTG_GRSTCTL_TXFNUM_3|macro|USB_OTG_GRSTCTL_TXFNUM_3
DECL|USB_OTG_GRSTCTL_TXFNUM_4|macro|USB_OTG_GRSTCTL_TXFNUM_4
DECL|USB_OTG_GRSTCTL_TXFNUM_Msk|macro|USB_OTG_GRSTCTL_TXFNUM_Msk
DECL|USB_OTG_GRSTCTL_TXFNUM_Pos|macro|USB_OTG_GRSTCTL_TXFNUM_Pos
DECL|USB_OTG_GRSTCTL_TXFNUM|macro|USB_OTG_GRSTCTL_TXFNUM
DECL|USB_OTG_GRXFSIZ_RXFD_Msk|macro|USB_OTG_GRXFSIZ_RXFD_Msk
DECL|USB_OTG_GRXFSIZ_RXFD_Pos|macro|USB_OTG_GRXFSIZ_RXFD_Pos
DECL|USB_OTG_GRXFSIZ_RXFD|macro|USB_OTG_GRXFSIZ_RXFD
DECL|USB_OTG_GRXSTSP_BCNT_Msk|macro|USB_OTG_GRXSTSP_BCNT_Msk
DECL|USB_OTG_GRXSTSP_BCNT_Pos|macro|USB_OTG_GRXSTSP_BCNT_Pos
DECL|USB_OTG_GRXSTSP_BCNT|macro|USB_OTG_GRXSTSP_BCNT
DECL|USB_OTG_GRXSTSP_DPID_Msk|macro|USB_OTG_GRXSTSP_DPID_Msk
DECL|USB_OTG_GRXSTSP_DPID_Pos|macro|USB_OTG_GRXSTSP_DPID_Pos
DECL|USB_OTG_GRXSTSP_DPID|macro|USB_OTG_GRXSTSP_DPID
DECL|USB_OTG_GRXSTSP_EPNUM_Msk|macro|USB_OTG_GRXSTSP_EPNUM_Msk
DECL|USB_OTG_GRXSTSP_EPNUM_Pos|macro|USB_OTG_GRXSTSP_EPNUM_Pos
DECL|USB_OTG_GRXSTSP_EPNUM|macro|USB_OTG_GRXSTSP_EPNUM
DECL|USB_OTG_GRXSTSP_PKTSTS_Msk|macro|USB_OTG_GRXSTSP_PKTSTS_Msk
DECL|USB_OTG_GRXSTSP_PKTSTS_Pos|macro|USB_OTG_GRXSTSP_PKTSTS_Pos
DECL|USB_OTG_GRXSTSP_PKTSTS|macro|USB_OTG_GRXSTSP_PKTSTS
DECL|USB_OTG_GUSBCFG_CTXPKT_Msk|macro|USB_OTG_GUSBCFG_CTXPKT_Msk
DECL|USB_OTG_GUSBCFG_CTXPKT_Pos|macro|USB_OTG_GUSBCFG_CTXPKT_Pos
DECL|USB_OTG_GUSBCFG_CTXPKT|macro|USB_OTG_GUSBCFG_CTXPKT
DECL|USB_OTG_GUSBCFG_FDMOD_Msk|macro|USB_OTG_GUSBCFG_FDMOD_Msk
DECL|USB_OTG_GUSBCFG_FDMOD_Pos|macro|USB_OTG_GUSBCFG_FDMOD_Pos
DECL|USB_OTG_GUSBCFG_FDMOD|macro|USB_OTG_GUSBCFG_FDMOD
DECL|USB_OTG_GUSBCFG_FHMOD_Msk|macro|USB_OTG_GUSBCFG_FHMOD_Msk
DECL|USB_OTG_GUSBCFG_FHMOD_Pos|macro|USB_OTG_GUSBCFG_FHMOD_Pos
DECL|USB_OTG_GUSBCFG_FHMOD|macro|USB_OTG_GUSBCFG_FHMOD
DECL|USB_OTG_GUSBCFG_HNPCAP_Msk|macro|USB_OTG_GUSBCFG_HNPCAP_Msk
DECL|USB_OTG_GUSBCFG_HNPCAP_Pos|macro|USB_OTG_GUSBCFG_HNPCAP_Pos
DECL|USB_OTG_GUSBCFG_HNPCAP|macro|USB_OTG_GUSBCFG_HNPCAP
DECL|USB_OTG_GUSBCFG_PCCI_Msk|macro|USB_OTG_GUSBCFG_PCCI_Msk
DECL|USB_OTG_GUSBCFG_PCCI_Pos|macro|USB_OTG_GUSBCFG_PCCI_Pos
DECL|USB_OTG_GUSBCFG_PCCI|macro|USB_OTG_GUSBCFG_PCCI
DECL|USB_OTG_GUSBCFG_PHYLPCS_Msk|macro|USB_OTG_GUSBCFG_PHYLPCS_Msk
DECL|USB_OTG_GUSBCFG_PHYLPCS_Pos|macro|USB_OTG_GUSBCFG_PHYLPCS_Pos
DECL|USB_OTG_GUSBCFG_PHYLPCS|macro|USB_OTG_GUSBCFG_PHYLPCS
DECL|USB_OTG_GUSBCFG_PHYSEL_Msk|macro|USB_OTG_GUSBCFG_PHYSEL_Msk
DECL|USB_OTG_GUSBCFG_PHYSEL_Pos|macro|USB_OTG_GUSBCFG_PHYSEL_Pos
DECL|USB_OTG_GUSBCFG_PHYSEL|macro|USB_OTG_GUSBCFG_PHYSEL
DECL|USB_OTG_GUSBCFG_PTCI_Msk|macro|USB_OTG_GUSBCFG_PTCI_Msk
DECL|USB_OTG_GUSBCFG_PTCI_Pos|macro|USB_OTG_GUSBCFG_PTCI_Pos
DECL|USB_OTG_GUSBCFG_PTCI|macro|USB_OTG_GUSBCFG_PTCI
DECL|USB_OTG_GUSBCFG_SRPCAP_Msk|macro|USB_OTG_GUSBCFG_SRPCAP_Msk
DECL|USB_OTG_GUSBCFG_SRPCAP_Pos|macro|USB_OTG_GUSBCFG_SRPCAP_Pos
DECL|USB_OTG_GUSBCFG_SRPCAP|macro|USB_OTG_GUSBCFG_SRPCAP
DECL|USB_OTG_GUSBCFG_TOCAL_0|macro|USB_OTG_GUSBCFG_TOCAL_0
DECL|USB_OTG_GUSBCFG_TOCAL_1|macro|USB_OTG_GUSBCFG_TOCAL_1
DECL|USB_OTG_GUSBCFG_TOCAL_2|macro|USB_OTG_GUSBCFG_TOCAL_2
DECL|USB_OTG_GUSBCFG_TOCAL_Msk|macro|USB_OTG_GUSBCFG_TOCAL_Msk
DECL|USB_OTG_GUSBCFG_TOCAL_Pos|macro|USB_OTG_GUSBCFG_TOCAL_Pos
DECL|USB_OTG_GUSBCFG_TOCAL|macro|USB_OTG_GUSBCFG_TOCAL
DECL|USB_OTG_GUSBCFG_TRDT_0|macro|USB_OTG_GUSBCFG_TRDT_0
DECL|USB_OTG_GUSBCFG_TRDT_1|macro|USB_OTG_GUSBCFG_TRDT_1
DECL|USB_OTG_GUSBCFG_TRDT_2|macro|USB_OTG_GUSBCFG_TRDT_2
DECL|USB_OTG_GUSBCFG_TRDT_3|macro|USB_OTG_GUSBCFG_TRDT_3
DECL|USB_OTG_GUSBCFG_TRDT_Msk|macro|USB_OTG_GUSBCFG_TRDT_Msk
DECL|USB_OTG_GUSBCFG_TRDT_Pos|macro|USB_OTG_GUSBCFG_TRDT_Pos
DECL|USB_OTG_GUSBCFG_TRDT|macro|USB_OTG_GUSBCFG_TRDT
DECL|USB_OTG_GUSBCFG_TSDPS_Msk|macro|USB_OTG_GUSBCFG_TSDPS_Msk
DECL|USB_OTG_GUSBCFG_TSDPS_Pos|macro|USB_OTG_GUSBCFG_TSDPS_Pos
DECL|USB_OTG_GUSBCFG_TSDPS|macro|USB_OTG_GUSBCFG_TSDPS
DECL|USB_OTG_GUSBCFG_ULPIAR_Msk|macro|USB_OTG_GUSBCFG_ULPIAR_Msk
DECL|USB_OTG_GUSBCFG_ULPIAR_Pos|macro|USB_OTG_GUSBCFG_ULPIAR_Pos
DECL|USB_OTG_GUSBCFG_ULPIAR|macro|USB_OTG_GUSBCFG_ULPIAR
DECL|USB_OTG_GUSBCFG_ULPICSM_Msk|macro|USB_OTG_GUSBCFG_ULPICSM_Msk
DECL|USB_OTG_GUSBCFG_ULPICSM_Pos|macro|USB_OTG_GUSBCFG_ULPICSM_Pos
DECL|USB_OTG_GUSBCFG_ULPICSM|macro|USB_OTG_GUSBCFG_ULPICSM
DECL|USB_OTG_GUSBCFG_ULPIEVBUSD_Msk|macro|USB_OTG_GUSBCFG_ULPIEVBUSD_Msk
DECL|USB_OTG_GUSBCFG_ULPIEVBUSD_Pos|macro|USB_OTG_GUSBCFG_ULPIEVBUSD_Pos
DECL|USB_OTG_GUSBCFG_ULPIEVBUSD|macro|USB_OTG_GUSBCFG_ULPIEVBUSD
DECL|USB_OTG_GUSBCFG_ULPIEVBUSI_Msk|macro|USB_OTG_GUSBCFG_ULPIEVBUSI_Msk
DECL|USB_OTG_GUSBCFG_ULPIEVBUSI_Pos|macro|USB_OTG_GUSBCFG_ULPIEVBUSI_Pos
DECL|USB_OTG_GUSBCFG_ULPIEVBUSI|macro|USB_OTG_GUSBCFG_ULPIEVBUSI
DECL|USB_OTG_GUSBCFG_ULPIFSLS_Msk|macro|USB_OTG_GUSBCFG_ULPIFSLS_Msk
DECL|USB_OTG_GUSBCFG_ULPIFSLS_Pos|macro|USB_OTG_GUSBCFG_ULPIFSLS_Pos
DECL|USB_OTG_GUSBCFG_ULPIFSLS|macro|USB_OTG_GUSBCFG_ULPIFSLS
DECL|USB_OTG_GUSBCFG_ULPIIPD_Msk|macro|USB_OTG_GUSBCFG_ULPIIPD_Msk
DECL|USB_OTG_GUSBCFG_ULPIIPD_Pos|macro|USB_OTG_GUSBCFG_ULPIIPD_Pos
DECL|USB_OTG_GUSBCFG_ULPIIPD|macro|USB_OTG_GUSBCFG_ULPIIPD
DECL|USB_OTG_GlobalTypeDef|typedef|} USB_OTG_GlobalTypeDef;
DECL|USB_OTG_HAINTMSK_HAINTM_Msk|macro|USB_OTG_HAINTMSK_HAINTM_Msk
DECL|USB_OTG_HAINTMSK_HAINTM_Pos|macro|USB_OTG_HAINTMSK_HAINTM_Pos
DECL|USB_OTG_HAINTMSK_HAINTM|macro|USB_OTG_HAINTMSK_HAINTM
DECL|USB_OTG_HAINT_HAINT_Msk|macro|USB_OTG_HAINT_HAINT_Msk
DECL|USB_OTG_HAINT_HAINT_Pos|macro|USB_OTG_HAINT_HAINT_Pos
DECL|USB_OTG_HAINT_HAINT|macro|USB_OTG_HAINT_HAINT
DECL|USB_OTG_HCCHAR_CHDIS_Msk|macro|USB_OTG_HCCHAR_CHDIS_Msk
DECL|USB_OTG_HCCHAR_CHDIS_Pos|macro|USB_OTG_HCCHAR_CHDIS_Pos
DECL|USB_OTG_HCCHAR_CHDIS|macro|USB_OTG_HCCHAR_CHDIS
DECL|USB_OTG_HCCHAR_CHENA_Msk|macro|USB_OTG_HCCHAR_CHENA_Msk
DECL|USB_OTG_HCCHAR_CHENA_Pos|macro|USB_OTG_HCCHAR_CHENA_Pos
DECL|USB_OTG_HCCHAR_CHENA|macro|USB_OTG_HCCHAR_CHENA
DECL|USB_OTG_HCCHAR_DAD_0|macro|USB_OTG_HCCHAR_DAD_0
DECL|USB_OTG_HCCHAR_DAD_1|macro|USB_OTG_HCCHAR_DAD_1
DECL|USB_OTG_HCCHAR_DAD_2|macro|USB_OTG_HCCHAR_DAD_2
DECL|USB_OTG_HCCHAR_DAD_3|macro|USB_OTG_HCCHAR_DAD_3
DECL|USB_OTG_HCCHAR_DAD_4|macro|USB_OTG_HCCHAR_DAD_4
DECL|USB_OTG_HCCHAR_DAD_5|macro|USB_OTG_HCCHAR_DAD_5
DECL|USB_OTG_HCCHAR_DAD_6|macro|USB_OTG_HCCHAR_DAD_6
DECL|USB_OTG_HCCHAR_DAD_Msk|macro|USB_OTG_HCCHAR_DAD_Msk
DECL|USB_OTG_HCCHAR_DAD_Pos|macro|USB_OTG_HCCHAR_DAD_Pos
DECL|USB_OTG_HCCHAR_DAD|macro|USB_OTG_HCCHAR_DAD
DECL|USB_OTG_HCCHAR_EPDIR_Msk|macro|USB_OTG_HCCHAR_EPDIR_Msk
DECL|USB_OTG_HCCHAR_EPDIR_Pos|macro|USB_OTG_HCCHAR_EPDIR_Pos
DECL|USB_OTG_HCCHAR_EPDIR|macro|USB_OTG_HCCHAR_EPDIR
DECL|USB_OTG_HCCHAR_EPNUM_0|macro|USB_OTG_HCCHAR_EPNUM_0
DECL|USB_OTG_HCCHAR_EPNUM_1|macro|USB_OTG_HCCHAR_EPNUM_1
DECL|USB_OTG_HCCHAR_EPNUM_2|macro|USB_OTG_HCCHAR_EPNUM_2
DECL|USB_OTG_HCCHAR_EPNUM_3|macro|USB_OTG_HCCHAR_EPNUM_3
DECL|USB_OTG_HCCHAR_EPNUM_Msk|macro|USB_OTG_HCCHAR_EPNUM_Msk
DECL|USB_OTG_HCCHAR_EPNUM_Pos|macro|USB_OTG_HCCHAR_EPNUM_Pos
DECL|USB_OTG_HCCHAR_EPNUM|macro|USB_OTG_HCCHAR_EPNUM
DECL|USB_OTG_HCCHAR_EPTYP_0|macro|USB_OTG_HCCHAR_EPTYP_0
DECL|USB_OTG_HCCHAR_EPTYP_1|macro|USB_OTG_HCCHAR_EPTYP_1
DECL|USB_OTG_HCCHAR_EPTYP_Msk|macro|USB_OTG_HCCHAR_EPTYP_Msk
DECL|USB_OTG_HCCHAR_EPTYP_Pos|macro|USB_OTG_HCCHAR_EPTYP_Pos
DECL|USB_OTG_HCCHAR_EPTYP|macro|USB_OTG_HCCHAR_EPTYP
DECL|USB_OTG_HCCHAR_LSDEV_Msk|macro|USB_OTG_HCCHAR_LSDEV_Msk
DECL|USB_OTG_HCCHAR_LSDEV_Pos|macro|USB_OTG_HCCHAR_LSDEV_Pos
DECL|USB_OTG_HCCHAR_LSDEV|macro|USB_OTG_HCCHAR_LSDEV
DECL|USB_OTG_HCCHAR_MC_0|macro|USB_OTG_HCCHAR_MC_0
DECL|USB_OTG_HCCHAR_MC_1|macro|USB_OTG_HCCHAR_MC_1
DECL|USB_OTG_HCCHAR_MC_Msk|macro|USB_OTG_HCCHAR_MC_Msk
DECL|USB_OTG_HCCHAR_MC_Pos|macro|USB_OTG_HCCHAR_MC_Pos
DECL|USB_OTG_HCCHAR_MC|macro|USB_OTG_HCCHAR_MC
DECL|USB_OTG_HCCHAR_MPSIZ_Msk|macro|USB_OTG_HCCHAR_MPSIZ_Msk
DECL|USB_OTG_HCCHAR_MPSIZ_Pos|macro|USB_OTG_HCCHAR_MPSIZ_Pos
DECL|USB_OTG_HCCHAR_MPSIZ|macro|USB_OTG_HCCHAR_MPSIZ
DECL|USB_OTG_HCCHAR_ODDFRM_Msk|macro|USB_OTG_HCCHAR_ODDFRM_Msk
DECL|USB_OTG_HCCHAR_ODDFRM_Pos|macro|USB_OTG_HCCHAR_ODDFRM_Pos
DECL|USB_OTG_HCCHAR_ODDFRM|macro|USB_OTG_HCCHAR_ODDFRM
DECL|USB_OTG_HCDMA_DMAADDR_Msk|macro|USB_OTG_HCDMA_DMAADDR_Msk
DECL|USB_OTG_HCDMA_DMAADDR_Pos|macro|USB_OTG_HCDMA_DMAADDR_Pos
DECL|USB_OTG_HCDMA_DMAADDR|macro|USB_OTG_HCDMA_DMAADDR
DECL|USB_OTG_HCFG_FSLSPCS_0|macro|USB_OTG_HCFG_FSLSPCS_0
DECL|USB_OTG_HCFG_FSLSPCS_1|macro|USB_OTG_HCFG_FSLSPCS_1
DECL|USB_OTG_HCFG_FSLSPCS_Msk|macro|USB_OTG_HCFG_FSLSPCS_Msk
DECL|USB_OTG_HCFG_FSLSPCS_Pos|macro|USB_OTG_HCFG_FSLSPCS_Pos
DECL|USB_OTG_HCFG_FSLSPCS|macro|USB_OTG_HCFG_FSLSPCS
DECL|USB_OTG_HCFG_FSLSS_Msk|macro|USB_OTG_HCFG_FSLSS_Msk
DECL|USB_OTG_HCFG_FSLSS_Pos|macro|USB_OTG_HCFG_FSLSS_Pos
DECL|USB_OTG_HCFG_FSLSS|macro|USB_OTG_HCFG_FSLSS
DECL|USB_OTG_HCINTMSK_ACKM_Msk|macro|USB_OTG_HCINTMSK_ACKM_Msk
DECL|USB_OTG_HCINTMSK_ACKM_Pos|macro|USB_OTG_HCINTMSK_ACKM_Pos
DECL|USB_OTG_HCINTMSK_ACKM|macro|USB_OTG_HCINTMSK_ACKM
DECL|USB_OTG_HCINTMSK_AHBERR_Msk|macro|USB_OTG_HCINTMSK_AHBERR_Msk
DECL|USB_OTG_HCINTMSK_AHBERR_Pos|macro|USB_OTG_HCINTMSK_AHBERR_Pos
DECL|USB_OTG_HCINTMSK_AHBERR|macro|USB_OTG_HCINTMSK_AHBERR
DECL|USB_OTG_HCINTMSK_BBERRM_Msk|macro|USB_OTG_HCINTMSK_BBERRM_Msk
DECL|USB_OTG_HCINTMSK_BBERRM_Pos|macro|USB_OTG_HCINTMSK_BBERRM_Pos
DECL|USB_OTG_HCINTMSK_BBERRM|macro|USB_OTG_HCINTMSK_BBERRM
DECL|USB_OTG_HCINTMSK_CHHM_Msk|macro|USB_OTG_HCINTMSK_CHHM_Msk
DECL|USB_OTG_HCINTMSK_CHHM_Pos|macro|USB_OTG_HCINTMSK_CHHM_Pos
DECL|USB_OTG_HCINTMSK_CHHM|macro|USB_OTG_HCINTMSK_CHHM
DECL|USB_OTG_HCINTMSK_DTERRM_Msk|macro|USB_OTG_HCINTMSK_DTERRM_Msk
DECL|USB_OTG_HCINTMSK_DTERRM_Pos|macro|USB_OTG_HCINTMSK_DTERRM_Pos
DECL|USB_OTG_HCINTMSK_DTERRM|macro|USB_OTG_HCINTMSK_DTERRM
DECL|USB_OTG_HCINTMSK_FRMORM_Msk|macro|USB_OTG_HCINTMSK_FRMORM_Msk
DECL|USB_OTG_HCINTMSK_FRMORM_Pos|macro|USB_OTG_HCINTMSK_FRMORM_Pos
DECL|USB_OTG_HCINTMSK_FRMORM|macro|USB_OTG_HCINTMSK_FRMORM
DECL|USB_OTG_HCINTMSK_NAKM_Msk|macro|USB_OTG_HCINTMSK_NAKM_Msk
DECL|USB_OTG_HCINTMSK_NAKM_Pos|macro|USB_OTG_HCINTMSK_NAKM_Pos
DECL|USB_OTG_HCINTMSK_NAKM|macro|USB_OTG_HCINTMSK_NAKM
DECL|USB_OTG_HCINTMSK_NYET_Msk|macro|USB_OTG_HCINTMSK_NYET_Msk
DECL|USB_OTG_HCINTMSK_NYET_Pos|macro|USB_OTG_HCINTMSK_NYET_Pos
DECL|USB_OTG_HCINTMSK_NYET|macro|USB_OTG_HCINTMSK_NYET
DECL|USB_OTG_HCINTMSK_STALLM_Msk|macro|USB_OTG_HCINTMSK_STALLM_Msk
DECL|USB_OTG_HCINTMSK_STALLM_Pos|macro|USB_OTG_HCINTMSK_STALLM_Pos
DECL|USB_OTG_HCINTMSK_STALLM|macro|USB_OTG_HCINTMSK_STALLM
DECL|USB_OTG_HCINTMSK_TXERRM_Msk|macro|USB_OTG_HCINTMSK_TXERRM_Msk
DECL|USB_OTG_HCINTMSK_TXERRM_Pos|macro|USB_OTG_HCINTMSK_TXERRM_Pos
DECL|USB_OTG_HCINTMSK_TXERRM|macro|USB_OTG_HCINTMSK_TXERRM
DECL|USB_OTG_HCINTMSK_XFRCM_Msk|macro|USB_OTG_HCINTMSK_XFRCM_Msk
DECL|USB_OTG_HCINTMSK_XFRCM_Pos|macro|USB_OTG_HCINTMSK_XFRCM_Pos
DECL|USB_OTG_HCINTMSK_XFRCM|macro|USB_OTG_HCINTMSK_XFRCM
DECL|USB_OTG_HCINT_ACK_Msk|macro|USB_OTG_HCINT_ACK_Msk
DECL|USB_OTG_HCINT_ACK_Pos|macro|USB_OTG_HCINT_ACK_Pos
DECL|USB_OTG_HCINT_ACK|macro|USB_OTG_HCINT_ACK
DECL|USB_OTG_HCINT_AHBERR_Msk|macro|USB_OTG_HCINT_AHBERR_Msk
DECL|USB_OTG_HCINT_AHBERR_Pos|macro|USB_OTG_HCINT_AHBERR_Pos
DECL|USB_OTG_HCINT_AHBERR|macro|USB_OTG_HCINT_AHBERR
DECL|USB_OTG_HCINT_BBERR_Msk|macro|USB_OTG_HCINT_BBERR_Msk
DECL|USB_OTG_HCINT_BBERR_Pos|macro|USB_OTG_HCINT_BBERR_Pos
DECL|USB_OTG_HCINT_BBERR|macro|USB_OTG_HCINT_BBERR
DECL|USB_OTG_HCINT_CHH_Msk|macro|USB_OTG_HCINT_CHH_Msk
DECL|USB_OTG_HCINT_CHH_Pos|macro|USB_OTG_HCINT_CHH_Pos
DECL|USB_OTG_HCINT_CHH|macro|USB_OTG_HCINT_CHH
DECL|USB_OTG_HCINT_DTERR_Msk|macro|USB_OTG_HCINT_DTERR_Msk
DECL|USB_OTG_HCINT_DTERR_Pos|macro|USB_OTG_HCINT_DTERR_Pos
DECL|USB_OTG_HCINT_DTERR|macro|USB_OTG_HCINT_DTERR
DECL|USB_OTG_HCINT_FRMOR_Msk|macro|USB_OTG_HCINT_FRMOR_Msk
DECL|USB_OTG_HCINT_FRMOR_Pos|macro|USB_OTG_HCINT_FRMOR_Pos
DECL|USB_OTG_HCINT_FRMOR|macro|USB_OTG_HCINT_FRMOR
DECL|USB_OTG_HCINT_NAK_Msk|macro|USB_OTG_HCINT_NAK_Msk
DECL|USB_OTG_HCINT_NAK_Pos|macro|USB_OTG_HCINT_NAK_Pos
DECL|USB_OTG_HCINT_NAK|macro|USB_OTG_HCINT_NAK
DECL|USB_OTG_HCINT_NYET_Msk|macro|USB_OTG_HCINT_NYET_Msk
DECL|USB_OTG_HCINT_NYET_Pos|macro|USB_OTG_HCINT_NYET_Pos
DECL|USB_OTG_HCINT_NYET|macro|USB_OTG_HCINT_NYET
DECL|USB_OTG_HCINT_STALL_Msk|macro|USB_OTG_HCINT_STALL_Msk
DECL|USB_OTG_HCINT_STALL_Pos|macro|USB_OTG_HCINT_STALL_Pos
DECL|USB_OTG_HCINT_STALL|macro|USB_OTG_HCINT_STALL
DECL|USB_OTG_HCINT_TXERR_Msk|macro|USB_OTG_HCINT_TXERR_Msk
DECL|USB_OTG_HCINT_TXERR_Pos|macro|USB_OTG_HCINT_TXERR_Pos
DECL|USB_OTG_HCINT_TXERR|macro|USB_OTG_HCINT_TXERR
DECL|USB_OTG_HCINT_XFRC_Msk|macro|USB_OTG_HCINT_XFRC_Msk
DECL|USB_OTG_HCINT_XFRC_Pos|macro|USB_OTG_HCINT_XFRC_Pos
DECL|USB_OTG_HCINT_XFRC|macro|USB_OTG_HCINT_XFRC
DECL|USB_OTG_HCSPLT_COMPLSPLT_Msk|macro|USB_OTG_HCSPLT_COMPLSPLT_Msk
DECL|USB_OTG_HCSPLT_COMPLSPLT_Pos|macro|USB_OTG_HCSPLT_COMPLSPLT_Pos
DECL|USB_OTG_HCSPLT_COMPLSPLT|macro|USB_OTG_HCSPLT_COMPLSPLT
DECL|USB_OTG_HCSPLT_HUBADDR_0|macro|USB_OTG_HCSPLT_HUBADDR_0
DECL|USB_OTG_HCSPLT_HUBADDR_1|macro|USB_OTG_HCSPLT_HUBADDR_1
DECL|USB_OTG_HCSPLT_HUBADDR_2|macro|USB_OTG_HCSPLT_HUBADDR_2
DECL|USB_OTG_HCSPLT_HUBADDR_3|macro|USB_OTG_HCSPLT_HUBADDR_3
DECL|USB_OTG_HCSPLT_HUBADDR_4|macro|USB_OTG_HCSPLT_HUBADDR_4
DECL|USB_OTG_HCSPLT_HUBADDR_5|macro|USB_OTG_HCSPLT_HUBADDR_5
DECL|USB_OTG_HCSPLT_HUBADDR_6|macro|USB_OTG_HCSPLT_HUBADDR_6
DECL|USB_OTG_HCSPLT_HUBADDR_Msk|macro|USB_OTG_HCSPLT_HUBADDR_Msk
DECL|USB_OTG_HCSPLT_HUBADDR_Pos|macro|USB_OTG_HCSPLT_HUBADDR_Pos
DECL|USB_OTG_HCSPLT_HUBADDR|macro|USB_OTG_HCSPLT_HUBADDR
DECL|USB_OTG_HCSPLT_PRTADDR_0|macro|USB_OTG_HCSPLT_PRTADDR_0
DECL|USB_OTG_HCSPLT_PRTADDR_1|macro|USB_OTG_HCSPLT_PRTADDR_1
DECL|USB_OTG_HCSPLT_PRTADDR_2|macro|USB_OTG_HCSPLT_PRTADDR_2
DECL|USB_OTG_HCSPLT_PRTADDR_3|macro|USB_OTG_HCSPLT_PRTADDR_3
DECL|USB_OTG_HCSPLT_PRTADDR_4|macro|USB_OTG_HCSPLT_PRTADDR_4
DECL|USB_OTG_HCSPLT_PRTADDR_5|macro|USB_OTG_HCSPLT_PRTADDR_5
DECL|USB_OTG_HCSPLT_PRTADDR_6|macro|USB_OTG_HCSPLT_PRTADDR_6
DECL|USB_OTG_HCSPLT_PRTADDR_Msk|macro|USB_OTG_HCSPLT_PRTADDR_Msk
DECL|USB_OTG_HCSPLT_PRTADDR_Pos|macro|USB_OTG_HCSPLT_PRTADDR_Pos
DECL|USB_OTG_HCSPLT_PRTADDR|macro|USB_OTG_HCSPLT_PRTADDR
DECL|USB_OTG_HCSPLT_SPLITEN_Msk|macro|USB_OTG_HCSPLT_SPLITEN_Msk
DECL|USB_OTG_HCSPLT_SPLITEN_Pos|macro|USB_OTG_HCSPLT_SPLITEN_Pos
DECL|USB_OTG_HCSPLT_SPLITEN|macro|USB_OTG_HCSPLT_SPLITEN
DECL|USB_OTG_HCSPLT_XACTPOS_0|macro|USB_OTG_HCSPLT_XACTPOS_0
DECL|USB_OTG_HCSPLT_XACTPOS_1|macro|USB_OTG_HCSPLT_XACTPOS_1
DECL|USB_OTG_HCSPLT_XACTPOS_Msk|macro|USB_OTG_HCSPLT_XACTPOS_Msk
DECL|USB_OTG_HCSPLT_XACTPOS_Pos|macro|USB_OTG_HCSPLT_XACTPOS_Pos
DECL|USB_OTG_HCSPLT_XACTPOS|macro|USB_OTG_HCSPLT_XACTPOS
DECL|USB_OTG_HCTSIZ_DOPING_Msk|macro|USB_OTG_HCTSIZ_DOPING_Msk
DECL|USB_OTG_HCTSIZ_DOPING_Pos|macro|USB_OTG_HCTSIZ_DOPING_Pos
DECL|USB_OTG_HCTSIZ_DOPING|macro|USB_OTG_HCTSIZ_DOPING
DECL|USB_OTG_HCTSIZ_DPID_0|macro|USB_OTG_HCTSIZ_DPID_0
DECL|USB_OTG_HCTSIZ_DPID_1|macro|USB_OTG_HCTSIZ_DPID_1
DECL|USB_OTG_HCTSIZ_DPID_Msk|macro|USB_OTG_HCTSIZ_DPID_Msk
DECL|USB_OTG_HCTSIZ_DPID_Pos|macro|USB_OTG_HCTSIZ_DPID_Pos
DECL|USB_OTG_HCTSIZ_DPID|macro|USB_OTG_HCTSIZ_DPID
DECL|USB_OTG_HCTSIZ_PKTCNT_Msk|macro|USB_OTG_HCTSIZ_PKTCNT_Msk
DECL|USB_OTG_HCTSIZ_PKTCNT_Pos|macro|USB_OTG_HCTSIZ_PKTCNT_Pos
DECL|USB_OTG_HCTSIZ_PKTCNT|macro|USB_OTG_HCTSIZ_PKTCNT
DECL|USB_OTG_HCTSIZ_XFRSIZ_Msk|macro|USB_OTG_HCTSIZ_XFRSIZ_Msk
DECL|USB_OTG_HCTSIZ_XFRSIZ_Pos|macro|USB_OTG_HCTSIZ_XFRSIZ_Pos
DECL|USB_OTG_HCTSIZ_XFRSIZ|macro|USB_OTG_HCTSIZ_XFRSIZ
DECL|USB_OTG_HFIR_FRIVL_Msk|macro|USB_OTG_HFIR_FRIVL_Msk
DECL|USB_OTG_HFIR_FRIVL_Pos|macro|USB_OTG_HFIR_FRIVL_Pos
DECL|USB_OTG_HFIR_FRIVL|macro|USB_OTG_HFIR_FRIVL
DECL|USB_OTG_HFNUM_FRNUM_Msk|macro|USB_OTG_HFNUM_FRNUM_Msk
DECL|USB_OTG_HFNUM_FRNUM_Pos|macro|USB_OTG_HFNUM_FRNUM_Pos
DECL|USB_OTG_HFNUM_FRNUM|macro|USB_OTG_HFNUM_FRNUM
DECL|USB_OTG_HFNUM_FTREM_Msk|macro|USB_OTG_HFNUM_FTREM_Msk
DECL|USB_OTG_HFNUM_FTREM_Pos|macro|USB_OTG_HFNUM_FTREM_Pos
DECL|USB_OTG_HFNUM_FTREM|macro|USB_OTG_HFNUM_FTREM
DECL|USB_OTG_HOST_BASE|macro|USB_OTG_HOST_BASE
DECL|USB_OTG_HOST_CHANNEL_BASE|macro|USB_OTG_HOST_CHANNEL_BASE
DECL|USB_OTG_HOST_CHANNEL_SIZE|macro|USB_OTG_HOST_CHANNEL_SIZE
DECL|USB_OTG_HOST_PORT_BASE|macro|USB_OTG_HOST_PORT_BASE
DECL|USB_OTG_HPRT_PCDET_Msk|macro|USB_OTG_HPRT_PCDET_Msk
DECL|USB_OTG_HPRT_PCDET_Pos|macro|USB_OTG_HPRT_PCDET_Pos
DECL|USB_OTG_HPRT_PCDET|macro|USB_OTG_HPRT_PCDET
DECL|USB_OTG_HPRT_PCSTS_Msk|macro|USB_OTG_HPRT_PCSTS_Msk
DECL|USB_OTG_HPRT_PCSTS_Pos|macro|USB_OTG_HPRT_PCSTS_Pos
DECL|USB_OTG_HPRT_PCSTS|macro|USB_OTG_HPRT_PCSTS
DECL|USB_OTG_HPRT_PENA_Msk|macro|USB_OTG_HPRT_PENA_Msk
DECL|USB_OTG_HPRT_PENA_Pos|macro|USB_OTG_HPRT_PENA_Pos
DECL|USB_OTG_HPRT_PENA|macro|USB_OTG_HPRT_PENA
DECL|USB_OTG_HPRT_PENCHNG_Msk|macro|USB_OTG_HPRT_PENCHNG_Msk
DECL|USB_OTG_HPRT_PENCHNG_Pos|macro|USB_OTG_HPRT_PENCHNG_Pos
DECL|USB_OTG_HPRT_PENCHNG|macro|USB_OTG_HPRT_PENCHNG
DECL|USB_OTG_HPRT_PLSTS_0|macro|USB_OTG_HPRT_PLSTS_0
DECL|USB_OTG_HPRT_PLSTS_1|macro|USB_OTG_HPRT_PLSTS_1
DECL|USB_OTG_HPRT_PLSTS_Msk|macro|USB_OTG_HPRT_PLSTS_Msk
DECL|USB_OTG_HPRT_PLSTS_Pos|macro|USB_OTG_HPRT_PLSTS_Pos
DECL|USB_OTG_HPRT_PLSTS|macro|USB_OTG_HPRT_PLSTS
DECL|USB_OTG_HPRT_POCA_Msk|macro|USB_OTG_HPRT_POCA_Msk
DECL|USB_OTG_HPRT_POCA_Pos|macro|USB_OTG_HPRT_POCA_Pos
DECL|USB_OTG_HPRT_POCA|macro|USB_OTG_HPRT_POCA
DECL|USB_OTG_HPRT_POCCHNG_Msk|macro|USB_OTG_HPRT_POCCHNG_Msk
DECL|USB_OTG_HPRT_POCCHNG_Pos|macro|USB_OTG_HPRT_POCCHNG_Pos
DECL|USB_OTG_HPRT_POCCHNG|macro|USB_OTG_HPRT_POCCHNG
DECL|USB_OTG_HPRT_PPWR_Msk|macro|USB_OTG_HPRT_PPWR_Msk
DECL|USB_OTG_HPRT_PPWR_Pos|macro|USB_OTG_HPRT_PPWR_Pos
DECL|USB_OTG_HPRT_PPWR|macro|USB_OTG_HPRT_PPWR
DECL|USB_OTG_HPRT_PRES_Msk|macro|USB_OTG_HPRT_PRES_Msk
DECL|USB_OTG_HPRT_PRES_Pos|macro|USB_OTG_HPRT_PRES_Pos
DECL|USB_OTG_HPRT_PRES|macro|USB_OTG_HPRT_PRES
DECL|USB_OTG_HPRT_PRST_Msk|macro|USB_OTG_HPRT_PRST_Msk
DECL|USB_OTG_HPRT_PRST_Pos|macro|USB_OTG_HPRT_PRST_Pos
DECL|USB_OTG_HPRT_PRST|macro|USB_OTG_HPRT_PRST
DECL|USB_OTG_HPRT_PSPD_0|macro|USB_OTG_HPRT_PSPD_0
DECL|USB_OTG_HPRT_PSPD_1|macro|USB_OTG_HPRT_PSPD_1
DECL|USB_OTG_HPRT_PSPD_Msk|macro|USB_OTG_HPRT_PSPD_Msk
DECL|USB_OTG_HPRT_PSPD_Pos|macro|USB_OTG_HPRT_PSPD_Pos
DECL|USB_OTG_HPRT_PSPD|macro|USB_OTG_HPRT_PSPD
DECL|USB_OTG_HPRT_PSUSP_Msk|macro|USB_OTG_HPRT_PSUSP_Msk
DECL|USB_OTG_HPRT_PSUSP_Pos|macro|USB_OTG_HPRT_PSUSP_Pos
DECL|USB_OTG_HPRT_PSUSP|macro|USB_OTG_HPRT_PSUSP
DECL|USB_OTG_HPRT_PTCTL_0|macro|USB_OTG_HPRT_PTCTL_0
DECL|USB_OTG_HPRT_PTCTL_1|macro|USB_OTG_HPRT_PTCTL_1
DECL|USB_OTG_HPRT_PTCTL_2|macro|USB_OTG_HPRT_PTCTL_2
DECL|USB_OTG_HPRT_PTCTL_3|macro|USB_OTG_HPRT_PTCTL_3
DECL|USB_OTG_HPRT_PTCTL_Msk|macro|USB_OTG_HPRT_PTCTL_Msk
DECL|USB_OTG_HPRT_PTCTL_Pos|macro|USB_OTG_HPRT_PTCTL_Pos
DECL|USB_OTG_HPRT_PTCTL|macro|USB_OTG_HPRT_PTCTL
DECL|USB_OTG_HPTXFSIZ_PTXFD_Msk|macro|USB_OTG_HPTXFSIZ_PTXFD_Msk
DECL|USB_OTG_HPTXFSIZ_PTXFD_Pos|macro|USB_OTG_HPTXFSIZ_PTXFD_Pos
DECL|USB_OTG_HPTXFSIZ_PTXFD|macro|USB_OTG_HPTXFSIZ_PTXFD
DECL|USB_OTG_HPTXFSIZ_PTXSA_Msk|macro|USB_OTG_HPTXFSIZ_PTXSA_Msk
DECL|USB_OTG_HPTXFSIZ_PTXSA_Pos|macro|USB_OTG_HPTXFSIZ_PTXSA_Pos
DECL|USB_OTG_HPTXFSIZ_PTXSA|macro|USB_OTG_HPTXFSIZ_PTXSA
DECL|USB_OTG_HPTXSTS_PTXFSAVL_Msk|macro|USB_OTG_HPTXSTS_PTXFSAVL_Msk
DECL|USB_OTG_HPTXSTS_PTXFSAVL_Pos|macro|USB_OTG_HPTXSTS_PTXFSAVL_Pos
DECL|USB_OTG_HPTXSTS_PTXFSAVL|macro|USB_OTG_HPTXSTS_PTXFSAVL
DECL|USB_OTG_HPTXSTS_PTXQSAV_0|macro|USB_OTG_HPTXSTS_PTXQSAV_0
DECL|USB_OTG_HPTXSTS_PTXQSAV_1|macro|USB_OTG_HPTXSTS_PTXQSAV_1
DECL|USB_OTG_HPTXSTS_PTXQSAV_2|macro|USB_OTG_HPTXSTS_PTXQSAV_2
DECL|USB_OTG_HPTXSTS_PTXQSAV_3|macro|USB_OTG_HPTXSTS_PTXQSAV_3
DECL|USB_OTG_HPTXSTS_PTXQSAV_4|macro|USB_OTG_HPTXSTS_PTXQSAV_4
DECL|USB_OTG_HPTXSTS_PTXQSAV_5|macro|USB_OTG_HPTXSTS_PTXQSAV_5
DECL|USB_OTG_HPTXSTS_PTXQSAV_6|macro|USB_OTG_HPTXSTS_PTXQSAV_6
DECL|USB_OTG_HPTXSTS_PTXQSAV_7|macro|USB_OTG_HPTXSTS_PTXQSAV_7
DECL|USB_OTG_HPTXSTS_PTXQSAV_Msk|macro|USB_OTG_HPTXSTS_PTXQSAV_Msk
DECL|USB_OTG_HPTXSTS_PTXQSAV_Pos|macro|USB_OTG_HPTXSTS_PTXQSAV_Pos
DECL|USB_OTG_HPTXSTS_PTXQSAV|macro|USB_OTG_HPTXSTS_PTXQSAV
DECL|USB_OTG_HPTXSTS_PTXQTOP_0|macro|USB_OTG_HPTXSTS_PTXQTOP_0
DECL|USB_OTG_HPTXSTS_PTXQTOP_1|macro|USB_OTG_HPTXSTS_PTXQTOP_1
DECL|USB_OTG_HPTXSTS_PTXQTOP_2|macro|USB_OTG_HPTXSTS_PTXQTOP_2
DECL|USB_OTG_HPTXSTS_PTXQTOP_3|macro|USB_OTG_HPTXSTS_PTXQTOP_3
DECL|USB_OTG_HPTXSTS_PTXQTOP_4|macro|USB_OTG_HPTXSTS_PTXQTOP_4
DECL|USB_OTG_HPTXSTS_PTXQTOP_5|macro|USB_OTG_HPTXSTS_PTXQTOP_5
DECL|USB_OTG_HPTXSTS_PTXQTOP_6|macro|USB_OTG_HPTXSTS_PTXQTOP_6
DECL|USB_OTG_HPTXSTS_PTXQTOP_7|macro|USB_OTG_HPTXSTS_PTXQTOP_7
DECL|USB_OTG_HPTXSTS_PTXQTOP_Msk|macro|USB_OTG_HPTXSTS_PTXQTOP_Msk
DECL|USB_OTG_HPTXSTS_PTXQTOP_Pos|macro|USB_OTG_HPTXSTS_PTXQTOP_Pos
DECL|USB_OTG_HPTXSTS_PTXQTOP|macro|USB_OTG_HPTXSTS_PTXQTOP
DECL|USB_OTG_HS_PERIPH_BASE|macro|USB_OTG_HS_PERIPH_BASE
DECL|USB_OTG_HS|macro|USB_OTG_HS
DECL|USB_OTG_HostChannelTypeDef|typedef|} USB_OTG_HostChannelTypeDef;
DECL|USB_OTG_HostTypeDef|typedef|} USB_OTG_HostTypeDef;
DECL|USB_OTG_INEndpointTypeDef|typedef|} USB_OTG_INEndpointTypeDef;
DECL|USB_OTG_IN_ENDPOINT_BASE|macro|USB_OTG_IN_ENDPOINT_BASE
DECL|USB_OTG_NPTXFD_Msk|macro|USB_OTG_NPTXFD_Msk
DECL|USB_OTG_NPTXFD_Pos|macro|USB_OTG_NPTXFD_Pos
DECL|USB_OTG_NPTXFD|macro|USB_OTG_NPTXFD
DECL|USB_OTG_NPTXFSA_Msk|macro|USB_OTG_NPTXFSA_Msk
DECL|USB_OTG_NPTXFSA_Pos|macro|USB_OTG_NPTXFSA_Pos
DECL|USB_OTG_NPTXFSA|macro|USB_OTG_NPTXFSA
DECL|USB_OTG_OUTEndpointTypeDef|typedef|} USB_OTG_OUTEndpointTypeDef;
DECL|USB_OTG_OUT_ENDPOINT_BASE|macro|USB_OTG_OUT_ENDPOINT_BASE
DECL|USB_OTG_PCGCCTL_BASE|macro|USB_OTG_PCGCCTL_BASE
DECL|USB_OTG_PCGCCTL_GATECLK_Msk|macro|USB_OTG_PCGCCTL_GATECLK_Msk
DECL|USB_OTG_PCGCCTL_GATECLK_Pos|macro|USB_OTG_PCGCCTL_GATECLK_Pos
DECL|USB_OTG_PCGCCTL_GATECLK|macro|USB_OTG_PCGCCTL_GATECLK
DECL|USB_OTG_PCGCCTL_PHYSUSP_Msk|macro|USB_OTG_PCGCCTL_PHYSUSP_Msk
DECL|USB_OTG_PCGCCTL_PHYSUSP_Pos|macro|USB_OTG_PCGCCTL_PHYSUSP_Pos
DECL|USB_OTG_PCGCCTL_PHYSUSP|macro|USB_OTG_PCGCCTL_PHYSUSP
DECL|USB_OTG_PCGCCTL_STOPCLK_Msk|macro|USB_OTG_PCGCCTL_STOPCLK_Msk
DECL|USB_OTG_PCGCCTL_STOPCLK_Pos|macro|USB_OTG_PCGCCTL_STOPCLK_Pos
DECL|USB_OTG_PCGCCTL_STOPCLK|macro|USB_OTG_PCGCCTL_STOPCLK
DECL|USB_OTG_PCGCR_GATEHCLK_Msk|macro|USB_OTG_PCGCR_GATEHCLK_Msk
DECL|USB_OTG_PCGCR_GATEHCLK_Pos|macro|USB_OTG_PCGCR_GATEHCLK_Pos
DECL|USB_OTG_PCGCR_GATEHCLK|macro|USB_OTG_PCGCR_GATEHCLK
DECL|USB_OTG_PCGCR_PHYSUSP_Msk|macro|USB_OTG_PCGCR_PHYSUSP_Msk
DECL|USB_OTG_PCGCR_PHYSUSP_Pos|macro|USB_OTG_PCGCR_PHYSUSP_Pos
DECL|USB_OTG_PCGCR_PHYSUSP|macro|USB_OTG_PCGCR_PHYSUSP
DECL|USB_OTG_PCGCR_STPPCLK_Msk|macro|USB_OTG_PCGCR_STPPCLK_Msk
DECL|USB_OTG_PCGCR_STPPCLK_Pos|macro|USB_OTG_PCGCR_STPPCLK_Pos
DECL|USB_OTG_PCGCR_STPPCLK|macro|USB_OTG_PCGCR_STPPCLK
DECL|USB_OTG_PKTSTS_0|macro|USB_OTG_PKTSTS_0
DECL|USB_OTG_PKTSTS_0|macro|USB_OTG_PKTSTS_0
DECL|USB_OTG_PKTSTS_1|macro|USB_OTG_PKTSTS_1
DECL|USB_OTG_PKTSTS_1|macro|USB_OTG_PKTSTS_1
DECL|USB_OTG_PKTSTS_2|macro|USB_OTG_PKTSTS_2
DECL|USB_OTG_PKTSTS_2|macro|USB_OTG_PKTSTS_2
DECL|USB_OTG_PKTSTS_3|macro|USB_OTG_PKTSTS_3
DECL|USB_OTG_PKTSTS_3|macro|USB_OTG_PKTSTS_3
DECL|USB_OTG_PKTSTS_Msk|macro|USB_OTG_PKTSTS_Msk
DECL|USB_OTG_PKTSTS_Msk|macro|USB_OTG_PKTSTS_Msk
DECL|USB_OTG_PKTSTS_Pos|macro|USB_OTG_PKTSTS_Pos
DECL|USB_OTG_PKTSTS_Pos|macro|USB_OTG_PKTSTS_Pos
DECL|USB_OTG_PKTSTS|macro|USB_OTG_PKTSTS
DECL|USB_OTG_PKTSTS|macro|USB_OTG_PKTSTS
DECL|USB_OTG_TX0FD_Msk|macro|USB_OTG_TX0FD_Msk
DECL|USB_OTG_TX0FD_Pos|macro|USB_OTG_TX0FD_Pos
DECL|USB_OTG_TX0FD|macro|USB_OTG_TX0FD
DECL|USB_OTG_TX0FSA_Msk|macro|USB_OTG_TX0FSA_Msk
DECL|USB_OTG_TX0FSA_Pos|macro|USB_OTG_TX0FSA_Pos
DECL|USB_OTG_TX0FSA|macro|USB_OTG_TX0FSA
DECL|UsageFault_IRQn|enumerator|UsageFault_IRQn = -10, /*!< 6 Cortex-M7 Usage Fault Interrupt */
DECL|WINR|member|__IO uint32_t WINR; /*!< IWDG Window register, Address offset: 0x10 */
DECL|WPR|member|__IO uint32_t WPR; /*!< RTC write protection register, Address offset: 0x24 */
DECL|WUTR|member|__IO uint32_t WUTR; /*!< RTC wakeup timer register, Address offset: 0x14 */
DECL|WWDG_BASE|macro|WWDG_BASE
DECL|WWDG_CFR_EWI_Msk|macro|WWDG_CFR_EWI_Msk
DECL|WWDG_CFR_EWI_Pos|macro|WWDG_CFR_EWI_Pos
DECL|WWDG_CFR_EWI|macro|WWDG_CFR_EWI
DECL|WWDG_CFR_WDGTB_0|macro|WWDG_CFR_WDGTB_0
DECL|WWDG_CFR_WDGTB_1|macro|WWDG_CFR_WDGTB_1
DECL|WWDG_CFR_WDGTB_Msk|macro|WWDG_CFR_WDGTB_Msk
DECL|WWDG_CFR_WDGTB_Pos|macro|WWDG_CFR_WDGTB_Pos
DECL|WWDG_CFR_WDGTB|macro|WWDG_CFR_WDGTB
DECL|WWDG_CFR_W_0|macro|WWDG_CFR_W_0
DECL|WWDG_CFR_W_1|macro|WWDG_CFR_W_1
DECL|WWDG_CFR_W_2|macro|WWDG_CFR_W_2
DECL|WWDG_CFR_W_3|macro|WWDG_CFR_W_3
DECL|WWDG_CFR_W_4|macro|WWDG_CFR_W_4
DECL|WWDG_CFR_W_5|macro|WWDG_CFR_W_5
DECL|WWDG_CFR_W_6|macro|WWDG_CFR_W_6
DECL|WWDG_CFR_W_Msk|macro|WWDG_CFR_W_Msk
DECL|WWDG_CFR_W_Pos|macro|WWDG_CFR_W_Pos
DECL|WWDG_CFR_W|macro|WWDG_CFR_W
DECL|WWDG_CR_T_0|macro|WWDG_CR_T_0
DECL|WWDG_CR_T_1|macro|WWDG_CR_T_1
DECL|WWDG_CR_T_2|macro|WWDG_CR_T_2
DECL|WWDG_CR_T_3|macro|WWDG_CR_T_3
DECL|WWDG_CR_T_4|macro|WWDG_CR_T_4
DECL|WWDG_CR_T_5|macro|WWDG_CR_T_5
DECL|WWDG_CR_T_6|macro|WWDG_CR_T_6
DECL|WWDG_CR_T_Msk|macro|WWDG_CR_T_Msk
DECL|WWDG_CR_T_Pos|macro|WWDG_CR_T_Pos
DECL|WWDG_CR_T|macro|WWDG_CR_T
DECL|WWDG_CR_WDGA_Msk|macro|WWDG_CR_WDGA_Msk
DECL|WWDG_CR_WDGA_Pos|macro|WWDG_CR_WDGA_Pos
DECL|WWDG_CR_WDGA|macro|WWDG_CR_WDGA
DECL|WWDG_IRQn|enumerator|WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
DECL|WWDG_SR_EWIF_Msk|macro|WWDG_SR_EWIF_Msk
DECL|WWDG_SR_EWIF_Pos|macro|WWDG_SR_EWIF_Pos
DECL|WWDG_SR_EWIF|macro|WWDG_SR_EWIF
DECL|WWDG_TypeDef|typedef|} WWDG_TypeDef;
DECL|WWDG|macro|WWDG
DECL|__CM7_REV|macro|__CM7_REV
DECL|__DCACHE_PRESENT|macro|__DCACHE_PRESENT
DECL|__FPU_PRESENT|macro|__FPU_PRESENT
DECL|__ICACHE_PRESENT|macro|__ICACHE_PRESENT
DECL|__MPU_PRESENT|macro|__MPU_PRESENT
DECL|__NVIC_PRIO_BITS|macro|__NVIC_PRIO_BITS
DECL|__STM32F732xx_H|macro|__STM32F732xx_H
DECL|__Vendor_SysTickConfig|macro|__Vendor_SysTickConfig
DECL|reserved|member|uint32_t reserved; /*!< Reserved */
DECL|sFIFOMailBox|member|CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; /*!< CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC */
DECL|sFilterRegister|member|CAN_FilterRegister_TypeDef sFilterRegister[28]; /*!< CAN Filter Register, Address offset: 0x240-0x31C */
DECL|sTxMailBox|member|CAN_TxMailBox_TypeDef sTxMailBox[3]; /*!< CAN Tx MailBox, Address offset: 0x180 - 0x1AC */
